From nobody Sun Feb 8 02:34:46 2026 Received: from mail-pf1-f173.google.com (mail-pf1-f173.google.com [209.85.210.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC65632F75D for ; Fri, 17 Oct 2025 15:59:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760716783; cv=none; b=XgbMGYh12KpaIplC6U6D/tDas1FKFeEbb5ix0bGygsZYw6Afuu8MQOaqyYqTG5TQ20pcyjCiJ+y8mP09DKPZdJzghQlJi8TmE0hbxvVzSSZoAzpgGNNMrMyYQE+64fU1pIdAFkvpDjRqB0oAskW2mMN3RpQ97I04Y0REXcnV/ww= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760716783; c=relaxed/simple; bh=GCIigDkB0pF7cxSdTRy9b39VCRd68OawhY8FjD+BNB4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qrI4qXzXkpZeNHQVBEXMZtSJPjzXxrFcUw1dm63gIBtydkmsqhkYWV5A6o1p97mI4QPLLbHDlVVVP4hCwACbxL+y/ApS7cl545f96v5YEbodA7Z4XGCOv71NyC7GYPqf4Rd5pjBBcFodhbrlpb7Hkf/4pxVJUy5jt3GVEhZBJzI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=osHI1KM9; arc=none smtp.client-ip=209.85.210.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="osHI1KM9" Received: by mail-pf1-f173.google.com with SMTP id d2e1a72fcca58-7811a02316bso1518980b3a.3 for ; Fri, 17 Oct 2025 08:59:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1760716781; x=1761321581; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8w5xDGLO7hW3hS92oDJ9fb7AKUAHlmH+03Jt/Z8OfK8=; b=osHI1KM9F7gJPK5qFebbSWBvxqXX3WvPjAejjt9vHu5+lmNIKayhyDGOYvrxzaiABC hEX2FOekIRfbssBO4j4Yf7sljGDPXtoQdcdK6UQvmWQ5qvy3Yrm0mmeufQ1zm7noJHrv L8Lv+uSLjEosxRLgSzJ3Q2wkwUbymbFbUNdMVbfUxhjUS+xKXW/u0GRePkBoFeZ2zSP5 /x8B9d8Jh2C+Hz1TyCT+aRjHH6TqTByczkp1s3ZpY5NE70j/RUrrFuGiswC6my0czlvg QuvEjZUAcKUEiLr1T82kT6CZJgQn34EJibwDbd/e0XRAF70yzktIDbbpOfGYjIbdeSAI /f/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760716781; x=1761321581; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8w5xDGLO7hW3hS92oDJ9fb7AKUAHlmH+03Jt/Z8OfK8=; b=wSEL/mWaepJf+MbFCBV/qFpzW0anMrYtu4m+QxF/GGEev9c9KryNdFQJwEGS8g7/AK 7RtBgxvODZHZD6CkPft0ZkrTyz0ebKRRVI+le6ZteP0cpbKrUe1fZyP21SeUj24kQdb+ YRgnooYyOH1EgN0DmXonCygACAsrBDgRxntN1/wRYRxpAMXMpu4jvFfqZkkusmp4LFQb Lc+WyK9lX/xcLEQ6gYsywNiLHytrfzihJdzLsdm6hPZeHzI1Z3zfT/1gFZN5BD7LmijE RaC4FsRKav8WsKzv/BJ/4LCIP8+ucXwAfC9yFtLhluVw6Wqtp4j6BBn+yrgJK+rvakan V5sw== X-Forwarded-Encrypted: i=1; AJvYcCX9dObO6q3EHdMtL19H1ZA4Ggk31vi05le/XCBhF/FMnzanU+uD4nJuuv6ToT9X0XQebOgKKd7w+7p9Rvw=@vger.kernel.org X-Gm-Message-State: AOJu0YyWQKD7reiB1C86ZObJy57bBjsC5CZNRfyUXlQb/OogYy5bvVnD cOEnnBeiWlj1mAwysUPF5No5KUXs2ho6bj/NtQK1NjFYm964ZUinFsg1Vcl+rf6AwDA= X-Gm-Gg: ASbGncsIoVoC0TY0UntJW5jhxqTEbi0tyAjvrXlxlwKXXZNtJC6dogni9QBZDlPS4VX /wczZd3Bg+chhmaDPGtFpzXAlyse4yZNelCfdEtG5N1SXcoTaQDnkrjSfh14RUVvaoMqP/MlHPD FzSf6HxHf5cUf3Ocp24Iv18fl5nwFFOf4KyEs3dky+BCi4GXdXEv4IgM+kM2l4dwFkKMhiQfHEs xhrkOtySn5d0dY2hHJ/+DujCf4o6Q+rLtBzcYk/rm21eD64wGpehf5acPEtSE9oMOfiNXfLf0nv wz0CzE8b0M5kLbE0cICtkeoCJ8tP5oyhquhH25U2687TZ9618KIOPtfqTkBprgC9KNBGBFHweFL NZFnzHTPP2LkTmXPNqoNlAapO00F7Zy3/oJ3uqNccLFW/7cb+hiv0Lcx9TzcnWB9Q9tzxpFOObg sn+N6brTTjbYvaP7zqnzadtFU9yZfpUdG9 X-Google-Smtp-Source: AGHT+IHNbVvYJz+rYfwfI4m+3NraggPiuTL6qpx95XEifxO4NBe/kLmHp3qJst7WcfaiUNvQG99/Qw== X-Received: by 2002:a05:6a21:71c7:b0:334:b734:eed2 with SMTP id adf61e73a8af0-334b734eeedmr685727637.42.1760716780898; Fri, 17 Oct 2025 08:59:40 -0700 (PDT) Received: from localhost.localdomain ([122.171.18.129]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b6a7669392csm151067a12.18.2025.10.17.08.59.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Oct 2025 08:59:40 -0700 (PDT) From: Anup Patel To: Atish Patra , Andrew Jones Cc: Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Paolo Bonzini , Shuah Khan , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Anup Patel Subject: [PATCH 1/4] RISC-V: KVM: Convert kvm_riscv_vcpu_sbi_forward() into extension handler Date: Fri, 17 Oct 2025 21:29:22 +0530 Message-ID: <20251017155925.361560-2-apatel@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251017155925.361560-1-apatel@ventanamicro.com> References: <20251017155925.361560-1-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" All uses of kvm_riscv_vcpu_sbi_forward() also updates retdata->uexit so to further reduce code duplication move retdata->uexit assignment to kvm_riscv_vcpu_sbi_forward() and convert it into SBI extension handler. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/include/asm/kvm_vcpu_sbi.h | 4 +++- arch/riscv/kvm/vcpu_sbi.c | 6 +++++- arch/riscv/kvm/vcpu_sbi_base.c | 20 +++----------------- arch/riscv/kvm/vcpu_sbi_replace.c | 27 +-------------------------- arch/riscv/kvm/vcpu_sbi_system.c | 4 +--- arch/riscv/kvm/vcpu_sbi_v01.c | 3 +-- 6 files changed, 14 insertions(+), 50 deletions(-) diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm= /kvm_vcpu_sbi.h index 3497489e04db..446f4a8eb3cd 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h @@ -69,7 +69,9 @@ struct kvm_vcpu_sbi_extension { unsigned long reg_size, const void *reg_val); }; =20 -void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run= ); +int kvm_riscv_vcpu_sbi_forward_handler(struct kvm_vcpu *vcpu, + struct kvm_run *run, + struct kvm_vcpu_sbi_return *retdata); void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu, struct kvm_run *run, u32 type, u64 flags); diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index 1b13623380e1..fd4106c276d8 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -120,7 +120,9 @@ static bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu= *vcpu, int idx) return sext && scontext->ext_status[sext->ext_idx] !=3D KVM_RISCV_SBI_EXT= _STATUS_UNAVAILABLE; } =20 -void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run) +int kvm_riscv_vcpu_sbi_forward_handler(struct kvm_vcpu *vcpu, + struct kvm_run *run, + struct kvm_vcpu_sbi_return *retdata) { struct kvm_cpu_context *cp =3D &vcpu->arch.guest_context; =20 @@ -137,6 +139,8 @@ void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, = struct kvm_run *run) run->riscv_sbi.args[5] =3D cp->a5; run->riscv_sbi.ret[0] =3D SBI_ERR_NOT_SUPPORTED; run->riscv_sbi.ret[1] =3D 0; + retdata->uexit =3D true; + return 0; } =20 void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu, diff --git a/arch/riscv/kvm/vcpu_sbi_base.c b/arch/riscv/kvm/vcpu_sbi_base.c index 5bc570b984f4..ca489f2dfbdf 100644 --- a/arch/riscv/kvm/vcpu_sbi_base.c +++ b/arch/riscv/kvm/vcpu_sbi_base.c @@ -41,8 +41,7 @@ static int kvm_sbi_ext_base_handler(struct kvm_vcpu *vcpu= , struct kvm_run *run, * For experimental/vendor extensions * forward it to the userspace */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); - retdata->uexit =3D true; + return kvm_riscv_vcpu_sbi_forward_handler(vcpu, run, retdata); } else { sbi_ext =3D kvm_vcpu_sbi_find_ext(vcpu, cp->a0); *out_val =3D sbi_ext && sbi_ext->probe ? @@ -72,27 +71,14 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_base = =3D { .handler =3D kvm_sbi_ext_base_handler, }; =20 -static int kvm_sbi_ext_forward_handler(struct kvm_vcpu *vcpu, - struct kvm_run *run, - struct kvm_vcpu_sbi_return *retdata) -{ - /* - * Both SBI experimental and vendor extensions are - * unconditionally forwarded to userspace. - */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); - retdata->uexit =3D true; - return 0; -} - const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental =3D { .extid_start =3D SBI_EXT_EXPERIMENTAL_START, .extid_end =3D SBI_EXT_EXPERIMENTAL_END, - .handler =3D kvm_sbi_ext_forward_handler, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, }; =20 const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor =3D { .extid_start =3D SBI_EXT_VENDOR_START, .extid_end =3D SBI_EXT_VENDOR_END, - .handler =3D kvm_sbi_ext_forward_handler, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, }; diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_re= place.c index b490ed1428a6..2c456e26f6ca 100644 --- a/arch/riscv/kvm/vcpu_sbi_replace.c +++ b/arch/riscv/kvm/vcpu_sbi_replace.c @@ -186,34 +186,9 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst = =3D { .handler =3D kvm_sbi_ext_srst_handler, }; =20 -static int kvm_sbi_ext_dbcn_handler(struct kvm_vcpu *vcpu, - struct kvm_run *run, - struct kvm_vcpu_sbi_return *retdata) -{ - struct kvm_cpu_context *cp =3D &vcpu->arch.guest_context; - unsigned long funcid =3D cp->a6; - - switch (funcid) { - case SBI_EXT_DBCN_CONSOLE_WRITE: - case SBI_EXT_DBCN_CONSOLE_READ: - case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE: - /* - * The SBI debug console functions are unconditionally - * forwarded to the userspace. - */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); - retdata->uexit =3D true; - break; - default: - retdata->err_val =3D SBI_ERR_NOT_SUPPORTED; - } - - return 0; -} - const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn =3D { .extid_start =3D SBI_EXT_DBCN, .extid_end =3D SBI_EXT_DBCN, .default_disabled =3D true, - .handler =3D kvm_sbi_ext_dbcn_handler, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, }; diff --git a/arch/riscv/kvm/vcpu_sbi_system.c b/arch/riscv/kvm/vcpu_sbi_sys= tem.c index 359be90b0fc5..c6f7e609ac79 100644 --- a/arch/riscv/kvm/vcpu_sbi_system.c +++ b/arch/riscv/kvm/vcpu_sbi_system.c @@ -47,9 +47,7 @@ static int kvm_sbi_ext_susp_handler(struct kvm_vcpu *vcpu= , struct kvm_run *run, kvm_riscv_vcpu_sbi_request_reset(vcpu, cp->a1, cp->a2); =20 /* userspace provides the suspend implementation */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); - retdata->uexit =3D true; - break; + return kvm_riscv_vcpu_sbi_forward_handler(vcpu, run, retdata); default: retdata->err_val =3D SBI_ERR_NOT_SUPPORTED; break; diff --git a/arch/riscv/kvm/vcpu_sbi_v01.c b/arch/riscv/kvm/vcpu_sbi_v01.c index 368dfddd23d9..188d5ea5b3b8 100644 --- a/arch/riscv/kvm/vcpu_sbi_v01.c +++ b/arch/riscv/kvm/vcpu_sbi_v01.c @@ -32,8 +32,7 @@ static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu,= struct kvm_run *run, * The CONSOLE_GETCHAR/CONSOLE_PUTCHAR SBI calls cannot be * handled in kernel so we forward these to user-space */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); - retdata->uexit =3D true; + ret =3D kvm_riscv_vcpu_sbi_forward_handler(vcpu, run, retdata); break; case SBI_EXT_0_1_SET_TIMER: #if __riscv_xlen =3D=3D 32 --=20 2.43.0