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Fri, 17 Oct 2025 08:59:40 -0700 (PDT) From: Anup Patel To: Atish Patra , Andrew Jones Cc: Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Paolo Bonzini , Shuah Khan , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Anup Patel Subject: [PATCH 1/4] RISC-V: KVM: Convert kvm_riscv_vcpu_sbi_forward() into extension handler Date: Fri, 17 Oct 2025 21:29:22 +0530 Message-ID: <20251017155925.361560-2-apatel@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251017155925.361560-1-apatel@ventanamicro.com> References: <20251017155925.361560-1-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" All uses of kvm_riscv_vcpu_sbi_forward() also updates retdata->uexit so to further reduce code duplication move retdata->uexit assignment to kvm_riscv_vcpu_sbi_forward() and convert it into SBI extension handler. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/include/asm/kvm_vcpu_sbi.h | 4 +++- arch/riscv/kvm/vcpu_sbi.c | 6 +++++- arch/riscv/kvm/vcpu_sbi_base.c | 20 +++----------------- arch/riscv/kvm/vcpu_sbi_replace.c | 27 +-------------------------- arch/riscv/kvm/vcpu_sbi_system.c | 4 +--- arch/riscv/kvm/vcpu_sbi_v01.c | 3 +-- 6 files changed, 14 insertions(+), 50 deletions(-) diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm= /kvm_vcpu_sbi.h index 3497489e04db..446f4a8eb3cd 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h @@ -69,7 +69,9 @@ struct kvm_vcpu_sbi_extension { unsigned long reg_size, const void *reg_val); }; =20 -void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run= ); +int kvm_riscv_vcpu_sbi_forward_handler(struct kvm_vcpu *vcpu, + struct kvm_run *run, + struct kvm_vcpu_sbi_return *retdata); void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu, struct kvm_run *run, u32 type, u64 flags); diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index 1b13623380e1..fd4106c276d8 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -120,7 +120,9 @@ static bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu= *vcpu, int idx) return sext && scontext->ext_status[sext->ext_idx] !=3D KVM_RISCV_SBI_EXT= _STATUS_UNAVAILABLE; } =20 -void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run) +int kvm_riscv_vcpu_sbi_forward_handler(struct kvm_vcpu *vcpu, + struct kvm_run *run, + struct kvm_vcpu_sbi_return *retdata) { struct kvm_cpu_context *cp =3D &vcpu->arch.guest_context; =20 @@ -137,6 +139,8 @@ void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, = struct kvm_run *run) run->riscv_sbi.args[5] =3D cp->a5; run->riscv_sbi.ret[0] =3D SBI_ERR_NOT_SUPPORTED; run->riscv_sbi.ret[1] =3D 0; + retdata->uexit =3D true; + return 0; } =20 void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu, diff --git a/arch/riscv/kvm/vcpu_sbi_base.c b/arch/riscv/kvm/vcpu_sbi_base.c index 5bc570b984f4..ca489f2dfbdf 100644 --- a/arch/riscv/kvm/vcpu_sbi_base.c +++ b/arch/riscv/kvm/vcpu_sbi_base.c @@ -41,8 +41,7 @@ static int kvm_sbi_ext_base_handler(struct kvm_vcpu *vcpu= , struct kvm_run *run, * For experimental/vendor extensions * forward it to the userspace */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); - retdata->uexit =3D true; + return kvm_riscv_vcpu_sbi_forward_handler(vcpu, run, retdata); } else { sbi_ext =3D kvm_vcpu_sbi_find_ext(vcpu, cp->a0); *out_val =3D sbi_ext && sbi_ext->probe ? @@ -72,27 +71,14 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_base = =3D { .handler =3D kvm_sbi_ext_base_handler, }; =20 -static int kvm_sbi_ext_forward_handler(struct kvm_vcpu *vcpu, - struct kvm_run *run, - struct kvm_vcpu_sbi_return *retdata) -{ - /* - * Both SBI experimental and vendor extensions are - * unconditionally forwarded to userspace. - */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); - retdata->uexit =3D true; - return 0; -} - const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental =3D { .extid_start =3D SBI_EXT_EXPERIMENTAL_START, .extid_end =3D SBI_EXT_EXPERIMENTAL_END, - .handler =3D kvm_sbi_ext_forward_handler, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, }; =20 const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor =3D { .extid_start =3D SBI_EXT_VENDOR_START, .extid_end =3D SBI_EXT_VENDOR_END, - .handler =3D kvm_sbi_ext_forward_handler, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, }; diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_re= place.c index b490ed1428a6..2c456e26f6ca 100644 --- a/arch/riscv/kvm/vcpu_sbi_replace.c +++ b/arch/riscv/kvm/vcpu_sbi_replace.c @@ -186,34 +186,9 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst = =3D { .handler =3D kvm_sbi_ext_srst_handler, }; =20 -static int kvm_sbi_ext_dbcn_handler(struct kvm_vcpu *vcpu, - struct kvm_run *run, - struct kvm_vcpu_sbi_return *retdata) -{ - struct kvm_cpu_context *cp =3D &vcpu->arch.guest_context; - unsigned long funcid =3D cp->a6; - - switch (funcid) { - case SBI_EXT_DBCN_CONSOLE_WRITE: - case SBI_EXT_DBCN_CONSOLE_READ: - case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE: - /* - * The SBI debug console functions are unconditionally - * forwarded to the userspace. - */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); - retdata->uexit =3D true; - break; - default: - retdata->err_val =3D SBI_ERR_NOT_SUPPORTED; - } - - return 0; -} - const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn =3D { .extid_start =3D SBI_EXT_DBCN, .extid_end =3D SBI_EXT_DBCN, .default_disabled =3D true, - .handler =3D kvm_sbi_ext_dbcn_handler, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, }; diff --git a/arch/riscv/kvm/vcpu_sbi_system.c b/arch/riscv/kvm/vcpu_sbi_sys= tem.c index 359be90b0fc5..c6f7e609ac79 100644 --- a/arch/riscv/kvm/vcpu_sbi_system.c +++ b/arch/riscv/kvm/vcpu_sbi_system.c @@ -47,9 +47,7 @@ static int kvm_sbi_ext_susp_handler(struct kvm_vcpu *vcpu= , struct kvm_run *run, kvm_riscv_vcpu_sbi_request_reset(vcpu, cp->a1, cp->a2); =20 /* userspace provides the suspend implementation */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); - retdata->uexit =3D true; - break; + return kvm_riscv_vcpu_sbi_forward_handler(vcpu, run, retdata); default: retdata->err_val =3D SBI_ERR_NOT_SUPPORTED; break; diff --git a/arch/riscv/kvm/vcpu_sbi_v01.c b/arch/riscv/kvm/vcpu_sbi_v01.c index 368dfddd23d9..188d5ea5b3b8 100644 --- a/arch/riscv/kvm/vcpu_sbi_v01.c +++ b/arch/riscv/kvm/vcpu_sbi_v01.c @@ -32,8 +32,7 @@ static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu,= struct kvm_run *run, * The CONSOLE_GETCHAR/CONSOLE_PUTCHAR SBI calls cannot be * handled in kernel so we forward these to user-space */ - kvm_riscv_vcpu_sbi_forward(vcpu, run); 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charset="utf-8" Add a separate source vcpu_sbi_forward.c for SBI extensions which are entirely forwarded to KVM user-space. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/kvm/Makefile | 1 + arch/riscv/kvm/vcpu_sbi_base.c | 12 ------------ arch/riscv/kvm/vcpu_sbi_forward.c | 27 +++++++++++++++++++++++++++ arch/riscv/kvm/vcpu_sbi_replace.c | 7 ------- 4 files changed, 28 insertions(+), 19 deletions(-) create mode 100644 arch/riscv/kvm/vcpu_sbi_forward.c diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile index 07197395750e..3b8afb038b35 100644 --- a/arch/riscv/kvm/Makefile +++ b/arch/riscv/kvm/Makefile @@ -27,6 +27,7 @@ kvm-y +=3D vcpu_onereg.o kvm-$(CONFIG_RISCV_PMU_SBI) +=3D vcpu_pmu.o kvm-y +=3D vcpu_sbi.o kvm-y +=3D vcpu_sbi_base.o +kvm-y +=3D vcpu_sbi_forward.o kvm-y +=3D vcpu_sbi_fwft.o kvm-y +=3D vcpu_sbi_hsm.o kvm-$(CONFIG_RISCV_PMU_SBI) +=3D vcpu_sbi_pmu.o diff --git a/arch/riscv/kvm/vcpu_sbi_base.c b/arch/riscv/kvm/vcpu_sbi_base.c index ca489f2dfbdf..06fdd5f69364 100644 --- a/arch/riscv/kvm/vcpu_sbi_base.c +++ b/arch/riscv/kvm/vcpu_sbi_base.c @@ -70,15 +70,3 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_base = =3D { .extid_end =3D SBI_EXT_BASE, .handler =3D kvm_sbi_ext_base_handler, }; - -const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental =3D { - .extid_start =3D SBI_EXT_EXPERIMENTAL_START, - .extid_end =3D SBI_EXT_EXPERIMENTAL_END, - .handler =3D kvm_riscv_vcpu_sbi_forward_handler, -}; - -const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor =3D { - .extid_start =3D SBI_EXT_VENDOR_START, - .extid_end =3D SBI_EXT_VENDOR_END, - .handler =3D kvm_riscv_vcpu_sbi_forward_handler, -}; diff --git a/arch/riscv/kvm/vcpu_sbi_forward.c b/arch/riscv/kvm/vcpu_sbi_fo= rward.c new file mode 100644 index 000000000000..dbfa70c2c775 --- /dev/null +++ b/arch/riscv/kvm/vcpu_sbi_forward.c @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2025 Ventana Micro Systems Inc. + */ + +#include +#include +#include + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental =3D { + .extid_start =3D SBI_EXT_EXPERIMENTAL_START, + .extid_end =3D SBI_EXT_EXPERIMENTAL_END, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, +}; + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor =3D { + .extid_start =3D SBI_EXT_VENDOR_START, + .extid_end =3D SBI_EXT_VENDOR_END, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, +}; + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn =3D { + .extid_start =3D SBI_EXT_DBCN, + .extid_end =3D SBI_EXT_DBCN, + .default_disabled =3D true, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, +}; diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_re= place.c index 2c456e26f6ca..506a510b6bff 100644 --- a/arch/riscv/kvm/vcpu_sbi_replace.c +++ b/arch/riscv/kvm/vcpu_sbi_replace.c @@ -185,10 +185,3 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst = =3D { .extid_end =3D SBI_EXT_SRST, .handler =3D kvm_sbi_ext_srst_handler, }; - -const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn =3D { - .extid_start =3D SBI_EXT_DBCN, - .extid_end =3D SBI_EXT_DBCN, - .default_disabled =3D true, - .handler =3D kvm_riscv_vcpu_sbi_forward_handler, -}; --=20 2.43.0 From nobody Sat Feb 7 19:08:33 2026 Received: from mail-pg1-f170.google.com (mail-pg1-f170.google.com [209.85.215.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 715E8336EDC for ; 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charset="utf-8" The SBI MPXY extension is a platform-level functionality so KVM only needs to forward SBI MPXY calls to KVM user-space. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 + arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu_sbi.c | 4 ++++ arch/riscv/kvm/vcpu_sbi_forward.c | 7 +++++++ 4 files changed, 13 insertions(+) diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm= /kvm_vcpu_sbi.h index 446f4a8eb3cd..c1a7e3b40d9c 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h @@ -107,6 +107,7 @@ extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext= _dbcn; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_susp; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_fwft; +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_mpxy; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor; =20 diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/as= m/kvm.h index 759a4852c09a..37213d86c0d1 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -211,6 +211,7 @@ enum KVM_RISCV_SBI_EXT_ID { KVM_RISCV_SBI_EXT_STA, KVM_RISCV_SBI_EXT_SUSP, KVM_RISCV_SBI_EXT_FWFT, + KVM_RISCV_SBI_EXT_MPXY, KVM_RISCV_SBI_EXT_MAX, }; =20 diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index fd4106c276d8..46ab7b989432 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -82,6 +82,10 @@ static const struct kvm_riscv_sbi_extension_entry sbi_ex= t[] =3D { .ext_idx =3D KVM_RISCV_SBI_EXT_FWFT, .ext_ptr =3D &vcpu_sbi_ext_fwft, }, + { + .ext_idx =3D KVM_RISCV_SBI_EXT_MPXY, + .ext_ptr =3D &vcpu_sbi_ext_mpxy, + }, { .ext_idx =3D KVM_RISCV_SBI_EXT_EXPERIMENTAL, .ext_ptr =3D &vcpu_sbi_ext_experimental, diff --git a/arch/riscv/kvm/vcpu_sbi_forward.c b/arch/riscv/kvm/vcpu_sbi_fo= rward.c index dbfa70c2c775..5a3c75eb23c5 100644 --- a/arch/riscv/kvm/vcpu_sbi_forward.c +++ b/arch/riscv/kvm/vcpu_sbi_forward.c @@ -25,3 +25,10 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn = =3D { .default_disabled =3D true, .handler =3D kvm_riscv_vcpu_sbi_forward_handler, }; + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_mpxy =3D { + .extid_start =3D SBI_EXT_MPXY, + .extid_end =3D SBI_EXT_MPXY, + .default_disabled =3D true, + .handler =3D kvm_riscv_vcpu_sbi_forward_handler, +}; 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Fri, 17 Oct 2025 08:59:53 -0700 (PDT) From: Anup Patel To: Atish Patra , Andrew Jones Cc: Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Paolo Bonzini , Shuah Khan , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Anup Patel Subject: [PATCH 4/4] KVM: riscv: selftests: Add SBI MPXY extension to get-reg-list Date: Fri, 17 Oct 2025 21:29:25 +0530 Message-ID: <20251017155925.361560-5-apatel@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251017155925.361560-1-apatel@ventanamicro.com> References: <20251017155925.361560-1-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The KVM RISC-V allows SBI MPXY extensions for Guest/VM so add it to the get-reg-list test. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testi= ng/selftests/kvm/riscv/get-reg-list.c index 705ab3d7778b..cb54a56990a0 100644 --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c @@ -133,6 +133,7 @@ bool filter_reg(__u64 reg) case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT= _SUSP: case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT= _STA: case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT= _FWFT: + case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT= _MPXY: case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT= _EXPERIMENTAL: case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT= _VENDOR: return true; @@ -639,6 +640,7 @@ static const char *sbi_ext_single_id_to_str(__u64 reg_o= ff) KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_SUSP), KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_STA), KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_FWFT), + KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_MPXY), KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_EXPERIMENTAL), KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_VENDOR), }; @@ -1142,6 +1144,7 @@ KVM_SBI_EXT_SUBLIST_CONFIG(sta, STA); KVM_SBI_EXT_SIMPLE_CONFIG(pmu, PMU); KVM_SBI_EXT_SIMPLE_CONFIG(dbcn, DBCN); KVM_SBI_EXT_SIMPLE_CONFIG(susp, SUSP); +KVM_SBI_EXT_SIMPLE_CONFIG(mpxy, MPXY); KVM_SBI_EXT_SUBLIST_CONFIG(fwft, FWFT); =20 KVM_ISA_EXT_SUBLIST_CONFIG(aia, AIA); @@ -1222,6 +1225,7 @@ struct vcpu_reg_list *vcpu_configs[] =3D { &config_sbi_pmu, &config_sbi_dbcn, &config_sbi_susp, + &config_sbi_mpxy, &config_sbi_fwft, &config_aia, &config_fp_f, --=20 2.43.0