From nobody Sun Dec 14 11:33:43 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 623313126C1; Fri, 17 Oct 2025 06:50:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760683849; cv=none; b=tU6Pb0VI/1diG4BFuv3yq9S9W7MSsRxnVmAPojEQ7hwfPic3Iwi8Uy8PLh7TsV+jn545eWkl6hH1hd3QeST90a2PvKJC67AzVWRiZDebI4YqAHKIpVprLe56XubMxngx65qAFi8kQ8jb7Cxeb/eMBFAqDjXITJ3p8+91PTggHNE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760683849; c=relaxed/simple; bh=hPliVi4TV3ZDk8v5+3UlNYep2zkWa37iiYisdRqqbQk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QUXkV4rjJFygsRHhJxm2nvFJu0SsOcFHiOiHcfJJAM0zbKw5HfizZ5Fup4ITfgeGiUBClzDcpxkM5ndqSJhJSpfp5Hs7j0zGPguxjnnAz8jwd7BQTXWS8AclzbbRRqomDc3AH0VLKunCafYzhJaC5MC5dvcG+C5RJweyDe4dJPM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=qe2zc1k+; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="qe2zc1k+" X-UUID: 93d12396ab2511f0b33aeb1e7f16c2b6-20251017 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Enpj9fYg7Kdz2Uum8sy0T+MgG0vANtu/HY+5vlKFnNI=; b=qe2zc1k+o0jHzv9ZYxuT8zZUDucGlA4qn9ZQ7CdLhfObkK88N/852b6xG3Bb2zlthhTZDb2d9Q6rXZIq9eJXdigZI/FiUpEvqJK4Wt2G2tJ+hxWY0BkjYzjeMY2btrP45QLn0qrZT1iYt4bvnNS5S3jmLEXY7blEdrSgctk1lok=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.6,REQID:791a9873-d437-4262-89c3-df15e9ff55d6,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:a9d874c,CLOUDID:fbd95086-2e17-44e4-a09c-1e463bf6bc47,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0, OSI:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 93d12396ab2511f0b33aeb1e7f16c2b6-20251017 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1627250229; Fri, 17 Oct 2025 14:50:33 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Fri, 17 Oct 2025 14:50:31 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Fri, 17 Oct 2025 14:50:31 +0800 From: Jason-JH Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jassi Brar , Chun-Kuang Hu , AngeloGioacchino Del Regno , Mauro Carvalho Chehab CC: Matthias Brugger , Nicolas Dufresne , Jason-JH Lin , Nancy Lin , Singo Chang , "Paul-PL Chen" , Moudy Ho , "Xiandong Wang" , Sirius Wang , Fei Shao , Chen-yu Tsai , , , , , , , Subject: [PATCH v8 12/20] soc: mediatek: Use reg_write function pointer for subsys ID compatibility Date: Fri, 17 Oct 2025 14:44:37 +0800 Message-ID: <20251017065028.1676930-13-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20251017065028.1676930-1-jason-jh.lin@mediatek.com> References: <20251017065028.1676930-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Switch to reg_write and reg_write_mask function pointers for register access, enabling compatibility with platforms regardless of subsys ID support. Signed-off-by: Jason-JH Lin Reviewed-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-mmsys.c | 8 +++++--- drivers/soc/mediatek/mtk-mutex.c | 5 +++-- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mm= sys.c index bb4639ca0b8c..5d3a9bbfda79 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -167,9 +167,11 @@ static void mtk_mmsys_update_bits(struct mtk_mmsys *mm= sys, u32 offset, u32 mask, u32 tmp; =20 if (mmsys->cmdq_base.size && cmdq_pkt) { - ret =3D cmdq_pkt_write_mask(cmdq_pkt, mmsys->cmdq_base.subsys, - mmsys->cmdq_base.offset + offset, val, - mask); + ret =3D mmsys->cmdq_base.reg_write_mask(cmdq_pkt, + mmsys->cmdq_base.subsys, + mmsys->cmdq_base.pa_base, + mmsys->cmdq_base.offset + offset, + val, mask); if (ret) pr_debug("CMDQ unavailable: using CPU write\n"); else diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mu= tex.c index 38179e8cd98f..bb42ad5ee8ca 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -990,6 +990,7 @@ int mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, v= oid *pkt) struct mtk_mutex_ctx *mtx =3D container_of(mutex, struct mtk_mutex_ctx, mutex[mutex->id]); struct cmdq_pkt *cmdq_pkt =3D (struct cmdq_pkt *)pkt; + dma_addr_t en_addr =3D mtx->addr + DISP_REG_MUTEX_EN(mutex->id); =20 WARN_ON(&mtx->mutex[mutex->id] !=3D mutex); =20 @@ -998,8 +999,8 @@ int mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, v= oid *pkt) return -ENODEV; } =20 - cmdq_pkt_write(cmdq_pkt, mtx->cmdq_reg.subsys, - mtx->addr + DISP_REG_MUTEX_EN(mutex->id), 1); + mtx->cmdq_reg.reg_write(cmdq_pkt, mtx->cmdq_reg.subsys, en_addr, en_addr,= 1); + return 0; } EXPORT_SYMBOL_GPL(mtk_mutex_enable_by_cmdq); --=20 2.43.0