From nobody Tue Feb 10 20:07:25 2026 Received: from mail-pl1-f182.google.com (mail-pl1-f182.google.com [209.85.214.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC23E2DF15A for ; Thu, 16 Oct 2025 20:26:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760646366; cv=none; b=AKyZtQ3PW2Bq1m3Ma3HZhEZF03IOkT6wCd3ksiqTMMHRnUSShPWA9+fiJgr2OQkKrD+bb6caGN+rHjNgZEhk/givMmEwRUDaxNvuO9Zs9b5bRVpmfnvLUN00D6XOJ7NAL+Q3KOzAMgHRZs73fefKMoIgabQ78N2Gp4s2uywv1RQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760646366; c=relaxed/simple; bh=blukffs3PEjdMDkOjtWNNyst69kGeFtVJ5IXmWODKlA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=F7zaaAppzaNsCcoMrfxcWlcaHiTZeR9n5NOv5oxG79MiGbwn/sakkuUNcf5o1akvlURYR0EH62JoBL5N5D/IYCqVbPTxX0i9r/gTyAaVbPGATYUvXo/pP4ZWk5vgyqdWcO1KR0i11mW5V1jjPib788bUThOZZvBvtb12Jb6vYCM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=fXXHMa4G; arc=none smtp.client-ip=209.85.214.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fXXHMa4G" Received: by mail-pl1-f182.google.com with SMTP id d9443c01a7336-290cd62acc3so4068115ad.2 for ; Thu, 16 Oct 2025 13:26:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760646364; x=1761251164; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CVXyTW0fp2Mu9ubWrDhAkDdslHX77ctIs4Eeauu0GUM=; b=fXXHMa4GRy/ovVV26eEpysVNG8eb6t0f2oqTGotkArJEc1lnaVuxzkgn5Xu0W5Izjl 6atD9dHWn1Jrhx+r0i2Ej6vXNpmdFIY+tUAeWlJZTk/ir/HsZOblxErUnDvpKv+gJyD5 XcWL4YFJRPzpVXhjBdwLiB2xgliTCr1N5Ke5q3wdA8mX3OtxpLJDypCP+/UhvVVxfUwH 7M55bNltMpQQKffui40180j0KyZoC5Na0t63LZLLH/31xulHLMwaxsV5BQKXCmXH30W6 sOEpTUDsj4YCmKZWV5GTcm8gojMmK06vDCVE55jkWz/nVsLzgu9FKjekIYfXbdipS2t8 Xgjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760646364; x=1761251164; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CVXyTW0fp2Mu9ubWrDhAkDdslHX77ctIs4Eeauu0GUM=; b=dFGMSIAfRX3HOfnobLvE0Qv0kN6WQ6Tixmfs3LlHOOjGDhA5HyWufJ6fT65I6+ECrG 4P2FAZmlAKuRMzFfjGp9jqTvuDoQHk7MS8y0Sqg2t8Jq+2CeGUdS24I7XdNDqf4MC8K7 12NrXCAbDeTWx7GZAAya+w0VuwhcYGXJcf865XAvHTwlsInqkYC6hKcgaZU/jXqpjqGL JjGoAxBN8bH7Zd70nIWcQAOC9h63fQJt0umuu0vSFYFcXslcNODUXX4oW0QgoWJlwfO7 xT4VqTVMUCQ/fx8+znRQfBoDIFz4esEp+qSQtdQ5tvaNJrpMlzrD82aGfx5JJrQ2EzPE rPew== X-Forwarded-Encrypted: i=1; AJvYcCWTfXnGvgi5D0RFteAsWnKBo3q6mZ9nnAPsFxeTADHoAdf0sk+cHmESZfExOeynWJ/ToxZyHaT9qHD7C/M=@vger.kernel.org X-Gm-Message-State: AOJu0YzH1WMhfP19MrJg1cT+a38Lf/HtTixXVKlXh4j+1QXbrYHKwDhK YlDG+BE79bZjyIpY2rV+oDmqIQQCmL3ERI/YMtUe+zEfAxFKn3dRTwap X-Gm-Gg: ASbGncuAEWaJzwpkyJVfcPZ0mO+jTYdY5dudp2aRFzkrNh1+Q5xncMLgV6bep0INiqx crzjHkZDqDPLhDYO3/cGKPVlC/pcfpAbLqsF5kBBSvbXmIOyxgvNtt1Z0Uq5deod2VLTDrghXRp 0BVHd9+S82gANXdvjqKOveOkklBOC9VNvIyJEzHK+5XI9SOWKW6M4Qtm7J8aWLLlpdbkDwVF/SD oAQjlKxDWcY/OdTB51vWDLS8k8WrvFza0cvjM0EIe7YqIk+a8OtucrTMvyHVxe7bBCFQGyDSaHx iUO11NSEg9pQBuTig5QsJ4sU04JDTsfRx5cmXwlBpFP78pqBMuHsijY0P80HLnx9yi7DWUo3k48 7DZMxOqwLQ3Vo6G+fz5al+lefHOyalYbItBKsbny66pfP34l/0WpiBTEzYDmvStGQFKvWmP3jEF FKgCdsgCvAfWH+Q0ljoW8JaFX+EGzNBpyQ X-Google-Smtp-Source: AGHT+IEyEt+z7bIWUVRV5f6bAgL2H6dKwwtlJ6MIFQwPJ73RjP4OwSH06A8pBK+5wRG4l0pZKpRmyQ== X-Received: by 2002:a17:903:2341:b0:290:cd9c:1229 with SMTP id d9443c01a7336-290cd9c12aemr10731655ad.19.1760646363884; Thu, 16 Oct 2025 13:26:03 -0700 (PDT) Received: from iku.. ([2401:4900:1c07:c7d3:a396:54ac:a48f:c314]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29099af9131sm39577735ad.103.2025.10.16.13.25.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Oct 2025 13:26:03 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 4/5] arm64: dts: renesas: r9a09g087: Add GMAC nodes Date: Thu, 16 Oct 2025 21:21:28 +0100 Message-ID: <20251016202129.157614-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251016202129.157614-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20251016202129.157614-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Add Ethernet MAC (GMAC) device nodes to the RZ/N2H (R9A09G087) SoC DTSI. The RZ/T2H integrates three GMAC interfaces based on the Synopsys DesignWare MAC (version 5.20). Signed-off-by: Lad Prabhakar --- arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 448 +++++++++++++++++++++ 1 file changed, 448 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g087.dtsi index 882570622486..780927b0174d 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi @@ -270,6 +270,447 @@ i2c2: i2c@81008000 { status =3D "disabled"; }; =20 + gmac0: ethernet@80100000 { + compatible =3D "renesas,r9a09g087-gbeth", "renesas,r9a09g077-gbeth", + "snps,dwmac-5.20"; + reg =3D <0 0x80100000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "macirq", "eth_wake_irq", "eth_lpi", + "rx-queue-0", "rx-queue-1", "rx-queue-2", + "rx-queue-3", "rx-queue-4", "rx-queue-5", + "rx-queue-6", "rx-queue-7", "tx-queue-0", + "tx-queue-1", "tx-queue-2", "tx-queue-3", + "tx-queue-4", "tx-queue-5", "tx-queue-6", + "tx-queue-7"; + clocks =3D <&cpg CPG_MOD 400>, + <&cpg CPG_CORE R9A09G087_CLK_PCLKH>, + <&cpg CPG_CORE R9A09G087_ETCLKB>; + clock-names =3D "stmmaceth", "pclk", "tx"; + resets =3D <&cpg 400>, <&cpg 401>; + reset-names =3D "stmmaceth", "ahb"; + power-domains =3D <&cpg>; + snps,multicast-filter-bins =3D <256>; + snps,perfect-filter-entries =3D <32>; + rx-fifo-depth =3D <8192>; + tx-fifo-depth =3D <8192>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,mtl-rx-config =3D <&mtl_rx_setup0>; + snps,mtl-tx-config =3D <&mtl_tx_setup0>; + snps,txpbl =3D <16>; + snps,rxpbl =3D <16>; + status =3D "disabled"; + + mdio0: mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mtl_rx_setup0: rx-queues-config { + snps,rx-queues-to-use =3D <8>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + snps,map-to-dma-channel =3D <0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority =3D <0x2>; + snps,map-to-dma-channel =3D <1>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority =3D <0x4>; + snps,map-to-dma-channel =3D <2>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority =3D <0x8>; + snps,map-to-dma-channel =3D <3>; + }; + + queue4 { + snps,dcb-algorithm; + snps,priority =3D <0x10>; + snps,map-to-dma-channel =3D <4>; + }; + + queue5 { + snps,dcb-algorithm; + snps,priority =3D <0x20>; + snps,map-to-dma-channel =3D <5>; + }; + + queue6 { + snps,dcb-algorithm; + snps,priority =3D <0x40>; + snps,map-to-dma-channel =3D <6>; + }; + + queue7 { + snps,dcb-algorithm; + snps,priority =3D <0x80>; + snps,map-to-dma-channel =3D <7>; + }; + }; + + mtl_tx_setup0: tx-queues-config { + snps,tx-queues-to-use =3D <8>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,dcb-algorithm; + }; + + queue3 { + snps,dcb-algorithm; + }; + + queue4 { + snps,dcb-algorithm; + }; + + queue5 { + snps,dcb-algorithm; + }; + + queue6 { + snps,dcb-algorithm; + }; + + queue7 { + snps,dcb-algorithm; + }; + }; + }; + + gmac1: ethernet@92000000 { + compatible =3D "renesas,r9a09g087-gbeth", "renesas,r9a09g077-gbeth", + "snps,dwmac-5.20"; + reg =3D <0 0x92000000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "macirq", "eth_wake_irq", "eth_lpi", + "rx-queue-0", "rx-queue-1", "rx-queue-2", + "rx-queue-3", "rx-queue-4", "rx-queue-5", + "rx-queue-6", "rx-queue-7", "tx-queue-0", + "tx-queue-1", "tx-queue-2", "tx-queue-3", + "tx-queue-4", "tx-queue-5", "tx-queue-6", + "tx-queue-7"; + clocks =3D <&cpg CPG_MOD 416>, + <&cpg CPG_CORE R9A09G087_CLK_PCLKAH>, + <&cpg CPG_CORE R9A09G087_ETCLKB>; + clock-names =3D "stmmaceth", "pclk", "tx"; + resets =3D <&cpg 416>, <&cpg 417>; + reset-names =3D "stmmaceth", "ahb"; + power-domains =3D <&cpg>; + snps,multicast-filter-bins =3D <256>; + snps,perfect-filter-entries =3D <32>; + rx-fifo-depth =3D <8192>; + tx-fifo-depth =3D <8192>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,mtl-rx-config =3D <&mtl_rx_setup1>; + snps,mtl-tx-config =3D <&mtl_tx_setup1>; + snps,txpbl =3D <16>; + snps,rxpbl =3D <16>; + status =3D "disabled"; + + mdio1: mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mtl_rx_setup1: rx-queues-config { + snps,rx-queues-to-use =3D <8>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + snps,map-to-dma-channel =3D <0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority =3D <0x2>; + snps,map-to-dma-channel =3D <1>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority =3D <0x4>; + snps,map-to-dma-channel =3D <2>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority =3D <0x8>; + snps,map-to-dma-channel =3D <3>; + }; + + queue4 { + snps,dcb-algorithm; + snps,priority =3D <0x10>; + snps,map-to-dma-channel =3D <4>; + }; + + queue5 { + snps,dcb-algorithm; + snps,priority =3D <0x20>; + snps,map-to-dma-channel =3D <5>; + }; + + queue6 { + snps,dcb-algorithm; + snps,priority =3D <0x40>; + snps,map-to-dma-channel =3D <6>; + }; + + queue7 { + snps,dcb-algorithm; + snps,priority =3D <0x80>; + snps,map-to-dma-channel =3D <7>; + }; + }; + + mtl_tx_setup1: tx-queues-config { + snps,tx-queues-to-use =3D <8>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,dcb-algorithm; + }; + + queue3 { + snps,dcb-algorithm; + }; + + queue4 { + snps,dcb-algorithm; + }; + + queue5 { + snps,dcb-algorithm; + }; + + queue6 { + snps,dcb-algorithm; + }; + + queue7 { + snps,dcb-algorithm; + }; + }; + }; + + gmac2: ethernet@92010000 { + compatible =3D "renesas,r9a09g087-gbeth", "renesas,r9a09g077-gbeth", + "snps,dwmac-5.20"; + reg =3D <0 0x92010000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "macirq", "eth_wake_irq", "eth_lpi", + "rx-queue-0", "rx-queue-1", "rx-queue-2", + "rx-queue-3", "rx-queue-4", "rx-queue-5", + "rx-queue-6", "rx-queue-7", "tx-queue-0", + "tx-queue-1", "tx-queue-2", "tx-queue-3", + "tx-queue-4", "tx-queue-5", "tx-queue-6", + "tx-queue-7"; + clocks =3D <&cpg CPG_MOD 417>, + <&cpg CPG_CORE R9A09G087_CLK_PCLKAH>, + <&cpg CPG_CORE R9A09G087_ETCLKB>; + clock-names =3D "stmmaceth", "pclk", "tx"; + resets =3D <&cpg 418>, <&cpg 419>; + reset-names =3D "stmmaceth", "ahb"; + power-domains =3D <&cpg>; + snps,multicast-filter-bins =3D <256>; + snps,perfect-filter-entries =3D <32>; + rx-fifo-depth =3D <8192>; + tx-fifo-depth =3D <8192>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,mtl-rx-config =3D <&mtl_rx_setup2>; + snps,mtl-tx-config =3D <&mtl_tx_setup2>; + snps,txpbl =3D <16>; + snps,rxpbl =3D <16>; + status =3D "disabled"; + + mdio2: mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mtl_rx_setup2: rx-queues-config { + snps,rx-queues-to-use =3D <8>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + snps,map-to-dma-channel =3D <0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority =3D <0x2>; + snps,map-to-dma-channel =3D <1>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority =3D <0x4>; + snps,map-to-dma-channel =3D <2>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority =3D <0x8>; + snps,map-to-dma-channel =3D <3>; + }; + + queue4 { + snps,dcb-algorithm; + snps,priority =3D <0x10>; + snps,map-to-dma-channel =3D <4>; + }; + + queue5 { + snps,dcb-algorithm; + snps,priority =3D <0x20>; + snps,map-to-dma-channel =3D <5>; + }; + + queue6 { + snps,dcb-algorithm; + snps,priority =3D <0x40>; + snps,map-to-dma-channel =3D <6>; + }; + + queue7 { + snps,dcb-algorithm; + snps,priority =3D <0x80>; + snps,map-to-dma-channel =3D <7>; + }; + }; + + mtl_tx_setup2: tx-queues-config { + snps,tx-queues-to-use =3D <8>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,dcb-algorithm; + }; + + queue3 { + snps,dcb-algorithm; + }; + + queue4 { + snps,dcb-algorithm; + }; + + queue5 { + snps,dcb-algorithm; + }; + + queue6 { + snps,dcb-algorithm; + }; + + queue7 { + snps,dcb-algorithm; + }; + }; + }; + ethss: ethss@80110000 { compatible =3D "renesas,r9a09g087-miic", "renesas,r9a09g077-miic"; reg =3D <0 0x80110000 0 0x10000>; @@ -429,6 +870,13 @@ sdhi1_vqmmc: vqmmc-regulator { }; }; =20 + stmmac_axi_setup: stmmac-axi-config { + snps,lpi_en; + snps,wr_osr_lmt =3D <0xf>; + snps,rd_osr_lmt =3D <0xf>; + snps,blen =3D <16 8 4 0 0 0 0>; + }; + timer { compatible =3D "arm,armv8-timer"; interrupts =3D , --=20 2.43.0