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[93.34.92.177]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4711435b06fsm39973125e9.0.2025.10.16.08.20.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Oct 2025 08:20:18 -0700 (PDT) From: Christian Marangi To: Christian Marangi , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Frank Wunderlich Subject: [net-next PATCH] net: phy: as21xxx: fill in inband caps and better handle inband Date: Thu, 16 Oct 2025 17:20:07 +0200 Message-ID: <20251016152013.4004-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" It was reported that it's possible to enable inband by not enabling DPC_RA on a Banana Pi R4 Pro (MT7988a). This was also confirmed on an Airoha SoC (AN7583) to make sure we are not facing some internal workaround with the USXGMII PCS. (on the Airoha SoC the PCS is configured to enable AN when inband is enabled and to disable AN when it's disabled) With this new information, fill in the .inband_caps() OP and set the .config_inband() to enable DPC_RA when inband is enabled. Tested-by: Frank Wunderlich Signed-off-by: Christian Marangi --- drivers/net/phy/as21xxx.c | 43 +++++++++++++++++++++++++++++++++------ 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/as21xxx.c b/drivers/net/phy/as21xxx.c index 005277360656..2dd808186642 100644 --- a/drivers/net/phy/as21xxx.c +++ b/drivers/net/phy/as21xxx.c @@ -625,12 +625,8 @@ static int as21xxx_probe(struct phy_device *phydev) return ret; =20 /* Enable PTP clk if not already Enabled */ - ret =3D phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PTP_CLK, - VEND1_PTP_CLK_EN); - if (ret) - return ret; - - return aeon_dpc_ra_enable(phydev); + return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PTP_CLK, + VEND1_PTP_CLK_EN); } =20 static int as21xxx_read_link(struct phy_device *phydev, int *bmcr) @@ -943,6 +939,21 @@ static int as21xxx_match_phy_device(struct phy_device = *phydev, return ret; } =20 +static unsigned int as21xxx_inband_caps(struct phy_device *phydev, + phy_interface_t interface) +{ + return LINK_INBAND_ENABLE | LINK_INBAND_DISABLE; +} + +static int as21xxx_config_inband(struct phy_device *phydev, + unsigned int modes) +{ + if (modes =3D=3D LINK_INBAND_ENABLE) + return aeon_dpc_ra_enable(phydev); + + return 0; +} + static struct phy_driver as21xxx_drivers[] =3D { { /* PHY expose in C45 as 0x7500 0x9410 @@ -958,6 +969,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21011JB1), .name =3D "Aeonsemi AS21011JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -970,6 +983,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21011PB1), .name =3D "Aeonsemi AS21011PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -982,6 +997,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21010PB1), .name =3D "Aeonsemi AS21010PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -994,6 +1011,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21010JB1), .name =3D "Aeonsemi AS21010JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1006,6 +1025,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21210PB1), .name =3D "Aeonsemi AS21210PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1018,6 +1039,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21510JB1), .name =3D "Aeonsemi AS21510JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1030,6 +1053,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21510PB1), .name =3D "Aeonsemi AS21510PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1042,6 +1067,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21511JB1), .name =3D "Aeonsemi AS21511JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1054,6 +1081,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21210JB1), .name =3D "Aeonsemi AS21210JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1066,6 +1095,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21511PB1), .name =3D "Aeonsemi AS21511PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, --=20 2.51.0