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(unknown [117.184.129.134]) by smtp.qiye.163.com (Hmail) with ESMTP id 26265956d; Thu, 16 Oct 2025 20:06:32 +0800 (GMT+08:00) From: Albert Yang To: krzysztof.kozlowski@linaro.org Cc: krzk+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, robh@kernel.org, conor+dt@kernel.org, gordon.ge@bst.ai, bst-upstream@bstai.top, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ulf.hansson@linaro.org, Albert Yang Subject: [PATCH v5 1/6] dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd. Date: Thu, 16 Oct 2025 20:05:53 +0800 Message-ID: <20251016120558.2390960-2-yangzh0906@thundersoft.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251016120558.2390960-1-yangzh0906@thundersoft.com> References: <20251016120558.2390960-1-yangzh0906@thundersoft.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a99ecea25f909cckunm98a0ee06127c2 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDGksYVk8eHk1NSUIYSBpIQlYVFAkWGhdVEwETFh oSFyQUDg9ZV1kYEgtZQVlKSkxVSkNPVUpJQlVKSE9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0hVSk tLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=FodpsulKPDCojROvxcmY+iPnfkF4JJ9ME0qd+d0MRzFR3+H6WIgnsH+m2DBgq2v3xZSWruB6bQv3LEHkoTSWKSNyN7qofdkflZrcC3MednsbPRKPtOVE8thuMLi+ZSxsdfg3vR5ge4dUaDs0FwNVGV+2rq91WCU0vCmiZIpnxy0=; s=default; c=relaxed/relaxed; d=thundersoft.com; v=1; bh=zdMLkxCMdwv/ZcvRRwqvZ+qNQlbpWZA9E5mCTIh0Tkc=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Black Sesame Technologies Co., Ltd.s a leading automotive-grade computing SoC and SoC-based intelligent vehicle solution provider. Link: https://bst.ai/. Signed-off-by: Albert Yang Acked-by: Rob Herring (Arm) --- Changes for v4: - adjust ^bst to the correct order - adjust Acked-by order Changes for v3: - No changes Changes for v2: - No changes --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index f1d1882009ba..df0a50b5437b 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -251,6 +251,8 @@ patternProperties: description: Shanghai Broadmobi Communication Technology Co.,Ltd. "^bsh,.*": description: BSH Hausgeraete GmbH + "^bst,.*": + description: Black Sesame Technologies Co., Ltd. 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(unknown [117.184.129.134]) by smtp.qiye.163.com (Hmail) with ESMTP id 262659574; Thu, 16 Oct 2025 20:06:38 +0800 (GMT+08:00) From: Albert Yang To: krzysztof.kozlowski@linaro.org Cc: krzk+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, robh@kernel.org, conor+dt@kernel.org, gordon.ge@bst.ai, bst-upstream@bstai.top, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ulf.hansson@linaro.org, Albert Yang Subject: [PATCH v5 2/6] dt-bindings: arm: add Black Sesame Technologies (bst) SoC Date: Thu, 16 Oct 2025 20:05:54 +0800 Message-ID: <20251016120558.2390960-3-yangzh0906@thundersoft.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251016120558.2390960-1-yangzh0906@thundersoft.com> References: <20251016120558.2390960-1-yangzh0906@thundersoft.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a99ecea3e7a09cckunm98a0ee061280b X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkZGUsdVhhNSxgdTB9DGUpOS1YVFAkWGhdVEwETFh oSFyQUDg9ZV1kYEgtZQVlKSkxVSkNPVUpJQlVKSE9ZV1kWGg8SFR0UWUFZS1VLVUtVS1kG DKIM-Signature: a=rsa-sha256; b=gQZgT24dLafZ0wtBTI/xdqlPQqA/oN6PKgq6gTMMYkqZLtOuxZ+pNO00xRwkpCEhoGOd8Oz2h4iECvHJoB8XMI7urAdJeW8VbLu6UpGTZclUAKWZXjJn1Qdf66pZVys+zfx6r6pK1eeqrrensFiCl9B+Es9IZzcqEoLMFDN830c=; s=default; c=relaxed/relaxed; d=thundersoft.com; v=1; bh=jBtr7NWOPJPUwSTeOF3xwmtWuKgb5Cl9ajBvDMjXoAE=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add device tree bindings for Black Sesame Technologies Arm SoC, it consists several SoC models like C1200, etc. Signed-off-by: Albert Yang Reviewed-by: Krzysztof Kozlowski --- Changes for v4: - remove Signed-off-by: Ge Gordon - add Reviewed-by Krzysztof Kozlowski info Changes for v3: - Add Signed-off-by: Ge Gordon Changes for v2: - Removed unnecessary pipe (`|`) in description - Dropped invalid `compatible` entry for standalone SoC - Removed root node (`$nodename: '/'`) definition --- .../devicetree/bindings/arm/bst.yaml | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/bst.yaml diff --git a/Documentation/devicetree/bindings/arm/bst.yaml b/Documentation= /devicetree/bindings/arm/bst.yaml new file mode 100644 index 000000000000..a3a7f424fd57 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bst.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bst.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: BST platforms + +description: + Black Sesame Technologies (BST) is a semiconductor company that produces + automotive-grade system-on-chips (SoCs) for intelligent driving, focusing + on computer vision and AI capabilities. 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(unknown [117.184.129.134]) by smtp.qiye.163.com (Hmail) with ESMTP id 26265957a; Thu, 16 Oct 2025 20:06:42 +0800 (GMT+08:00) From: Albert Yang To: krzysztof.kozlowski@linaro.org Cc: krzk+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, robh@kernel.org, conor+dt@kernel.org, gordon.ge@bst.ai, bst-upstream@bstai.top, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ulf.hansson@linaro.org, Albert Yang Subject: [PATCH v5 3/6] arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs Date: Thu, 16 Oct 2025 20:05:55 +0800 Message-ID: <20251016120558.2390960-4-yangzh0906@thundersoft.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251016120558.2390960-1-yangzh0906@thundersoft.com> References: <20251016120558.2390960-1-yangzh0906@thundersoft.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a99ecea4cb109cckunm98a0ee061283a X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkZSx9IVkpDHxhCTh1LGkwaHVYVFAkWGhdVEwETFh oSFyQUDg9ZV1kYEgtZQVlKSkxVSkNPVUpJQlVKSE9ZV1kWGg8SFR0UWUFZT0tIVUpLSEpOTE5VSk tLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=PeRvnqFxOosBECcstfsShRbjQR2lQV0eRGa/35ZIsIhLUw6SMIj2KL4gg+HQ0vtbAPj0LtJFoZrpLrPISDGVxAGZ9hUZWffZqJPcij2RVTFZo0/IAX1pozDf7kb/92tQRVgmdEQGmKNb/G76qr1EooiWCVbw52OLv0XMIQeg+Dc=; s=default; c=relaxed/relaxed; d=thundersoft.com; v=1; bh=NTiFMa0um5MCx7YKz9M9UL5FTlU26BokizDRovnOdsQ=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add ARCH_BST configuration option to enable support for Black Sesame Technologies SoC family. BST produces automotive-grade system-on-chips for intelligent driving, focusing on computer vision and AI capabilities. The BST C1200 family includes SoCs for ADAS and autonomous driving applications. Signed-off-by: Albert Yang --- Changes for v4: - remove Signed-off-by: Ge Gordon Changes for v3: - Reword subject from "for bst silicons" to "for Black Sesame Technologies SoCs" - drop unrelated whitespace hunk Changes for v2: - Placed the configuration entry in correct alphabetical order - Used generic family name (ARCH_BST) instead of SoC-specific naming - Followed upstream kernel naming and description conventions --- arch/arm64/Kconfig.platforms | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 13173795c43d..0ef07343cc3d 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -119,6 +119,14 @@ config ARCH_BLAIZE help This enables support for the Blaize SoC family =20 +config ARCH_BST + bool "Black Sesame Technologies SoC Family" + help + This enables support for Black Sesame Technologies (BST) SoC family. + BST produces automotive-grade system-on-chips for intelligent driving, + focusing on computer vision and AI capabilities. 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(unknown [117.184.129.134]) by smtp.qiye.163.com (Hmail) with ESMTP id 262659583; Thu, 16 Oct 2025 20:06:45 +0800 (GMT+08:00) From: Albert Yang To: krzysztof.kozlowski@linaro.org Cc: krzk+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, robh@kernel.org, conor+dt@kernel.org, gordon.ge@bst.ai, bst-upstream@bstai.top, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ulf.hansson@linaro.org, Albert Yang Subject: [PATCH v5 4/6] arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board Date: Thu, 16 Oct 2025 20:05:56 +0800 Message-ID: <20251016120558.2390960-5-yangzh0906@thundersoft.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251016120558.2390960-1-yangzh0906@thundersoft.com> References: <20251016120558.2390960-1-yangzh0906@thundersoft.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a99ecea59fd09cckunm98a0ee061286f X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlCTB0fVkkaSB1CTh0YHxpKSVYVFAkWGhdVEwETFh oSFyQUDg9ZV1kYEgtZQVlKSkxVSkNPVUpJQlVKSE9ZV1kWGg8SFR0UWUFZT0tIVUpLSEpMQ0pVSk tLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=doFL9ykVQuefPyZEzCW2J57Hve3SunD89k/SKTNqhW08/MgTM87ich3lthKkId4fXy6t/jO0vFsJxgDvvKdslV1eQADUdg/pOryXtrGz/5AZxofUlS/U+ysNGqsrsxDYekkrQOBmp/cuT8aX9kRc8l5GDaHjPpucr2IYDWvFCUo=; s=default; c=relaxed/relaxed; d=thundersoft.com; v=1; bh=tAjqHgz4wG6e8OoGjwLbo8Eew2f6czwuezyx8+YqnRU=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add device tree support for the Black Sesame Technologies (BST) C1200 CDCU1.0 ADAS 4C2G platform. This platform is based on the BST C1200 SoC family. The changes include: - Adding a new BST device tree directory - Adding Makefile entries to build the BST platform device trees - Adding the device tree for the BST C1200 CDCU1.0 ADAS 4C2G board This board features a quad-core Cortex-A78 CPU, and various peripherals including UART, and interrupt controller. Signed-off-by: Albert Yang --- Changes for v5: - Remove MMC node and MMC clock from SoC DTSI completely (MMC driver and bi= ndings will be submitted separately) - Remove MMC node override in board DTS Changes for v4: - Remove Signed-off-by line for Ge Gordon - Reorder device tree node properties for better consistency - CPU nodes: move `device_type` before `compatible`, add explicit `reg` val= ues - MMC node: change compatible from `bst,c1200-dwcmshc-sdhci` to `bst,c1200-= sdhci` - MMC node: remove `bus-width` and `non-removable` from SoC dtsi, move to b= oard dts - SoC node: reorder properties (`ranges` before address/size cells) - UART node: reorder properties (clock-frequency before interrupts) - GIC node: reorder properties for better readability - Timer node: reorder properties (always-on before interrupt-parent) - Board DTS: add `bus-width =3D <8>` and `non-removable` to MMC node - Board DTS: reorder MMC and UART node references Changes for v3: - Split defconfig enablement out into a dedicated defconfig patch - Refine memory description: consolidate ranges in memory node and delete u= nused memory ranges - Adjust the order of nodes - Remove mask of gic Changes for v2: - Reorganize memory map into discrete regions - Update MMC controller definition with split core/CRM register regions - Remove deprecated properties - Update compatible string - Standardize interrupt definitions and numeric formats - Remove reserved-memory node (superseded by bounce buffers) - Add root compatible string for platform identification - Add soc defconfig --- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/bst/Makefile | 2 + .../dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts | 24 +++++ arch/arm64/boot/dts/bst/bstc1200.dtsi | 97 +++++++++++++++++++ 4 files changed, 124 insertions(+) create mode 100644 arch/arm64/boot/dts/bst/Makefile create mode 100644 arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts create mode 100644 arch/arm64/boot/dts/bst/bstc1200.dtsi diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index b0844404eda1..98ec8f1b76e4 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -13,6 +13,7 @@ subdir-y +=3D axiado subdir-y +=3D bitmain subdir-y +=3D blaize subdir-y +=3D broadcom +subdir-y +=3D bst subdir-y +=3D cavium subdir-y +=3D cix subdir-y +=3D exynos diff --git a/arch/arm64/boot/dts/bst/Makefile b/arch/arm64/boot/dts/bst/Mak= efile new file mode 100644 index 000000000000..4c1b8b4cdad8 --- /dev/null +++ b/arch/arm64/boot/dts/bst/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_BST) +=3D bstc1200-cdcu1.0-adas_4c2g.dtb diff --git a/arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts b/arch/= arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts new file mode 100644 index 000000000000..5eb9ef369d8c --- /dev/null +++ b/arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "bstc1200.dtsi" + +/ { + model =3D "BST C1200-96 CDCU1.0 4C2G"; + compatible =3D "bst,c1200-cdcu1.0-adas-4c2g", "bst,c1200"; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@810000000 { + device_type =3D "memory"; + reg =3D <0x8 0x10000000 0x0 0x30000000>, + <0x8 0xc0000000 0x1 0x0>, + <0xc 0x00000000 0x0 0x40000000>; + }; +}; + +&uart0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/bst/bstc1200.dtsi b/arch/arm64/boot/dts/bs= t/bstc1200.dtsi new file mode 100644 index 000000000000..dd13c6bfc3c8 --- /dev/null +++ b/arch/arm64/boot/dts/bst/bstc1200.dtsi @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include + +/ { + compatible =3D "bst,c1200"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x0>; + enable-method =3D "psci"; + next-level-cache =3D <&l2_cache>; + }; + + cpu@1 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x100>; + enable-method =3D "psci"; + next-level-cache =3D <&l2_cache>; + }; + + cpu@2 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x200>; + enable-method =3D "psci"; + next-level-cache =3D <&l2_cache>; + }; + + cpu@3 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x300>; + enable-method =3D "psci"; + next-level-cache =3D <&l2_cache>; + }; + + l2_cache: l2-cache { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + }; + }; + + psci { + compatible =3D "arm,psci-1.0"; + method =3D "smc"; + }; + + soc { + compatible =3D "simple-bus"; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + interrupt-parent =3D <&gic>; + + uart0: serial@20008000 { + compatible =3D "snps,dw-apb-uart"; + reg =3D <0x0 0x20008000 0x0 0x1000>; + clock-frequency =3D <25000000>; + interrupts =3D ; + reg-shift =3D <2>; + reg-io-width =3D <4>; + status =3D "disabled"; + }; + + gic: interrupt-controller@32800000 { + compatible =3D "arm,gic-v3"; + reg =3D <0x0 0x32800000 0x0 0x10000>, + <0x0 0x32880000 0x0 0x100000>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + #interrupt-cells =3D <3>; + interrupt-controller; + interrupts =3D ; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + always-on; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + ; + }; +}; --=20 2.43.0 From nobody Wed Dec 17 16:30:12 2025 Received: from mail-m49229.qiye.163.com (mail-m49229.qiye.163.com [45.254.49.229]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99758327797; Thu, 16 Oct 2025 12:12:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.229 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760616728; cv=none; b=qGJLgSS1DU+/SlHO8WLAJy0mCpMOh0O9lZqTjohntBu+gCHJhqlEGIIWNJpVBSxM3uLetdckx946qhVI3d1qqlELnFe9A7hBuGUIuGG3ow8+iCSW9ABnoih73qcEKsdjGj+1A/R9O2HQo4ShX9ZICFRxe+T80BED3vjWexIhdig= ARC-Message-Signature: i=1; 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(unknown [117.184.129.134]) by smtp.qiye.163.com (Hmail) with ESMTP id 262659589; Thu, 16 Oct 2025 20:06:48 +0800 (GMT+08:00) From: Albert Yang To: krzysztof.kozlowski@linaro.org Cc: krzk+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, robh@kernel.org, conor+dt@kernel.org, gordon.ge@bst.ai, bst-upstream@bstai.top, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ulf.hansson@linaro.org, Albert Yang Subject: [PATCH v5 5/6] arm64: defconfig: enable BST platform support Date: Thu, 16 Oct 2025 20:05:57 +0800 Message-ID: <20251016120558.2390960-6-yangzh0906@thundersoft.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251016120558.2390960-1-yangzh0906@thundersoft.com> References: <20251016120558.2390960-1-yangzh0906@thundersoft.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a99ecea670309cckunm98a0ee061288a X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaSE1LVkJOTE0eSh1KTR9KS1YVFAkWGhdVEwETFh oSFyQUDg9ZV1kYEgtZQVlKSkxVSkNPVUpJQlVKSE9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0hVSk tLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=H6z9Sgmvu2C1R0oPR62LMripRSOW2lVjysP5SKiq8YQn7c8BE3zTzgdVB1nsM/YOm5Y23y6JKrPYpOhLQCfVQAbASHrCJvZ8OR/BquULYWDqiFbNcgHahxx1SUEyS2nwdfoFu/c6je8N6Cr/pDCZh9zv/B0s5/I/a04bD+TidEM=; s=default; c=relaxed/relaxed; d=thundersoft.com; v=1; bh=2wYL+QTnahYA8W6BIWbc0y8myOYV1kLbZlxm0xBma04=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Enable support for Black Sesame Technologies (BST) platform in the ARM64 defconfig: - CONFIG_ARCH_BST: Enable BST SoC platform support Signed-off-by: Albert Yang --- Changes for v5: - Remove CONFIG_MMC_SDHCI_BST (MMC patches will be submitted separately) Changes for v4: - move CONFIG_MMC_SDHCI_BST before CONFIG_MMC_SDHCI_F_SDH30 - Remove Signed-off-by line for Ge Gordon - Simplify commit message (remove detailed description about eMMC/SD functi= onality) Changes for v3: - Also enable CONFIG_ARCH_BST in arm64 defconfig (in addition to CONFIG_MMC= _SDHCI_BST) Changes for v2: - No changes --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e3a2d37bd104..972cae9bee88 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -47,6 +47,7 @@ CONFIG_ARCH_BCMBCA=3Dy CONFIG_ARCH_BRCMSTB=3Dy CONFIG_ARCH_BERLIN=3Dy CONFIG_ARCH_BLAIZE=3Dy +CONFIG_ARCH_BST=3Dy CONFIG_ARCH_CIX=3Dy CONFIG_ARCH_EXYNOS=3Dy CONFIG_ARCH_SPARX5=3Dy --=20 2.43.0 From nobody Wed Dec 17 16:30:12 2025 Received: from mail-m49237.qiye.163.com (mail-m49237.qiye.163.com [45.254.49.237]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DCB732BF32; Thu, 16 Oct 2025 12:12:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.237 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760616731; cv=none; b=BL31DBD9FD6+AVn673hoUJCyb0QJMNOfSsIvCxmj/HaS7SczCrWvxBHQMlqd6tYvRWbVSzfhD42hWDS+qnialtx3UaJlVbZcuJ9Squd53lRuPJHjgAqcVwiuBktw1fpW+RB+f6Tw8QikVmq451sJavHWoogonPAikNGXZ8O95ME= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760616731; c=relaxed/simple; bh=nnO835dkU0CcnQ/bkazdpz2nytqKQ9A0ksh3GJCOu8A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mhhj/J8amKRaZQFMRl7RmPvgOxUj3nnIE8dL9dI2+nXisdaoukpDm2fhGXGfdmsQ/JqyNfrXseQtaLVWBoI69Cq/WGkxUvyJP0N4QEzwnUsThaw8zsaPK2/a+UceN06+7HoomoV8Ap5aeEMsenGjAzSEZC2+9bZiTG6ieNM/mA8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=thundersoft.com; spf=pass smtp.mailfrom=thundersoft.com; dkim=pass (1024-bit key) header.d=thundersoft.com header.i=@thundersoft.com header.b=Dk1et/Nk; arc=none smtp.client-ip=45.254.49.237 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=thundersoft.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=thundersoft.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=thundersoft.com header.i=@thundersoft.com header.b="Dk1et/Nk" Received: from albert-OptiPlex-7080.. (unknown [117.184.129.134]) by smtp.qiye.163.com (Hmail) with ESMTP id 26265958d; Thu, 16 Oct 2025 20:06:51 +0800 (GMT+08:00) From: Albert Yang To: krzysztof.kozlowski@linaro.org Cc: krzk+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, robh@kernel.org, conor+dt@kernel.org, gordon.ge@bst.ai, bst-upstream@bstai.top, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ulf.hansson@linaro.org, Albert Yang Subject: [PATCH v5 6/6] MAINTAINERS: add Black Sesame Technologies (BST) ARM SoC support Date: Thu, 16 Oct 2025 20:05:58 +0800 Message-ID: <20251016120558.2390960-7-yangzh0906@thundersoft.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251016120558.2390960-1-yangzh0906@thundersoft.com> References: <20251016120558.2390960-1-yangzh0906@thundersoft.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a99ecea710e09cckunm98a0ee06128ad X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDSh9IVh5KGBlDTB1OSBlIHlYVFAkWGhdVEwETFh oSFyQUDg9ZV1kYEgtZQVlKSkxVSkNPVUpJQlVKSE9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0hVSk tLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=Dk1et/NkrQ7aZ0NPv4CTjrYYp9Tn7qD9pL3NdHP9TihvJ23t/6KWS5WHsoIw/C1r6hNxoQ0nmwWONRXqL0oU50bY52PSCZ00dkos/17xrnh0MwxgDXwuk8q+VDNNacS0fi+rix6sPWFt3xSorapfsrsuSGeKIDza4OnODFXodQw=; s=default; c=relaxed/relaxed; d=thundersoft.com; v=1; bh=8vmS3EfhUykAvBVymJGJnTFBE7v+DMHYK0Xp3FKpXE8=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add a MAINTAINERS entry for Black Sesame Technologies (BST) ARM SoC support. This entry covers device tree bindings, drivers, and board files for BST SoCs, and platform support. Signed-off-by: Albert Yang --- Change for v5: - Remove MMC driver and dt-bindings entries (MMC patches will be submitte= d separately) - Change status from "Maintained" to "Supported" based on review feedback Change for v4: - Changed file name: sdhci-of-bst-c1200.c to sdhci-of-bst.c - Changed title from "add and consolidate" to just "add" - Simplified commit message description - Removed Signed-off-by line for Ge Gordon Change for v3: - No changes Change for v2: - No changes --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 46126ce2f968..841d3f055778 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2543,6 +2543,14 @@ S: Maintained F: Documentation/devicetree/bindings/arm/blaize.yaml F: arch/arm64/boot/dts/blaize/ =20 +ARM/BST SOC SUPPORT +M: Ge Gordon +R: BST Linux Kernel Upstream Group +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Supported +F: Documentation/devicetree/bindings/arm/bst.yaml +F: arch/arm64/boot/dts/bst/ + ARM/CALXEDA HIGHBANK ARCHITECTURE M: Andre Przywara L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) --=20 2.43.0