From nobody Mon Feb 9 09:32:27 2026 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91CE231CA54; Thu, 16 Oct 2025 12:07:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760616471; cv=pass; b=StOxMFlmEbOOfF/WtRYvSDX6o+0EVDngX8XreYUl0JHUqokssX3ECPADFNG48x+Wr0Um+jJ6bb5iPgKNfUyPn8ep+M6PCPjR6OMh0afaTijiK4Cobe9wtN9J8DSQRK2Xm93UJwwX+tEKnY+vctdmM5JWE2O+KqzEDZL0u8VsCks= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760616471; c=relaxed/simple; bh=X3I7LvLcq98oinkWZLSuYj5CDzqUfj0O2tBf+bamyRk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bwQvX+RX6FEp0Ai2aYlyK7nLO4JzLagfcsKWdp8zLxqQ/V7aPcAEcRYqs/FHgjETz1Ta9N+sfWi90Xn9w7ZeYseaXKwI//L4aWt/rTr/lkR0xEmffJQd7t4z+Jv2hLvnByiGG66fGFVXQOFgFHyn5mdSBT0q2U1VLfj3MJlRpEk= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=KUqFRsGH; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="KUqFRsGH" ARC-Seal: i=1; a=rsa-sha256; t=1760616434; cv=none; d=zohomail.com; s=zohoarc; b=Ms13vYBfTMjoO1HAp2qzfAlaJj7fGx09/nN/6oBhVK/gqsAQWijJxphtE4jE2QK8BDziV5l13Oj6KmvII0toCWqdegt7+i8aFbT2Jp1eFKavIBjaw8NfQ/0lF+0X2465yoHGioO0FCMGttP30+wzjJbt1dFOcjLdvcMipuirzX0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1760616434; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=GqKYMqqQwg166HBFvWGr1lohoFtGyKjc7tuyv5xhFJQ=; b=DQLRF2IITJH7wg48oKwTAOHDhzCLgJnEwutvNKtFfUbbwSFXm99AZpp9Nz7k42/nKWC0r0O4Eue41mzdORnPvTF5yP9xdGtykdbRx2G4MF1zvCH5YueIRuO/IHNIgF4fJIYzfB1gkGh+4wyoNnnD2GGIZzWVlze6h2r9EZCURmI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1760616434; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=GqKYMqqQwg166HBFvWGr1lohoFtGyKjc7tuyv5xhFJQ=; b=KUqFRsGHHbHdAyNduyeRrVB+7MkRNXgaG8+axbmKFVJfl0cHMuZnYIEMddbLhShI MwM+41oe9xHpo7QCtB6hcoPL5C8jY7PBwzwihxI9zosq/uEeAVZn/Rl8+zXlGCyuePw yvtYMNgiv8bIogaMlaeB1ewUYhm2lq8wz0WsLeaI= Received: by mx.zohomail.com with SMTPS id 1760616432172550.8290009089878; Thu, 16 Oct 2025 05:07:12 -0700 (PDT) From: Nicolas Frattaroli Date: Thu, 16 Oct 2025 14:06:45 +0200 Subject: [PATCH v2 3/5] scsi: ufs: mediatek: Move MTK_SIP_UFS_CONTROL to mtk_sip_svc.h Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251016-mt8196-ufs-v2-3-c373834c4e7a@collabora.com> References: <20251016-mt8196-ufs-v2-0-c373834c4e7a@collabora.com> In-Reply-To: <20251016-mt8196-ufs-v2-0-c373834c4e7a@collabora.com> To: Alim Akhtar , Avri Altman , Bart Van Assche , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Peter Wang , Stanley Jhu , "James E.J. Bottomley" , "Martin K. Petersen" , Philipp Zabel Cc: Louis-Alexis Eyraud , kernel@collabora.com, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, Nicolas Frattaroli X-Mailer: b4 0.14.3 SMC commands used by multiple drivers need to live in a shared header file somewhere to avoid code duplication. In order to rework the MPHY reset control to be in the phy-mtk-ufs.c driver, both ufs-mediatek and the phy driver need access to this command. Move it to mtk_sip_svc.h, where other such command definitions already live. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Nicolas Frattaroli Reviewed-by: Peter Wang --- drivers/ufs/host/ufs-mediatek-sip.h | 1 - include/linux/soc/mediatek/mtk_sip_svc.h | 3 +++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-med= iatek-sip.h index 7d17aedf6fb8..d627dfb4a766 100644 --- a/drivers/ufs/host/ufs-mediatek-sip.h +++ b/drivers/ufs/host/ufs-mediatek-sip.h @@ -11,7 +11,6 @@ /* * SiP (Slicon Partner) commands */ -#define MTK_SIP_UFS_CONTROL MTK_SIP_SMC_CMD(0x276) #define UFS_MTK_SIP_VA09_PWR_CTRL BIT(0) #define UFS_MTK_SIP_DEVICE_RESET BIT(1) #define UFS_MTK_SIP_CRYPTO_CTRL BIT(2) diff --git a/include/linux/soc/mediatek/mtk_sip_svc.h b/include/linux/soc/m= ediatek/mtk_sip_svc.h index abe24a73ee19..7265ff2a6e2a 100644 --- a/include/linux/soc/mediatek/mtk_sip_svc.h +++ b/include/linux/soc/mediatek/mtk_sip_svc.h @@ -22,6 +22,9 @@ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, MTK_SIP_SMC_CONVENTION, \ ARM_SMCCC_OWNER_SIP, fn_id) =20 +/* UFS related SMC call */ +#define MTK_SIP_UFS_CONTROL MTK_SIP_SMC_CMD(0x276) + /* DVFSRC SMC calls */ #define MTK_SIP_DVFSRC_VCOREFS_CONTROL MTK_SIP_SMC_CMD(0x506) =20 --=20 2.51.0