From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA55230276F for ; Wed, 15 Oct 2025 19:44:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557471; cv=none; b=eveT+yXpLi8Mo5yccw7dhOlcSjI7/+a6PF9asGrlgYdD55JSoQLT4ds+hZfaTaPUjY0/CeZlKpqBqsmkhTscM/NvQNu7l/Uer546NsZJdTHwjrIe2jHBl4X/TTesr0qX4DqSFIgWizW6wZxG5bsYevZiE4O+Tw7yNK1xO2Vfmls= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557471; c=relaxed/simple; bh=Zm/F6uFyMc4nnEbtPWODklxGuzdzraA3ZsA0+iIdu1I=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bQ2eOxyZqIIX7XddXepPq0EBMu/PXk+hVXIsdj8QGFRU+zIJqLHV7xI+nqDQwp9MieeOSv9iYapgtL6tWq79RxA79Z/5/YHOklOGLb0iUauwzAewMlcFOWoL1MQvkIfEnapRjgLyjB+Wa7xs21EllRL96AoXAufHQQf07ve7ysw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=RmQATqIh; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="RmQATqIh" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-47103531eeeso1312525e9.1 for ; Wed, 15 Oct 2025 12:44:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557468; x=1761162268; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/mFohtVVslXrTyo8hMYkLuQEeqxiLiM0O92p+2v9UC8=; b=RmQATqIhQnJlpMMpZy6+za6mpegcAdg2uxkvxUUsWDzQizv9ZOlu/+EJOUWsZn3Vuf pyRjjT5wiH1cIi8r4eXwaSa81XAtthXC3+7t4KTR31+zVcs3JuW9X+bdnI9zaAtIKi5K Q+eOVvsDq/q+wY57q1+RBHFj4QKKcg++3bwDq8PvB+cDU88iv0TJqybQvJB1fhYoToMz YaaQBTVsjFNzzQjUWN0RDFQUvc98+yea9vCpo3r0SE3A/2n8E8f+4FzFjxc5gfcJhSYr +3drp4+x7IXV6pcIHt/aGa4MzLJRpt4x9IsFzom92SJYBr2VZdh+DQRq3HtiQGBnEfKb XOnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557468; x=1761162268; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/mFohtVVslXrTyo8hMYkLuQEeqxiLiM0O92p+2v9UC8=; b=cZ9eQVOUrcDH2Pq7VIYp3lHVv77Tyb4a+aUis1vDgvHhgDMUcRzxP5l0z8l3P/utx4 n9JswWldJnBOfCbwWNv9t+GqeWGnu5HNd8lkUOi5HAswC0+hi1ZPVceDbTDQJNBCT2kH BM1/iF/W65tnVkNxveLnjxSWzv+ry4KY4Zspp5EHZkwuUFzx1sAvj++RVpb6zHs+t+2v vO9o24oDMJTncK7oFG1dYBDZI7fMv3HQM6khFRaC7E4pJPPszMQdIySuWMPWOwV9qhUE 1TlH6SgFKxxKH5yO550HzDamVetV5jzbG0cXC8Q17RJE9QUBi+8XAMKkn8WCMArEx/Y8 cSLw== X-Forwarded-Encrypted: i=1; AJvYcCU7Tbu5UOqAV6ITriyl3GaXDEnEvRXcBFHJgBWHgwnppPtwSMRHhkajnVBoph1gGdWrnEd3+27NQcWAsRc=@vger.kernel.org X-Gm-Message-State: AOJu0Yxe4I3lQaxZqG9+iTSznmXlRJtHZUke8HLuUlh4FoPi2yi3vSbA KsqbubZcpMnOgrvV9RPrV34l7+STqt/0kPkyZ3krtTH1QLtdv3PqXaSZ X-Gm-Gg: ASbGncvqaCFItC8xeQe3daPSoibX1e/c0b5RrvwtHvSUmbnqMzuFStDOsvzKYNcCeHt Xk14mAeYaHCfVb4dj/EzmSUYSKrMu06X3E3NsFWuMV/GOnDOBbKt3z9WdYhT2JkScKU6lUl4H1W T8xfAw5yhBBWytEWrr3fQmmwDOP5ZbvANzD6mb7XwMt+MF1/ZAVVGhmpD1Bf1dGrxxG5Vqy6GHi 7DW9rcaPVXyEgMG1kny2c/iY/lPgaa7RqH8uL/7vG3LylNa3aUOvTRxunLvJXU9ilFswpDdiurN LShU9OADMnPqaAn16MJkgF/zmt2sRmjS1KGwHAJHmXMPXdljw8xtNZvNRvVY0ZMjxGkXDsVhTJi 9iyvcyQ7kqMYPf94fjCJ5VQ3JWfTeLBc5ALS4VmjonERb60+xgagiKxIRgYvdVjSO454YjqhE5k XnBNVmq8Dtpqnoks5mPsEam/0N7vjkdSl6Ackdj6lw2OZT5DVU X-Google-Smtp-Source: AGHT+IFu9by7ZXfU1sgF4e/dNByhsbrzXetpPXsPwzZE529Y3Mf5qtbWILesQssXcoywCNc8g0IyDA== X-Received: by 2002:a05:600c:4589:b0:45f:2d70:2af6 with SMTP id 5b1f17b1804b1-46fa9a8b2damr119306735e9.1.1760557468065; Wed, 15 Oct 2025 12:44:28 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:27 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 01/11] ARM: dts: socfpga: add Enclustra boot-mode dtsi Date: Wed, 15 Oct 2025 19:44:06 +0000 Message-Id: <20251015194416.33502-2-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add generic boot-mode support to Enclustra Arria10 and Cyclone5 boards. Some Enclustra carrier boards need hardware adjustments specific to the selected boot-mode. Enclustra's Arria10 SoMs allow for booting from different media. By muxing certain IO pins, the media can be selected. This muxing can be done by gpios at runtime e.g. when flashing QSPI from off the bootloader. But also to have statically certain boot media available, certain adjustments to the DT are needed: - SD: QSPI must be disabled - eMMC: QSPI must be disabled, bus width can be doubled to 8 byte - QSPI: any mmc is disabled, QSPI then defaults to be enabled The boot media must be accessible to the bootloader, e.g. to load a bitstream file, but also to the system to mount the rootfs and to use the specific performance. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga_enclustra_mercury_bootmode_emmc.dtsi | 12 ++++++++++++ .../socfpga_enclustra_mercury_bootmode_qspi.dtsi | 8 ++++++++ .../socfpga_enclustra_mercury_bootmode_sdmmc.dtsi | 8 ++++++++ 3 files changed, 28 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercu= ry_bootmode_emmc.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercu= ry_bootmode_qspi.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercu= ry_bootmode_sdmmc.dtsi diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_boot= mode_emmc.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_= bootmode_emmc.dtsi new file mode 100644 index 000000000000..d79cb64da0de --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_em= mc.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&qspi { + status =3D "disabled"; +}; + +&mmc { + bus-width =3D <8>; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_boot= mode_qspi.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_= bootmode_qspi.dtsi new file mode 100644 index 000000000000..5ba21dd8f5ba --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_qs= pi.dtsi @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&mmc { + status =3D "disabled"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_boot= mode_sdmmc.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury= _bootmode_sdmmc.dtsi new file mode 100644 index 000000000000..2b102e0b6217 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_sd= mmc.dtsi @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&qspi { + status =3D "disabled"; +}; --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 121FF305948 for ; Wed, 15 Oct 2025 19:44:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557473; cv=none; b=IXQkH3Hbhtl9ZQkVnl5puMgy5qGSs/MondsHjhS/syqDPNbzKqmYqoI9zw4ODul0g4XjXDwK2wuxRhJrGlUjXgMxHWUQ9IaOIJcD/STyt9DH67VTcTH4vYn7ofhHEbYla3Z/wKScaq3/0Q5+yzKAGfYGeKT77qZY9x97ogBbz4w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557473; c=relaxed/simple; bh=gdXtc2fH7Fyw0MfgnqxFQ0cKYBFkYfBr+/WJv43AoYU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=F11Mt2DkWMN8uSFlHPHLf8A1oiwXOiOFmzPY7sjqyF7Jul/slpLVJlO63ROr94ThG5cQoVdsqwRomr3lVxhoFzHD6egeHvSDVDJKfWyUdEEtDEbqJITNBpiFzQFueRbB+l4ZJ9ezFPZN7ecx8FFF489nCrQ+Bx2i/iagDkBimE8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=kDKvYCoA; arc=none smtp.client-ip=209.85.128.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kDKvYCoA" Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-470ff9b5820so1899385e9.3 for ; Wed, 15 Oct 2025 12:44:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557469; x=1761162269; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/aAseuQrGI9nO9oAcToUjoPa5MvV1yHsA/LNt97b5lY=; b=kDKvYCoAMMVInsFvZT2xyDCJR41q/nkbmLbL9sh9V2QLaEJepHNlJC9StH29/Ywt3r kNBiQNILolsS4EBTQTfO8T/l4h2ndD0gtMh68JKZJQL08rCOj0bCPGC2T797IpJxY38M MtYnSfHfzsFuc8HEbVgsvIHNczcSWFVOj7g8ZB42N+T8IoFylXFjGk0dG4t8Y44NAV6r Zxr2SqF6CjvlRdS041bRCBGnVUv89y2LWuBEUEjAhJrQnVL/U1L+QEbQ3VW6HWqB+NDC MFqvCaGp/0AEqcri6w3P2vl2OE0zzcbPj9D7ac12o2fkbtK3t5e60y2bhZInIc6RfIkf arXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557469; x=1761162269; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/aAseuQrGI9nO9oAcToUjoPa5MvV1yHsA/LNt97b5lY=; b=BvrKhJX+b2m/sC1/m4tJP6ETXKvMaV0iywyMzbz63qZvDybN49rbc9+UqpX1ykQZdG V4ghz9FoMZ1k3vCNWxwawIe5logaosK+Rcq1IsHB5bZavvxELbLIk3GOfHEcNiInu+ZP WT1ON/ehiA5bhGoXJ3eT2O761w0tGMHBNTfsP74Cxa60HJYjk3tSS7rT7GF5QNnr9T0a ob9oMSS72PeezjrKQxxE6XWS2nzXyqbgRuRY0N3Jr51Wv5mKh8EKGVVXw10fEAhXZh+i tiAeehNbS2NmVPqrRkkx4hus4iNwxlpGWm8zWcFr98aEvVlhaiKoO4A115bzaSCyo5WR 7TOA== X-Forwarded-Encrypted: i=1; AJvYcCX9gtqSqE1kK9rONmGj9XgAQDMbnMOQobclvWbZLBSBw5sOhqPKTzaB2wY+sEzCu1/5E3BKELbKFFyIdGM=@vger.kernel.org X-Gm-Message-State: AOJu0YzUXbRNNx8yoI1RskcKB8x659Agjk05+fwamh2pJwchx/SmpPsx FMerQmwDjhgtpbglpeWU2NO7veuoGr2qCrCEYoZG8CORDTKZb/a2jFhp X-Gm-Gg: ASbGncsafKnHZ9HdUFJuVJZgEszsbfbRfQRkp4LtgP6pdOc6SD1q8my8yXFul0Yk2+7 KQ9cY6m6dtqMDjE4j2yybR/OEirDvXZyDOwo4TN1Oi++7ltVpswKdme/wM00igNjDSHUGcPxCFk ngXj4k1xS9rEQ9EgMMKWsexzT2w2vInmK/ZO8Zi7QGEnUgaQl8A/7E5g6r7AduOuUZZsQLKfDA1 W27DrGv21dxc0BCgJTlrHp9WDUrAtnLG9hGotCzRmUxqZBD4oFiUulohkM4zUuH0AR+W7uDo9ZC zischCPPcnBMCf30Yh2WBJWxaRXj827E85AF4iuorJAbfeHVR7QVl+yZqoVOozcuJlBJAYYy1P3 iR8fta4mkcIpnROKCQipM+MSVlbDSswoLZ1VHC/eLFTyDaX2ZIjaudT5mx20c8OBVXW3Erym6OY 3a0bi68uzxy7Wp/ZiPZcCGByuk X-Google-Smtp-Source: AGHT+IEZ8RxK1XFMhwlV7jPIAmb/ZqIJRSoxrVrpH234m6Cwa0B6fUlYLvmmpRuxEeAw525/j/Lc9A== X-Received: by 2002:a05:6000:22c1:b0:3e6:270e:3f64 with SMTP id ffacd0b85a97d-426f51c15f0mr1702563f8f.8.1760557469235; Wed, 15 Oct 2025 12:44:29 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:28 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 02/11] ARM: dts: socfpga: add Enclustra base-board dtsi Date: Wed, 15 Oct 2025 19:44:07 +0000 Message-Id: <20251015194416.33502-3-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add generic Enclustra base-board support for the Mercury+ PE1, the Mercury+ PE3 and the Mercury+ ST1 board. The carrier boards can be freely combined with the SoMs Mercury+ AA1, Mercury SA1 and Mercury+ SA2. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga_enclustra_mercury_pe1.dtsi | 33 +++++++++++ .../socfpga_enclustra_mercury_pe3.dtsi | 55 +++++++++++++++++++ .../socfpga_enclustra_mercury_st1.dtsi | 15 +++++ 3 files changed, 103 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercu= ry_pe1.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercu= ry_pe3.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercu= ry_st1.dtsi diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe1.= dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe1.dtsi new file mode 100644 index 000000000000..abc4bfb7fccf --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe1.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&i2c_encl { + status =3D "okay"; + + eeprom@57 { + status =3D "okay"; + compatible =3D "microchip,24c128"; + reg =3D <0x57>; + pagesize =3D <64>; + label =3D "user eeprom"; + address-width =3D <16>; + }; + + lm96080: temperature-sensor@2f { + status =3D "okay"; + compatible =3D "national,lm80"; + reg =3D <0x2f>; + }; + + si5338: clock-controller@70 { + compatible =3D "silabs,si5338"; + reg =3D <0x70>; + }; + +}; + +&i2c_encl_fpga { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe3.= dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe3.dtsi new file mode 100644 index 000000000000..bc57b0680878 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe3.dtsi @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&i2c_encl { + i2c-mux@74 { + status =3D "okay"; + compatible =3D "nxp,pca9547"; + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x74>; + + i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@56 { + status =3D "okay"; + compatible =3D "microchip,24c128"; + reg =3D <0x56>; + pagesize =3D <64>; + label =3D "user eeprom"; + address-width =3D <16>; + }; + + lm96080: temperature-sensor@2f { + status =3D "okay"; + compatible =3D "national,lm80"; + reg =3D <0x2f>; + }; + + pcal6416: gpio@20 { + status =3D "okay"; + compatible =3D "nxp,pcal6416"; + reg =3D <0x20>; + gpio-controller; + #gpio-cells =3D <2>; + }; + }; + }; +}; + +&i2c_encl_fpga { + status =3D "okay"; + + i2c-mux@75 { + status =3D "okay"; + compatible =3D "nxp,pca9547"; + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x75>; + }; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_st1.= dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_st1.dtsi new file mode 100644 index 000000000000..4c00475f4303 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_st1.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&i2c_encl { + si5338: clock-controller@70 { + compatible =3D "silabs,si5338"; + reg =3D <0x70>; + }; +}; + +&i2c_encl_fpga { + status =3D "okay"; +}; --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3AEFE308F0F for ; Wed, 15 Oct 2025 19:44:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557474; cv=none; b=VzkEdStpN22ouDq00yNQ1oK4xgVdC5suEqJC4+/Z4tdFup59j65a2IqG1/PFaITTKTR441QzO7AjZu/EIXpun144v9vsWf3tLrpqiUY1AEpRg3dFFcc/OVi3zvqpY4pAODVWb7+JFUL5AGZ0YJ6jY0jU25zRFV8/mmAQCGKkWVE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557474; c=relaxed/simple; bh=aHgWnJercmO9bga0xfuGF1dB69CEj2xx22/xhOVmZyc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Gy1ARZEcfVYt468L+bR7wwA1DsU5xXD1DVIafPtgKzxJyaHn2JvgbLQn0J/29Xv8ihrMRZwXlPv5SV+d9lC9mfNEiAV+J+2a0Q3696xA3UYgIPKwZlEjydkzS/M+w2LCYQk/Dtw0i1bmemaf127ppBbar3VXlqBmNsdvGiynWNc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=SokA4+KQ; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SokA4+KQ" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-47103531eeeso1312605e9.1 for ; Wed, 15 Oct 2025 12:44:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557470; x=1761162270; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ELtEzvOlSfZDw0eOq11pNQXYa7FR/HwnD4pYyXNkdPc=; b=SokA4+KQ7FZ7j/VRyZDa5D2oYmR78LTGo+gGseQsIvyEByDxWHhmzJLq3egpHwMuL4 DIGGvBMwEODVpMOwQeoxj817mmUTKhWk48E9cGP82RlcN2sFOmx2Qd8wxnFkQe/GQaE3 W6YmIWZjynPHMIIeRQh+VqQUk0k8qFBT666y3WT6AnGhe67RkSOyN4LNGOTzkhHmKDoJ hltmFhj5UWqlzVrPNhlbcVLsfMLF52NBFeBLb9PER67XNcXJBADv4NautoDECsWtTBMg 02EhbPnuytaSfbptmhy2/Ub1bPCzlTQpo9J8554hv86hSuHuW9BRg6kwGDol9koS+56N sCIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557470; x=1761162270; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ELtEzvOlSfZDw0eOq11pNQXYa7FR/HwnD4pYyXNkdPc=; b=p9lA1lzu9wvqAhXS18RWF2YWgLoPI3Xc1zrbPVQwzYUVWh8ZkAgjxObSX5xDM2riJg Bq4syVPZtORwhgj3dfs8Z1aidKf6E0+sZhgTksBS2qnzN5mlMZlBVuWQqaW7hbP3IK/A LhXfQla3n0fL7xB7BtzKjJVG8eh4xoWUaIZ7uf+kvryXWzGqwp3AKC6t7pGQkN2vxQcR /cXYZKDQeCaE7BHboRVw56V/y0ZTyR6E/71Wq057Od3ZlMsV66NLwCkq2HJzbXNRAOds YE9Lnh2nlDOnI+p7xxH8FfvRKnjnWXOYWJHNcH5Lu6478he89qyeS8NeWpdRzCMZclLt aPLQ== X-Forwarded-Encrypted: i=1; AJvYcCUgnVus9orakwMDgq8mJVVVslcrVYD3DrS9zcGDSp5VC/om0/E3wPb8BJrisJEjKckFs13IBOvXuiW3SZ4=@vger.kernel.org X-Gm-Message-State: AOJu0YxkiCM1Jgwi+9iWGmbUZnfXJ57jBPkkYLgKI5++ve1vTizYJhV4 tFFimWC69N6QADopyS+dwRPGLh4TwOXhYdDGLGvwKaINDV4/zT5D6eWs X-Gm-Gg: ASbGnctJM6yFncJjsBACiBZ71I/qBaEelXa8LFshuPVadrcA73LtY2Q+RQ3xKlSMa2V 7KLYTw4EmLVExMKT6XyzFpnv2R5UYrMEjtBDgVlO/7LgMu7Yw2Qd6c387XPEnFoJPmHlrK6Avlv g7kor8555jGBbeugsnAiJc8rzxZF9plQL6UUA/XxJT7uaBiEIHGcEOjzpc2ASsY44k4NnfEBu0Z 3gMmpHAsd8UzB31nRDxKnpSpw3lgrgyxiGkeJMMHdZ3yIchDwqOeTjG/LkdwBv/1sNOVs1qgjIH 0TJdGQZx5uzfviCZpzIdOkI4YBvqyRbWNeJTT5LJoZbLLdeQhKM7tbeUPn0/+EMmE4CzrQ+33lb rlOjXhHUiRBES3cPHq9quOgl771Is+VKM1ueKNgMljDclBd0JUG06u+Vd03nawBbztUCoRkFRRr iRdY+DZNo0Wkf93NIHCjBlrMIxz/3Z9/IksmquU8pk4N9OO4B952xM3o9+iEc= X-Google-Smtp-Source: AGHT+IFbf0eUde26C18IKkxKsSuO4ez+ACLVAfcQWNKtZdV+pfDbLyO4Q66LjTmLj7Si6IpG35m9uA== X-Received: by 2002:a05:600c:1987:b0:46e:4a2b:d35b with SMTP id 5b1f17b1804b1-46fa9b10892mr124486945e9.6.1760557470408; Wed, 15 Oct 2025 12:44:30 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:30 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 03/11] ARM: dts: socfpga: add Enclustra Mercury SA1 Date: Wed, 15 Oct 2025 19:44:08 +0000 Message-Id: <20251015194416.33502-4-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce support for Enclustra's Mercury SA1 SoM based on Intel Cyclone5 technology as a .dtsi file. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga/socfpga_cyclone5_mercury_sa1.dtsi | 143 ++++++++++++++++++ 1 file changed, 143 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1.dtsi diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.d= tsi b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi new file mode 100644 index 000000000000..49944f9632f9 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +#include "socfpga_cyclone5.dtsi" + +/ { + model =3D "Enclustra Mercury SA1"; + compatible =3D "altr,socfpga-cyclone5", "altr,socfpga"; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + aliases { + ethernet0 =3D &gmac1; + }; + + /* Adjusted the i2c labels to use generic base-board dtsi files for + * Enclustra Arria10 and Cyclone5 SoMs. + * + * The set of i2c0 and i2c1 labels defined in socfpga_cyclone5.dtsi and in + * socfpga_arria10.dtsi do not allow for using the same base-board .dtsi + * fragments. Thus define generic labels here to match the correct i2c + * bus in a generic base-board .dtsi file. + */ + soc { + i2c_encl: i2c@ffc04000 { + }; + i2c_encl_fpga: i2c@ffc05000 { + }; + }; + + memory { + name =3D "memory"; + device_type =3D "memory"; + reg =3D <0x0 0x40000000>; /* 1GB */ + }; +}; + +&osc1 { + clock-frequency =3D <50000000>; +}; + +&i2c_encl { + i2c-sda-hold-time-ns =3D <300>; + clock-frequency =3D <100000>; + status =3D "okay"; + + isl12020: rtc@6f { + compatible =3D "isil,isl12022"; + reg =3D <0x6f>; + }; +}; + +&i2c_encl_fpga { + i2c-sda-hold-time-ns =3D <300>; + status =3D "disabled"; +}; + +&uart0 { + clock-frequency =3D <100000000>; +}; + +&mmc0 { + status =3D "okay"; + /delete-property/ cap-mmc-highspeed; + /delete-property/ cap-sd-highspeed; +}; + +&qspi { + status =3D "okay"; + + flash0: flash@0 { + u-boot,dm-pre-reloc; + #address-cells =3D <1>; + #size-cells =3D <1>; + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <4>; + spi-max-frequency =3D <10000000>; + + cdns,read-delay =3D <4>; + cdns,tshsl-ns =3D <50>; + cdns,tsd2d-ns =3D <50>; + cdns,tchsh-ns =3D <4>; + cdns,tslch-ns =3D <4>; + + partition@raw { + label =3D "Flash Raw"; + reg =3D <0x0 0x4000000>; + }; + }; +}; + +&gpio0 { + status =3D "okay"; +}; + +&gpio1 { + status =3D "okay"; +}; + +&gmac1 { + status =3D "okay"; + /delete-property/ mac-address; + phy-mode =3D "rgmii-id"; + phy-handle =3D <&phy3>; + + mdio0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + phy3: ethernet-phy@3 { + reg =3D <3>; + + /* Add 2ns RX clock delay (1.2ns + 0.78ns)*/ + rxc-skew-ps =3D <1680>; + rxd0-skew-ps =3D <420>; + rxd1-skew-ps =3D <420>; + rxd2-skew-ps =3D <420>; + rxd3-skew-ps =3D <420>; + rxdv-skew-ps =3D <420>; + + /* Add 1.38ns TX clock delay (0.96ns + 0.42ns)*/ + txc-skew-ps =3D <1860>; + txd0-skew-ps =3D <0>; + txd1-skew-ps =3D <0>; + txd2-skew-ps =3D <0>; + txd3-skew-ps =3D <0>; + txen-skew-ps =3D <0>; + }; + }; +}; + +&usb1 { + status =3D "okay"; + dr_mode =3D "host"; +}; --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6882830DEBA for ; Wed, 15 Oct 2025 19:44:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557475; cv=none; b=EjQCuLkDFGoETLbR2cr4mHPGwAO7KXHZ0MPaRRvR6myNGI01KwWA86vjQ6tRiI5o9g0KlnNYWX5SlXwK0sVK7SUhE0eXSvFAGVpH3Q++SapvXUZnJDtWrX7StQ4Hes+kf2+W/foK5DNZn+q6q5Plg8tqcrJvXLsZgR5JnIZZKfg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557475; c=relaxed/simple; bh=p+HtOliJIpdvfgNiu+HTRNqZsxXYbMjiU4izC6ySwGk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=mvHxQ5lfFDAkR5JooUMbb5qU0h/wa/Op2GP1eWs6HyL6xhF2W/bfm3WwNda/jD+OrQEChcFZq8jy7XO2hJs/mVJSD+R+aJ3kzJoNtkbtKEYmsIFluz4q7lWK0IBjunQalcqNIMX4chg4Gjg1fai+DnNIn9goXn9Hs4YNiixLKu8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=EDvCVTo4; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EDvCVTo4" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-470ffe122b7so1252575e9.3 for ; Wed, 15 Oct 2025 12:44:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557472; x=1761162272; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=C8NQa4L4CG7HoZPqJ8Ok32X5AepFgS3EiKF4/VxGY/g=; b=EDvCVTo4zg+MN0QRxza3cXPxLjAuZAPqFBUu8583Nq/VaUPiiVlzjHJTDoBPLC9vFv n/KrD1Peas9hYjC7nth3ldWJcE0yJTDEnnzTIRo0caPeUmerkQo3dROroG9MPd1Rxnhy BlIG4QRkNpKUpNwp2hpWlZi+K1bitSgSdISCeAew7CFkYUMtUfKzRzdWWPalxrbufKDW nZy5CWirK/0blb01+6Qus2z747nVI6TzNsff8HhfQiz7su94WC3n/lPPvgFmO5yKh2RS jpfMRXdFyMaGPWSEZ9MOq4U+RFg9qMQyiasn/JWp0p5uOAMYlfzQT2wjAskoFjMJqh2J 4IUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557472; x=1761162272; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=C8NQa4L4CG7HoZPqJ8Ok32X5AepFgS3EiKF4/VxGY/g=; b=vNa/5ALKPEZM18sRh3tMitRV9uyMLY6WFkLNWjJt5t5+1mFXAREP0N1q+5qwk7cmcz vyOz4vAJ7UA1ik4XJwBpfsohzL4siGPNBq6ze62NPRe1Exsd6xQQAWNaoerY5rAQUu/s juUpbRz2TTRFwsX79eIPj20n2dcRKXpTJyFAE+8p/BTQ4A/yKKoaliJYsHJT++mF9775 c5MbcdCsOyRTLFIhNRCaDjbqjBV4kvVEcSJmOozR7KioX1vJXoL+j22e6fX/ntrdntTk bk9MwEwpppropxKPgrBAmLAk7e1yi4f3pktKdb0W6xa6Npn2emolk/z0vnv9cCsQpKJZ TAiw== X-Forwarded-Encrypted: i=1; AJvYcCUiN80fYlCWttigLbt7mvDzsIcY/vqu4W9EDLBP+t0fsprsrminQxHK1o/Vm8QNxLjPzLzjb9G49qkAwaQ=@vger.kernel.org X-Gm-Message-State: AOJu0YyKTQ7FxphFfW2riSzNnjpyfkQkxDiY6zGPKfZe7pP6/2fnrBKG KsYvf/TLhlmqzoB8EGb8ddI2X8m5I4LYlKSrT//acjsJOm+VQJqiXlGU X-Gm-Gg: ASbGncvKxkpQdwhwayBKeUNBwnw3ZsZ60d3psXCzq5ZWSr0cIduV0MYdZBDW84XE6yo MjVzavWAnP9tHktPV4KnZm/M+wXNAHJYgKk+LS2mpGBd5RbS1zVZfmKfwKCZWPKQ9ekhTMx9Eu1 HDrmT1nM0o7k6m0VF1xBVEiOLSlpwGB+7WsITCQ0RO+cd5M2b/RRWyLpPyGG6bEB6Cym3Pq6o1T byIpNoJLlXSaD33b4LTShY+qH3caLHst67DXAEZsedw7sUeMAiT6dWcHV/KTbkxWoQkeRAgEWqR TxdyQvVLvyMT2Efn7/7qRmITtxByxqpf2jUUO7x12QHM+Y7DvZmqLhh7mKWXmhTIV8opnhUNZvy pMfqj9byejDD3VxEM9uoUbf8eGx8LBjoIudEer72SnPcJYFOSMyBGh4aAopA0Z8YwF24YdaJDhD 43siYJxVGDKtK93uadsv7KnYlJ X-Google-Smtp-Source: AGHT+IGFbUp2aUgqC2NxxsFWUdzRUYNctiLbdeKx3VCMXkN/w1V5RXhJp/fp0x1EjgmVnxo0Afby8A== X-Received: by 2002:a05:600c:c162:b0:46e:6778:c631 with SMTP id 5b1f17b1804b1-46fa9a214c4mr121264845e9.0.1760557471616; Wed, 15 Oct 2025 12:44:31 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:31 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v6 04/11] dt-bindings: altera: add Enclustra Mercury SA1 Date: Wed, 15 Oct 2025 19:44:09 +0000 Message-Id: <20251015194416.33502-5-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the DT binding for the Enclustra Mercury+ SA1 SoM Signed-off-by: Lothar Rubusch Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentat= ion/devicetree/bindings/arm/altera.yaml index 30c44a0e6407..30ef03c53d73 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -52,6 +52,16 @@ properties: - const: altr,socfpga-cyclone5 - const: altr,socfpga =20 + - description: Mercury SA1 boards + items: + - enum: + - enclustra,mercury-sa1-pe1 + - enclustra,mercury-sa1-pe3 + - enclustra,mercury-sa1-st1 + - const: enclustra,mercury-sa1 + - const: altr,socfpga-cyclone5 + - const: altr,socfpga + - description: Stratix 10 boards items: - enum: --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7819430E84B for ; Wed, 15 Oct 2025 19:44:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557476; cv=none; b=TDooRTJtShcezHn/maEDcvY6c5VUdearQDO6b/294TmldUhyq8PpjDqQbAsFAJ2d/lxdvtRc7JbsT7HLI4Mzz84eAoB3uS/DEOeD5gDYZymyczLNO76y3Lh3Bn6hSb3u/MzfMOiUzrLPYzhjQgSWBnIcvhs54+GuLLgvpctVwKA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557476; c=relaxed/simple; bh=chBM4fI89RfRSTQyy77w7NKm+uci1RTfTRMtapqT118=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=aWW/Vc/MYfy4fDvshnUgLlpSRJ0TRL7gwDCDMJPiTV9awKp+qucyLl84ff99rvE6KSNxy/R8LRBFZMKQr3ufUfpJ3JQTZWZqnoXtJexdO0Jm/ho5/RFMRvbogHsLbQJXWtET0gfhHt0bxT5DIBN8D005EZqgHABu/UiQp+SgH1Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=JtewNKi5; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="JtewNKi5" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-47105eb92d8so1699375e9.0 for ; Wed, 15 Oct 2025 12:44:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557473; x=1761162273; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kYhsBfZhMWFr6Wa+dWD+zvDolXEh8h6k/0rm68kc4+o=; b=JtewNKi5pm3DLOZecuj65K+JR+7OJuaovZh1xysD8EGL3541Id3xMtrfYC9OLebyQ0 dWqk0AwTuMp9d6bcGfwDYVmLGpUjpmOFnWT8edsDVdyonT/t4XT+Tm4XMxKJt9mDj3ra ZHzKNYDCHctlLob4AWBLzrVoRYpdYdl8sKpErVkTnaLHuUJISgOxMhT1kB3/bSID89kP mSh+UHehtl568afAHf7lzLRIrlCkqux1B7AWQuVzTPIde9X0535M0edRT2dC2tSu/g+Q 65SskM4fW7sNKQCELIPA9PLuF0VFfl0cjw6VJXBoumsrkXeoqxqsZTnNiY07M8FK7X9V a9+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557473; x=1761162273; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kYhsBfZhMWFr6Wa+dWD+zvDolXEh8h6k/0rm68kc4+o=; b=DCvtxq7YXO9ahjW+P40USarivRcaWzqMlY64iBNiYoE+i4TSNBvcWmKOU2BY+5eKrb pU2F1ehhP7oP3xJhrchSpAylCB5C6GsthU62b7gVfyA96+2YbtD9znGcRuSBA8Acx4+1 vuSHLZhWa9lXcRSvd1QnhqfyZ7Uj8ulDtpzMhFJis5qiSgX/ezfqW5eZJcqhflY+eTS6 JXf1b3l4dB/OFRCjZEiT5tg8XU/e0NwDYXA9F6LfXdBaFtN7sr5EHil+OOQ1Xnd/Tatb eZ4nV6W8IAiQJJEunm3JnoMzYm4cst78mjDDFK7V7U5T/zz7eacEAfFittDeFx00sKqT oSvA== X-Forwarded-Encrypted: i=1; AJvYcCUPbyRzk5BFMN0k8lxTFydZUblcOH46WWxrbHe2ZnGGZXKfylVUahwlcsw/RRhVVGtbq8q1bymDnfUM5f0=@vger.kernel.org X-Gm-Message-State: AOJu0YxDZVcBv58ayjlNXvylr6N0pfbsSDHky08RQ6NnynCh8ilWFFae YcdALv2bxgndLzY7sCNK/VO2D4OD4OjdFTbUWe6mFuMZmu+b98Rm7ThgVitbV2Ne X-Gm-Gg: ASbGncs6UaeAxuGdId1OonAoAlPt3v85+3z0jhj2H+PGcGpYBsXs5jb4BD7PlmojlH7 Nhr2YP+RUeEbjWu+623849Iq0dgP0DSs9jP+6o10evlra4fXJMnyZMcn1l6LCBk0HdWrvScDnS6 g0EitHKLZoeVK3ulhOG0IH+dWX9XjfIhR+JhqXlUhKqxmqEa4cpxxQV6l2ZdNOT2geZPDoFSyPB ZHjS/U1zvSmpygvWqU9pDksuaet0XSMD6SJXND8KKuVNgjCXgi+n7umfH5SFM/IApbqPd/eEy3m vb5GGNjm/Rw7CIIRgWFcnMPCKi/K5sa8LCtbKWffzvcJ8iKgJftrYW9mVzEkbRmg6lTeq0QjEXd rQ9m4en/5G5oMz6p3LiyseysRcZ2X6BBUb+NrTldD8USg2SOFHVSBMiaw3NY2ykRjorF6B1EJaC PVOYmZJyzsZ67HLg== X-Google-Smtp-Source: AGHT+IE9o6ih1WaoYxcBVSpUQsmuM6I7z91oW/rfjBQllreCcL1uXDIReKS5ubpY9Tx3W7Sn/2wcYw== X-Received: by 2002:a05:600c:470d:b0:45f:2c33:2731 with SMTP id 5b1f17b1804b1-470fc9efdc7mr18575795e9.2.1760557472735; Wed, 15 Oct 2025 12:44:32 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:32 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 05/11] ARM: dts: socfpga: add Enclustra Mercury+ SA2 Date: Wed, 15 Oct 2025 19:44:10 +0000 Message-Id: <20251015194416.33502-6-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce Enclustra's Mercury+ SA2 SoM based on Intel Cyclone5 technology as a .dtsi file. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga/socfpga_cyclone5_mercury_sa2.dtsi | 146 ++++++++++++++++++ 1 file changed, 146 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa2.dtsi diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2.d= tsi b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2.dtsi new file mode 100644 index 000000000000..0b28964e0378 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2.dtsi @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +#include "socfpga_cyclone5.dtsi" + +/ { + model =3D "Enclustra Mercury+ SA2"; + compatible =3D "altr,socfpga-cyclone5", "altr,socfpga"; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + aliases { + ethernet0 =3D &gmac1; + }; + + /* Adjusted the i2c labels to use generic base-board dtsi files for + * Enclustra Arria10 and Cyclone5 SoMs. + * + * The set of i2c0 and i2c1 labels defined in socfpga_cyclone5.dtsi and in + * socfpga_arria10.dtsi do not allow for using the same base-board .dtsi + * fragments. Thus define generic labels here to match the correct i2c + * bus in a generic base-board .dtsi file. + */ + soc { + i2c_encl: i2c@ffc04000 { + }; + i2c_encl_fpga: i2c@ffc05000 { + }; + }; + + memory { + name =3D "memory"; + device_type =3D "memory"; + reg =3D <0x0 0x80000000>; /* 2GB */ + }; +}; + +&osc1 { + clock-frequency =3D <50000000>; +}; + +&i2c_encl { + i2c-sda-hold-time-ns =3D <300>; + clock-frequency =3D <100000>; + status =3D "okay"; + + isl12020: rtc@6f { + compatible =3D "isil,isl12022"; + reg =3D <0x6f>; + }; + + atsha204a: crypto@64 { + compatible =3D "atmel,atsha204a"; + reg =3D <0x64>; + }; +}; + +&i2c_encl_fpga { + i2c-sda-hold-time-ns =3D <300>; + status =3D "disabled"; +}; + +&uart0 { + clock-frequency =3D <100000000>; +}; + +&mmc0 { + status =3D "okay"; +}; + +&qspi { + status =3D "okay"; + + flash0: flash@0 { + u-boot,dm-pre-reloc; + #address-cells =3D <1>; + #size-cells =3D <1>; + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <4>; + spi-max-frequency =3D <10000000>; + + cdns,read-delay =3D <4>; + cdns,tshsl-ns =3D <50>; + cdns,tsd2d-ns =3D <50>; + cdns,tchsh-ns =3D <4>; + cdns,tslch-ns =3D <4>; + + partition@raw { + label =3D "Flash Raw"; + reg =3D <0x0 0x4000000>; + }; + }; +}; + +&gpio0 { + status =3D "okay"; +}; + +&gpio1 { + status =3D "okay"; +}; + +&gmac1 { + status =3D "okay"; + /delete-property/ mac-address; + phy-mode =3D "rgmii-id"; + phy-handle =3D <&phy3>; + + mdio0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + phy3: ethernet-phy@3 { + reg =3D <3>; + + /* Add 2ns RX clock delay (1.2ns + 0.78ns)*/ + rxc-skew-ps =3D <1680>; + rxd0-skew-ps =3D <420>; + rxd1-skew-ps =3D <420>; + rxd2-skew-ps =3D <420>; + rxd3-skew-ps =3D <420>; + rxdv-skew-ps =3D <420>; + + /* Add 1.38ns TX clock delay (0.96ns + 0.42ns)*/ + txc-skew-ps =3D <1860>; + txd0-skew-ps =3D <0>; + txd1-skew-ps =3D <0>; + txd2-skew-ps =3D <0>; + txd3-skew-ps =3D <0>; + txen-skew-ps =3D <0>; + }; + }; +}; + +&usb1 { + status =3D "okay"; + dr_mode =3D "host"; +}; --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B175430EF9C for ; Wed, 15 Oct 2025 19:44:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557477; cv=none; b=ILqwSRKAA8abCysMqjuAO+0ofAGy53ixxmpL/ryGDpSRizhI+GplvOd6bgoDIWN9s76mzry2Sk8SZrcQQHqelQA3W9O269mUrHQXnWoGD3CWqq/sZcZy/3ZwlYsPqW3rFtk0qc63CRaqvlMSyDnw7nH+juyHr9MpnuClCIfGpcY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557477; c=relaxed/simple; bh=icm+qgwvmlaIKVA0+LDLw72vpjzysCjTHSxFdDTSB1U=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Fc0U0jCjNAjxpdBtq3VYyLXm9iN+t76JF1B9FbcPlEUpawIPZEDqens0IeY++ypCUhzoqIqJz1RuTxY/ZcR2zXIdYHsUk39Ko2toN2Dpz4hMr2TxwYP/klIxEXmS2AzT/xdLsucJpyKhFl79dy9th4IRJ6aXFbr90Qwn+Kb0yhs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=UsF/mqK/; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UsF/mqK/" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-46e33cec8edso4942825e9.2 for ; Wed, 15 Oct 2025 12:44:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557474; x=1761162274; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gTxzj/ZNzMCl2AVIVbzHV200aF3vcZBw8Pj3HONtytU=; b=UsF/mqK/A3aQYmmZTTpQCNa1gfrG3MjFuCEVGQwRfvFNSpdHSOt+n5PhOPUK/IJ/DS z5LNYTt0BmqwZAPRiBZs6Cl3YlyYpAAz9PdDIjkOGLDCTfdt7aqyG+6JjP+gm45DqOyx kqUEMhUdLELc1JjhVXXP3ciFzAvpn7JX96L2ubOuFNQFmB4xcggr6+4qb7mEy3GUiuo2 mX2pXpyCV0+lJ1ZlSvR7dAc6JTA98zB7yLymDTU6oZBD7vNeLGDbiTaHyAbjCQy9QPPE /Ilp/wvcKvE7n34YJNDRgzBshQy+v9OT3OIOVhhnN4W7a5GBLEuU0r8sylwAYQTQqbnQ cdxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557474; x=1761162274; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gTxzj/ZNzMCl2AVIVbzHV200aF3vcZBw8Pj3HONtytU=; b=pw9y65y6g80+7yXmmOGnbuWnlaizO9SXwLvuzJuslXgByG8wPnWNltybKD6XGsKsYp XkkvSs9oWiyrwzFiPv25/Oj4kS+aw/rOb0BWo9AXS7iBJUFesTC5hpaQEPBW+CEEf1GM KCpMYQQiNWAdVUj+kIVM9ECR1nR2WrqDtSSK8MURIKKiCIs1moEEnCU4Ykzahpkvg/rr puIMghp/X+Kn6IG+Pf3wR1Ys6/zm6uiAjIvUKy7hLTfa4M/8cr4KtTgeB0Mc/ldsPv67 fF6RXlJ6Ie2i7/cVzkrYdQMZmtPJauyWT8j+V35HOLj+La07B0FhI/eT0IPCSbyrMm+x odSA== X-Forwarded-Encrypted: i=1; AJvYcCVgcZtTZAQqHKUWexon00AfYaZrjT/jJ18Kdq3+HQUR1SYgvnr2QO6eI9l67pFpZG2x1Gb2D9OaFSZMzRI=@vger.kernel.org X-Gm-Message-State: AOJu0Yw8W4ksbgVIJnSgLkVzMz6DCkvH3MkvmtfO8en2UmiK9NlVBohX laj5GK2jVgz6dWhvX3LKV7BT+/iYTymYsVvAB/pif42njw4MXiXRySxh X-Gm-Gg: ASbGncsDJBjFgvaLQJWUUmtpBK2WOef8dFC25Vk5/BQh9w1PkyVVoHkpQdMp8XiE0Ty 8JdTLMQ5B5LkmX8vyITE3oMN8S5ohUt5xhTVaE+XEkC9joesq5ibyT3+jSYaVqeKkJ+DjtBaWe6 9vsJcLHxVNRobRvvEd/t2s+eF9gGbwuHTojBGdgEcRnKn42zIs59ROU9l9ODcJx+xNb7z7YGaJ/ yUlA6i/OxTmTVOWznL8YQjZFsnziDbCeUIYX7HpJrByU1JFccNCrxh8pE+bJDxLUYfOygEWStsG rvpYSTCzH1yx9YXHb//0cLDwp12ASaQhcAhe4fauOVU0SpYwJEsonaZGCFgF5tFfoLpK7ri4537 08PMNXElNbKsLgOl7w0yxsq907cen0mud7tOMZopM46h2EISODhN0KOUnOvZlIVu/J8lRJaa0AW HUsTBnHcnUkecHSYvY3QPKnY3z X-Google-Smtp-Source: AGHT+IF4xGlkJcRA3gQGyAd6Gn9TERRg/c73M+cIvYIhWJxTPQGwRfocOPk8PIAo+UhNQw7AN0G0gQ== X-Received: by 2002:a05:600c:c162:b0:46e:6778:c631 with SMTP id 5b1f17b1804b1-46fa9a214c4mr121265175e9.0.1760557473859; Wed, 15 Oct 2025 12:44:33 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:33 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v6 06/11] dt-bindings: altera: add binding for Mercury+ SA2 Date: Wed, 15 Oct 2025 19:44:11 +0000 Message-Id: <20251015194416.33502-7-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the device-tree binding for the Enclustra Mercury+ SA2 SoM. Signed-off-by: Lothar Rubusch Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentat= ion/devicetree/bindings/arm/altera.yaml index 30ef03c53d73..72cf04b22a08 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -62,6 +62,16 @@ properties: - const: altr,socfpga-cyclone5 - const: altr,socfpga =20 + - description: Mercury+ SA2 boards + items: + - enum: + - enclustra,mercury-sa2-pe1 + - enclustra,mercury-sa2-pe3 + - enclustra,mercury-sa2-st1 + - const: enclustra,mercury-sa2 + - const: altr,socfpga-cyclone5 + - const: altr,socfpga + - description: Stratix 10 boards items: - enum: --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F15CA30E847 for ; Wed, 15 Oct 2025 19:44:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557479; cv=none; b=Qlc0RCicEK1+SuArdSmUPL/o2wCMy5C9GlCEylkI0Sj7T37WMetkz2ddZPeEB8TzjzdynwcDvq645JEw+23EybdFKTkyw2SQbbpAYlNKptkf5NFJ2OejWj9z/ByP6b2xT8iPDx49gxP4bomOjH7QB1CQeLV49Lbnc+vZAMTcHc4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557479; c=relaxed/simple; bh=an1IqI2DrpyzSR1UThF1rWbqQR6bxYIoSS+lWWmwVzI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=PRYoPWkqWr0gsOp1g9Rvedd5D2pVPG2XlpZtKN09JkOn8c2YgenGd5uxCBi6JuJoSi41NOQxB4N0wqH1sl+wS6zBBz0Id7lJJL+kPg4Kq1UMuqrSUUEUfiUhdc8TClulr5nby+oFg7crAfkqwk8ZX5V9BovumNHqoNGzscrdEb8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=gcP6InBp; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="gcP6InBp" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-3f4319b8c03so421713f8f.0 for ; Wed, 15 Oct 2025 12:44:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557475; x=1761162275; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=B8w0UBMRdn9WI7neqz6g09a5mjk21WNS8Jbq/ycntUs=; b=gcP6InBp5WkFw4Z8jdoVAqihvQtMd7PIaTSfNgwlBFgdZAYBXzT1qkc6zCYi0orm3O MAJzvh0g5BBmVg0SVLjzW9W0EpghZgnysDfmsbnX3dMRH5gnLihDvCVEwh4kqUMBzt3T +MtmaeahUIlvyNqGksssX9ayavRMbs9MbpUHsEK3/ZOyKaQwc3endIOFGVaw1yO5cjdd uwFTqdgvuZrVxNoo1xNrIiW1RBJwbS9S615xVRzhaSbeOzbXwcDeUzLszoh1vzbTGtQ0 3nJwJ5vIkhNdZpVS0nM/YbhAsaZOUveBnWr4di5cFDFKDg010JW/DF3AvGq2YVaMBlmi CVIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557475; x=1761162275; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=B8w0UBMRdn9WI7neqz6g09a5mjk21WNS8Jbq/ycntUs=; b=ffqvRKqb71JjuHdO4p40F7FQUEhe/5yPH2IxrDrHHl0xkLL8JOFz75ivHXWkX02+qo EYB0Izi4oyEreIVDEI9+VbbfNj3Ppm4x72Z6PhvQe03xldGCNYcBpuBqQRF6Rd5M+L0j BnZKTiFqOoxc3UR/VuVdjdlVH/ukQFgM1uXj5r6mGVTf1sIqSsKKAPcABSQbjx4g7mUM dOD4UvRIG9ZDlG4EEkliXlNp8KHlsE+nlaQPKvKdp1D1Mv2+wSZKmPsyL5WWKLHDOUI0 gvtSlrfyArdpx8tQa5M24wIs4Bd0Q5qIR2sDAeATKXYRiTXidrIdCBoxzr+K5mNWAheQ b/tw== X-Forwarded-Encrypted: i=1; AJvYcCUJEgpEjWxr3Yv/zNz3qcMv2PWIdHy8sHeonWk8Mxf1AnPK4mMrpMbSmWscKbWfnUYOBxd7C5b/4Ue3ve8=@vger.kernel.org X-Gm-Message-State: AOJu0YxX0NKLtEhwMsxM01pr/5oACJFVrqPsMIlXwfK4DPBLUwX4tvxw sC3QGrf+uh2NYWqdOYkaTjLcjMCa/WxWcniO0yt3n9SG48cmdha+j/Pt X-Gm-Gg: ASbGnctGfuUXhSpyyJzbiN/vMPXIamaOis+Kch7tmm0IG5ZZ/oHhR8UGNgI1dKErDWT KVo0BVsQJukGaQFuJXkIAQbyxvOfIy84znZVANX4hYsnQ5N4HQ7szg6riVvp2nhfukLQI8NGNHf p5ZkzlY5XKHBL6OXfPpJuQSwE0qROxEKre4Gy8nD+QXhDFnOK+gY85KH73aCE1ZWgYmB9L/HA6U HnqZrU5XVogAlL6vrMkvuEpjjQD+do7GviZFKNyaARHRQbvz/d4W6X2R5DPCAVLhztxDuoLsYDY ltrIdm/GB43L34o8GODi1VexcSVfS5jpR+3U7sV6+MH6ozvU8JeAE1y+X7pJWQs54pujD2CdJnx ZRymm6QhqPbwjPWjf2/IXt3a/8yVUUmBaN4DI+MVO0Ay1GjeihDPL9GCedeBxB4F4Ze6NFO1GW+ QvJDLTam7hzCABqxD9prcbUs5z X-Google-Smtp-Source: AGHT+IG+GBr1YE4KVcrUzbBE3ts6hhB6sCOsDLrTE1cQZZNudItepM8k89VSCatdbgfO6EsS+bUEUA== X-Received: by 2002:a05:6000:4012:b0:3f3:3c88:5071 with SMTP id ffacd0b85a97d-4266e7c4f78mr11393933f8f.4.1760557475090; Wed, 15 Oct 2025 12:44:35 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:34 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 07/11] ARM: dts: socfpga: add Mercury AA1 variants Date: Wed, 15 Oct 2025 19:44:12 +0000 Message-Id: <20251015194416.33502-8-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce support for Enclustra's Mercury+ AA1 SoM, based on Intel Arria10. This is a flexible approach to allow for combining SoM with carrier board .dtsi and boot-mode .dtsi in a device-tree file. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga/socfpga_arria10_mercury_aa1.dtsi | 143 +++++++++++++++--- 1 file changed, 121 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1.dt= si b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1.dtsi index 41f865c8c098..c80201bce793 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1.dtsi @@ -7,12 +7,14 @@ =20 / { =20 - model =3D "Enclustra Mercury AA1"; - compatible =3D "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,soc= fpga"; + model =3D "Enclustra Mercury+ AA1"; + compatible =3D "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; =20 aliases { ethernet0 =3D &gmac0; serial1 =3D &uart1; + spi0 =3D &qspi; }; =20 memory@0 { @@ -24,52 +26,102 @@ memory@0 { chosen { stdout-path =3D "serial1:115200n8"; }; + + /* Adjusted the i2c labels to use generic base-board dtsi files for + * Enclustra Arria10 and Cyclone5 SoMs. + * + * The set of i2c0 and i2c1 labels defined in socfpga_cyclone5.dtsi and in + * socfpga_arria10.dtsi do not allow for using the same base-board .dtsi + * fragments. Thus define generic labels here to match the correct i2c + * bus in a generic base-board .dtsi file. + */ + soc { + i2c_encl: i2c@ffc02300 { + }; + i2c_encl_fpga: i2c@ffc02200 { + }; + }; +}; + +&i2c_encl { + status =3D "okay"; + i2c-sda-hold-time-ns =3D <300>; + clock-frequency =3D <100000>; + + atsha204a: crypto@64 { + compatible =3D "atmel,atsha204a"; + reg =3D <0x64>; + }; + + isl12022: rtc@6f { + compatible =3D "isil,isl12022"; + reg =3D <0x6f>; + }; +}; + +&i2c_encl_fpga { + i2c-sda-hold-time-ns =3D <300>; + status =3D "disabled"; }; =20 &gmac0 { - phy-mode =3D "rgmii"; + status =3D "okay"; + phy-mode =3D "rgmii-id"; phy-addr =3D <0xffffffff>; /* probe for phy addr */ - max-frame-size =3D <3800>; - phy-handle =3D <&phy3>; =20 + /delete-property/ mac-address; + mdio { #address-cells =3D <1>; #size-cells =3D <0>; compatible =3D "snps,dwmac-mdio"; phy3: ethernet-phy@3 { - txd0-skew-ps =3D <0>; /* -420ps */ - txd1-skew-ps =3D <0>; /* -420ps */ - txd2-skew-ps =3D <0>; /* -420ps */ - txd3-skew-ps =3D <0>; /* -420ps */ + reg =3D <3>; + + /* Add 2ns RX clock delay (1.2ns + 0.78ns)*/ + rxc-skew-ps =3D <1680>; /* 780ps */ rxd0-skew-ps =3D <420>; /* 0ps */ rxd1-skew-ps =3D <420>; /* 0ps */ rxd2-skew-ps =3D <420>; /* 0ps */ rxd3-skew-ps =3D <420>; /* 0ps */ - txen-skew-ps =3D <0>; /* -420ps */ - txc-skew-ps =3D <1860>; /* 960ps */ rxdv-skew-ps =3D <420>; /* 0ps */ - rxc-skew-ps =3D <1680>; /* 780ps */ - reg =3D <3>; + + /* Add 1.38ns TX clock delay (0.96ns + 0.42ns)*/ + txc-skew-ps =3D <1860>; /* 960ps */ + txd0-skew-ps =3D <0>; /* -420ps */ + txd1-skew-ps =3D <0>; /* -420ps */ + txd2-skew-ps =3D <0>; /* -420ps */ + txd3-skew-ps =3D <0>; /* -420ps */ + txen-skew-ps =3D <0>; /* -420ps */ }; }; }; =20 -&i2c1 { - atsha204a: crypto@64 { - compatible =3D "atmel,atsha204a"; - reg =3D <0x64>; - }; +&gpio0 { + status =3D "okay"; +}; =20 - isl12022: isl12022@6f { - compatible =3D "isil,isl12022"; - reg =3D <0x6f>; - }; +&gpio1 { + status =3D "okay"; +}; + +&gpio2 { + status =3D "okay"; +}; + +&uart0 { + status =3D "disabled"; +}; + +&uart1 { + status =3D "okay"; }; =20 /* Following mappings are taken from arria10 socdk dts */ &mmc { + status =3D "okay"; cap-sd-highspeed; broken-cd; bus-width =3D <4>; @@ -79,3 +131,50 @@ &mmc { &osc1 { clock-frequency =3D <33330000>; }; + +&eccmgr { + sdmmca-ecc@ff8c2c00 { + compatible =3D "altr,socfpga-sdmmc-ecc"; + reg =3D <0xff8c2c00 0x400>; + altr,ecc-parent =3D <&mmc>; + interrupts =3D <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&qspi { + status =3D "okay"; + flash0: flash@0 { + u-boot,dm-pre-reloc; + #address-cells =3D <1>; + #size-cells =3D <1>; + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <4>; + spi-max-frequency =3D <10000000>; + + cdns,read-delay =3D <4>; + cdns,tshsl-ns =3D <50>; + cdns,tsd2d-ns =3D <50>; + cdns,tchsh-ns =3D <4>; + cdns,tslch-ns =3D <4>; + + partition@raw { + label =3D "Flash Raw"; + reg =3D <0x0 0x4000000>; + }; + }; +}; + +&watchdog1 { + status =3D "disabled"; +}; + +&usb0 { + status =3D "okay"; + dr_mode =3D "host"; +}; --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67C6630F94E for ; Wed, 15 Oct 2025 19:44:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557481; cv=none; b=WMRy9rlxhXAofc4Lo3J7JmRFT6TTcPylFaPfeWRdwqeeT0+wk8vvlXSV/gEV6qsPoQPBub1Hz6rr7kr/51bLwkdWdpu7o2JhosB9omeG8CgsRidma3KCYUgq8M0l9Udi0HsWhqhNNktvmtEhuxkfHNn1Qie0KFNsBdAKXDFTwHc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557481; c=relaxed/simple; bh=Ovos97kB24kZOCw0iEoYD5BQRJ0nrfkGVhWD4gn4w48=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=eXFvMsaSbYcbbicPHuvOH2jc9gu07m3WwMNxb2iZGWK6v1Eak68RLEwcyw9LdXjvH+2T4cnFcL2PpeaETEg3AAfV5WV3LmpXYLtCq12UCYWZYeinmiFwoWM0maPNQvLwgV7WJj8ZfyEa33hANdezTc6bK4iNzJlUOV0J1Cm7Yv4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=WaQR0QkF; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WaQR0QkF" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-3fba2c43a16so187171f8f.1 for ; Wed, 15 Oct 2025 12:44:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557476; x=1761162276; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nVIjlBezqjwlP9ZoOZaGlXSxdWFyyZWMo+uLBCHG7JY=; b=WaQR0QkFUB22o6JI8kimLvvB4A3AffsyEYATtgctXLJDlAnHevN8FfDxNB2a7Y+qk+ GdC0S6ulsfg94iOd2XaPgYi5gM1Pj4hlmLo8VSlAQG+CzJshA3WZMMOKL0EDjkPIbGRY jbJmVRjoqtcJSgg3WWs7TOdRGwYsP9O8f0eQygVEL5V0mbYQdDjgDHU6yLs2oCy1KW7M gjPVquPCq/SvKp1pHCqUBPtRQK2yFIMtaYx1KTlEqBX87VxI3H47iAuhkxX0ZQQCYC4+ YiI+CBdyU4lmDM9Lv84NWtAT897jWRvG8w7FrmpwU7snEdH4NG3qW8mojGR+qg/fZEmj 0lrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557476; x=1761162276; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nVIjlBezqjwlP9ZoOZaGlXSxdWFyyZWMo+uLBCHG7JY=; b=UTL3O5hq84pD4DFntTMUWZyNA9r61KR62FRngYDOqrNpN/LPcz3adu9L956DFOaNp4 0JYx6VBJKD2WOpKOndvEe8osrQe0/iVW5DtckHa9qq4rdkNBrIdWTYTxLMi5M81a7SwD JQ+UzSKJxbF0k7qniC0o6j6BJlLJJWuo4bwSXH0AoeKSBAKhzuH8dekD31o2OInLG4Qm UTOPdNtcWpt85gINu6aqS1qQfAlse6cw+OYYkCtRa/bVaJ1wXn8oWSmY1evyUtLUf+z+ 9qo1jv6UkOIlR1c1ZYCJi/9Uqx/DAZD2THb6yAP8VRzoNTGvGu2Hd9ekF7473DjH8M4b 7Fvg== X-Forwarded-Encrypted: i=1; AJvYcCVrStcnteV/gj9g8LsrQsWlU3L9nyjEeocICaP6rO8RSmVnc3hNLBPkyInUcnqT1ICLwguZYFNcEQiMHH4=@vger.kernel.org X-Gm-Message-State: AOJu0YyB5B83+fNWJTOu6/5H9cboppWjlmZg3lKXyszRW8q30vvL8kRx zLTvWHkjBn0drVhjB4KegpDvCRORc30QPxb2knZ59dl6KDLVItgtjl0u X-Gm-Gg: ASbGncvZrBGMuEATrBlT/oOP/bUynAlnzynf+ymVKwQJ8eoIMO8BIsQJw6uCILtXNWy uehH8hG0A27/qA075YQyDo8FiHb8nbiHCWQE5QfaNT0LDqi7Pn7LnOCWSsA65nVqzpdGwODzIvt nHovBF3ia4A1IOmNGDlJMBuoHzy7K84yh6WYqg2hXL4AYedRKx/TNiERZ1TcKFuTdft4vHm8pHI CAdqpQmftXg9Ro8aGsJHDbeXQxqwdHkhzDksKB0FepPbGjl/eeTXBVpEZ939RZeR2DX0QnOm6r0 s5TBTkypO2/ZhF3w6MOZbkk7EGAlryTl/n89XTtw+4UIAqHo34y5NNV5aVlKJ7Wgva6N/1/6673 jz1mBaD+M41dus6XqOIVYFAwQIrweviOsQqvpIX5VLJ43CF8Kf51q4Rz68OxjEbQnKqUreBjTUN hgtApP9048ShdZfwHYZFNkn1qI X-Google-Smtp-Source: AGHT+IH6tauOTDHR+VcAhwFzraMEDMNNBSZcoJrb9benMQWyHWdHVYvdQh1SJMyTVrapg/9gVi7RVg== X-Received: by 2002:a05:6000:607:b0:425:6fb5:2ac8 with SMTP id ffacd0b85a97d-4266e7dfc13mr10447114f8f.9.1760557476284; Wed, 15 Oct 2025 12:44:36 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:35 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v6 08/11] dt-bindings: altera: add Mercury AA1 variants Date: Wed, 15 Oct 2025 19:44:13 +0000 Message-Id: <20251015194416.33502-9-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update binding with combined .dts for the Mercury+ PE1, PE3 and ST1 carrier boards with the Mercury+ AA1 SoM. Signed-off-by: Lothar Rubusch Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/altera.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentat= ion/devicetree/bindings/arm/altera.yaml index 72cf04b22a08..73ba3cbff026 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -32,6 +32,9 @@ properties: items: - enum: - enclustra,mercury-pe1 + - enclustra,mercury-aa1-pe1 + - enclustra,mercury-aa1-pe3 + - enclustra,mercury-aa1-st1 - google,chameleon-v3 - const: enclustra,mercury-aa1 - const: altr,socfpga-arria10 --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3655E30FC1A for ; Wed, 15 Oct 2025 19:44:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557481; cv=none; b=q52Q8+GjfRg8nUPoNBDHXNcK7gSL2Wvrq+u6+PYHG69WiJzpeuVBwAGpyLhW7adnQcMRJqjFM/TT6JimIxFdkR5i0tozk4rmqRi8qqIebd/8paioAHFVUZ4YJ+SIP96QqbZ3U+v5HBdccKVzXsJBDh4KS29kVDiO8hm+eRi1onc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557481; c=relaxed/simple; bh=3i5hN70EkS+R2vT407APeWIAYo0I/+m93+hR8moAbAg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=GkjSOyBA+Kt5NJSJAtD9wZfXpTiXPR/m1c6trjR4x5aMGHSogfwgvTMFOqJBp0RJF8MR6GFistbMYGGvF7Omw9m6Awi6YQNnUqlfHL4MWKHzQe1yHrtWxDlm5zh8BMvaLR1lMdcoNXhKItgkLwj3hKo6Jn/vyKsfssukUtAk9vM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=PQ+dfe6i; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="PQ+dfe6i" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-46e610dc064so3413315e9.3 for ; Wed, 15 Oct 2025 12:44:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557477; x=1761162277; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Yj2U7Ks4Aai4rP5FlRiq75b6DNk0shSZ9f9hco/FDQo=; b=PQ+dfe6i6c47AyMoa8WfUf9jRhKT7OYaVZVa8EmBzD09KToG4E3iEy0XnDgnLLnZbq ii0IUp3ZxtXpMBOivOG7Dl9xaja8qNV75/0LpLJKbOHkZftTSjXCizN+0cWM2tZkmIrw 3fmTpGNG8FtFwIwPgNYv1pes3dtTb9g6PGrl3/0vga5pnVF6sQ/7Bz1xcOm3OyD32v2K ZawFk6uqAVqy1I9mhL9ey+90Tn5BHV3jPXSzCDO5B13uyQVW6EeXQx5jC1sB0GmlQlB7 DVtgQwlR1woth6tckcWnqukIJS25XjOKtfABeADezYyKt6mF65Lt+uvnZB0EyQ6+tRHD AYng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557477; x=1761162277; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Yj2U7Ks4Aai4rP5FlRiq75b6DNk0shSZ9f9hco/FDQo=; b=udtvJvTi5L26cnTK1z0tSjd1XQmmk2owiTXoeZ+rAO3fG9W3vxIh0F9QuiiJDUL+Se R7C+Dh1I9Xihvt3d14ebZm2Inhnsn9pPoi5zS+/xN0AD1kTY+IToExityM6Sa+Os37h/ M+EFxAYvJYT0mYcjgtyqKAl82W4Dn3UoKh4ZN0u9QGZKn6W2yvTJuAf1ttpIqMfsKdgn 5y3E0Mm9lgqaGdzrN+BReUVpvWAH3VWWrCd+HeF2A1Ty1WPDLA/4a0ALg9UZNxi370vz vYgiEO+h6mHRBLcgd8chyoGU2NIe3wcHpa6ArkXhKsjwEv8oyjPFkHyd6xOV5SQR2w1h LZWQ== X-Forwarded-Encrypted: i=1; AJvYcCUfPoZCsMyIBrLkD/bYXNI/Y2aanR8cmFkIgoezfRoa9vd0psjuujPCCKuQaCSgDjMb3TGGBWoA0Mfen+A=@vger.kernel.org X-Gm-Message-State: AOJu0YyLC29vsCmSOGkaVzb7O4UsyAIgSb5XFRScaA+atNpuP6CitTIA BOrWf9qsSwDKcOkyG5L20/1sN+6lG5gXNJawrP8ZMndfcvpphc23AJWc X-Gm-Gg: ASbGncsQzR1AX/M4t1FHev2ZdltWsBPMdXkYYb4+P/pt4Kc764drDPcRo8ugbM3EcGN rNPClvubSFWKsleSzuYM6mlirWrLHnATfeZ8GWrVPcsxDDbpoxkHxQ/cKtsvlklXuB87Z28ejqn AsqH5nENmXT46YVTVCIBUrlAusxOcZISQIvM3CMpKPHCxh+wdhFcSUUHeteq85X/XVN/hZ2CC0C XsixRMETMNzDCiGEgvPacCJH/h8FWcBPlFdD7kLL1zAbTN47EuJPLu1uYKnFIjhj5gVKLqWvClP A4E1mC3vXNNchKZVHgmntZIg+0E1wuod5YwVoRftIYGV+zqiComDojfbo3fhVsTCmb6hbqbF8Aq /C99Rm4wWH8cZAENpxLpsZBaP/x8q2JMifFhQ4qniZm+qEwa03fSFKdvfXerd/Co+eH0D5UBlqY qspXCOSpOrJJ8LC81NYe4t2eZa X-Google-Smtp-Source: AGHT+IG9nNYh1Tga30j2fYYBJBAKSBKjoyirMWGm3c9G6NcAqE/8JulL7YypdlXWl0e9Sv/xentthA== X-Received: by 2002:a05:600c:548b:b0:46e:3c73:2f9d with SMTP id 5b1f17b1804b1-46fa9b06c1bmr123745385e9.6.1760557477488; Wed, 15 Oct 2025 12:44:37 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:37 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Steffen Trumtrar Subject: [PATCH v6 09/11] ARM: dts: socfpga: removal of generic PE1 dts Date: Wed, 15 Oct 2025 19:44:14 +0000 Message-Id: <20251015194416.33502-10-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove the older socfpga_arria10_mercury_pe1.dts, since it is duplicate, the hardware is covered by the combination of Enclustra's .dtsi files. The older .dts was limited to only the case of having an Enclustra Mercury+ AA1 on a Mercury+ PE1 base board, booting from sdmmc. This functionality is provided also by the generic Enclustra dtsi and dts files, in particular socfpga_arria10_mercury_aa1_pe1_sdmmc.dts. Since both .dts files cover the same, the older one is to e replaced in favor of the more modularized approach. Signed-off-by: Lothar Rubusch Acked-by: Steffen Trumtrar --- arch/arm/boot/dts/intel/socfpga/Makefile | 1 - .../socfpga/socfpga_arria10_mercury_pe1.dts | 55 ------------------- 2 files changed, 56 deletions(-) delete mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _pe1.dts diff --git a/arch/arm/boot/dts/intel/socfpga/Makefile b/arch/arm/boot/dts/i= ntel/socfpga/Makefile index 7f69a0355ea5..73a912ec6d95 100644 --- a/arch/arm/boot/dts/intel/socfpga/Makefile +++ b/arch/arm/boot/dts/intel/socfpga/Makefile @@ -2,7 +2,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) +=3D \ socfpga_arria5_socdk.dtb \ socfpga_arria10_chameleonv3.dtb \ - socfpga_arria10_mercury_pe1.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_pe1.dt= s b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_pe1.dts deleted file mode 100644 index cf533f76a9fd..000000000000 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_pe1.dts +++ /dev/null @@ -1,55 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright 2023 Steffen Trumtrar - */ -/dts-v1/; -#include "socfpga_arria10_mercury_aa1.dtsi" - -/ { - model =3D "Enclustra Mercury+ PE1"; - compatible =3D "enclustra,mercury-pe1", "enclustra,mercury-aa1", - "altr,socfpga-arria10", "altr,socfpga"; - - aliases { - ethernet0 =3D &gmac0; - serial0 =3D &uart0; - serial1 =3D &uart1; - }; -}; - -&gmac0 { - status =3D "okay"; -}; - -&gpio0 { - status =3D "okay"; -}; - -&gpio1 { - status =3D "okay"; -}; - -&gpio2 { - status =3D "okay"; -}; - -&i2c1 { - status =3D "okay"; -}; - -&mmc { - status =3D "okay"; -}; - -&uart0 { - status =3D "okay"; -}; - -&uart1 { - status =3D "okay"; -}; - -&usb0 { - status =3D "okay"; - dr_mode =3D "host"; -}; --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7558430FF01 for ; Wed, 15 Oct 2025 19:44:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557482; cv=none; b=iCeJWuY9LemWYGXfDCCnNrf4V7CsoyrZ9ZpuuASoJ79n9aUvKU8+kgc1/GcJgbQr1zTU9RKrXqBNXnmHUUkKJn1FBhZPl9g3BZWksCkbtWXDhsELCS06ZOqvxSEYkpAZSvNqxgpK7XEs/XYT4wp2tkZPVSKADH6iMLH/AR07RZc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557482; c=relaxed/simple; bh=MBbQJW+NHrsJ62AtPx1M8sE2HSBkT7GHiLm3T35Aq1M=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ZllaLGhh7tXIen3bgk6DEGG36o0dkkaIaTiyUqZWZ54S0PxEWJF59itFUrrqM70sYEVpN5hYVlD6S2BNfpqq+kUqvfaGaaNGjzLAxG4Sg2z4QH0SzD2qUTFmac87CvnBHQ0zWJI9dtokMsRsJQAW9LQLmNULRMJJl75sJf1q/70= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=BEAn42dl; arc=none smtp.client-ip=209.85.221.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="BEAn42dl" Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-3edaa784f6dso435083f8f.3 for ; Wed, 15 Oct 2025 12:44:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557479; x=1761162279; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hoBQP/hGH1uLF8kGVmHkT4rf/U0Rs81FCeVO2XCGGEo=; b=BEAn42dl7ZGNnrnb8r0W5chHjp6Y7LTCwur1yfKyvkJ6GGyrD9ker/c4eFr5OsXbxy sT9ABxkpEnSG0CtdT/IVkb1GcleI3cVgSg0gyEISPt1gBx5ZyF9W6ygw1luTJRIPpi+O S+3zBQ6F0yJfVg7Kmd479TVPTYJtMexMitpmb2KTpLwBtxjNPDOiznqH72l1buIWiq2Y J08i8lR6BifEQWNshKdzgC7Y+Ca6deq4ZPpO2tppZXwj6UKhjf6QR1fNDbkbgNrfADyI /enOdSxsBD3y6tkp3l6ZIXmBSr/bcdmRJxGSH1plymSHIXSpONmvA57MSRGGkJEStViP gF9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557479; x=1761162279; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hoBQP/hGH1uLF8kGVmHkT4rf/U0Rs81FCeVO2XCGGEo=; b=AIoing9YwQXN3gjzvUIK73B1JLY0WdmoSm8R1zrs6Ze2usedH+pq2tGSQ1GQ5/styZ gteR5vXC9p2awzNJvN8bfMMx1NM78gcH4aiptXoo5IfZsFgbTeMmPyvItoTaDckLqL1W QC6zg/d7s2IswuDrqQZWx6vaDbvS4p02U4F4sqawq/IuREEbArh7bzKAS1T/UcnQRqvv ipZSJbY2KTR7sV4yqXd0luN01drUIGJL0G5InV7s7q3M4WNV4n41ZJ/R5RRWf+XeQGm8 KI9w3TWjUdWWSnpUGwKJfmv6IdlvvjP1w/6pr3m5id4+Vkm56jt6D+nZ+wVVkDuFmf1j dm1Q== X-Forwarded-Encrypted: i=1; AJvYcCXEjPrC34yXKaD+Di+p1zCdeJjhbwOr6VurzbO6UMVUygASKf/a0l6eeh+nL3hoTXHHHj1PP5LJD1iL3ig=@vger.kernel.org X-Gm-Message-State: AOJu0YzMtM6va3KwVcpWvgKLlZF+mUnhqlbZj8qyAOqPyw0QAb11apgU 1SanFvgN67IwR3kQYyXX9RILvf8OlTr2R1VemylI6iuAh8w1BnjeuLYB X-Gm-Gg: ASbGnctkL4PMEEkCTkvaRHLD9mU4xSW2mCxNi4tABSFFv7V9rj5VQLcBB5I4ert4j4N TqMcHA2QQigz4zfh1Tp7IyghVa8y4pt+Aa+WVjc53lmeQN9JmEP/eYwiPWo8CdXYvWWMNJe4Y4H Hi5hLJCWFr/Q0gTpTfE2S4zOUNyW+GyZn43/jikusKVLezC58TR/Tjd9Tb1B66wt0dKK72FwZGN y4Qh7httLDeqpJBNvUOlUTwrLQS2zI02I7F83Wda6FBoq0GRwroQA0M5PCWEPmPDcXdNpuyv8p3 TM+pDnamDEUWYS3PHKJzkaonrBGnhetSvrE8AhCMVnmXd+z1qZzBb9K7O6MQdwKAs6KTKqTB5Kr fp8H9wn0xdu8DEdB83JskM6FCTdGHVpjPMF73UMAnP6gwIWIdbz9Z7YmFRhlVZNRCVCHC01N7+2 xLs726mfP+UCtTaA== X-Google-Smtp-Source: AGHT+IEFnPBBNgrbjKe/zQNquXEgrG6ZSegL+rvJWEPlqjHP4bubJYt+JfDeTNKd86AxPjjrP4F9Kg== X-Received: by 2002:a05:6000:604:b0:3f3:1695:7c49 with SMTP id ffacd0b85a97d-4266e8e0af6mr10229731f8f.7.1760557478658; Wed, 15 Oct 2025 12:44:38 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:38 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v6 10/11] dt-bindings: altera: removal of generic PE1 dts Date: Wed, 15 Oct 2025 19:44:15 +0000 Message-Id: <20251015194416.33502-11-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove the binding for the generic Mercury+ AA1 on PE1 carrier board. The removed Mercury+ AA1 on PE1 carrier board is just a particular setup case, which is actually replaced by the set of generic Mercury+ AA1 combinations patch. In other words a combination of a Mercury+ AA1 on a PE1 base board, with boot mode SD card is already covered by the generic AA1 combinations. There is no further reason to keep this particular case now in a redundantly. Thus the redundant DT setup is removed. Signed-off-by: Lothar Rubusch Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/altera.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentat= ion/devicetree/bindings/arm/altera.yaml index 73ba3cbff026..db61537b7115 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -31,7 +31,6 @@ properties: - description: Mercury+ AA1 boards items: - enum: - - enclustra,mercury-pe1 - enclustra,mercury-aa1-pe1 - enclustra,mercury-aa1-pe3 - enclustra,mercury-aa1-st1 --=20 2.39.5 From nobody Fri Dec 19 20:51:20 2025 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7D6430FC28 for ; Wed, 15 Oct 2025 19:44:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557485; cv=none; b=Ro6mkNnGImBLd2IWMiorJRyriZa3/y8uuJCpZbe6I4+UAT5kW9Ol0i8+g++xJ9OAFhciDkNEUuc2ZdbSLtIBbThcBgQt7/R+F6fELwco7yWxIOlD5zbkqUf95IekJWuJQngaBEzlS///apCTaIyEFhxSXS74BskP0/2O2Pi4XI4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760557485; c=relaxed/simple; bh=g3c67g0JuAQ/MF5TeeywHnKyQWy5NcHxIAatThiSlk0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DgGGbfU4YCtsMIam0q1D6CDZfchnFjKy6lHSNDTa3oEMjTGuv4Yi2VaJvr1DTzoGeTvsv0TySGr4aQOd/WaPN4kdtpm24BcXHN5KSYRzzvgaWtMR/CmgEhyjFE8X81jUZc2ntjU8vHCnDMj0/8Td3HpZtcpSisrDVqWajWhjb/U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=l5LS+z62; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="l5LS+z62" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-47103531eeeso1313035e9.1 for ; Wed, 15 Oct 2025 12:44:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760557480; x=1761162280; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X0t4ELZpwdFTZdxiqhNSp7y3ezBf0UkavYUxtLN6k7g=; b=l5LS+z62+Veq1SO/IPrwvRqV++NbLG3c4WL7h9wLxm9t0hsD3egK54MKYq1l2SWmYL N/dpT4cFEdCo1YxGQY162V1CeiSmmLxyHfhYF0GP0x+p7ze53BP3EU6Wj/8nKmBcqwOa PCYNidGfwIhNUe+nsHFrpc9BRN/qIEq0sKqxlYqMv2UvsjF5QoNGy+toRyR619SMaYd/ tYZH62JlKnFi/tnwBO0h69wT0LXHYs2HCc3iRaGCZ2yAILM6A9bZeWbqzew3PunHvNN7 uDQC1BMxL0Kg6u/dibeMZsg+7vb7W0T1Zk7p6kTvWtPn34UIrrDi7vuoR+m93DS8OXNW gGlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760557480; x=1761162280; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X0t4ELZpwdFTZdxiqhNSp7y3ezBf0UkavYUxtLN6k7g=; b=julzrpPwzEqVlhqQ/JlXm4634WOGUV2bHCMZYVHcr8Keka200N1UZVWl5RfvHmvfu5 niEvSbKZNi2QNjkk/EVMJ9hcqmgRzAiwLa6TYl1JVtwxaqUXT0sct3IA7Xex2f0je5n0 fqqmEyZ68IjGhJ20VvnGNRmU1nXC8YCnAxHIxW38IJW69euOF4W5u406VynskQGFiO+g +bRZRT7Lm8MoLeLqWHfyqt+NC7L632Q1pyE99h+lR6tSibBqLRVZ9eejpLh0f0jdKiYl KBeycrJ+UL/zzwBDDNKSIFuqYYlmg94CLikxamzA4Zd7y+7mKZ5sJVHDvNThfb7RMc7I ri0A== X-Forwarded-Encrypted: i=1; AJvYcCWBCd9l58sk39X+z/nNxSO+LNIg4EtirPUOS4cgBiSrHMVTDG77yrs1WjvXK1AxHAlqxmHxmj0YqJ1guBg=@vger.kernel.org X-Gm-Message-State: AOJu0YwpTSpFHTra0ycSmVe9h9S3YR4YDy+S/ue1m3+C6tn8FpcompTf OHDBzl04u1cl5iU7xMN3tVk3MJYL/f1NCwUEkhKc/6S3DOAZjE2eHgva X-Gm-Gg: ASbGncuIoPG3pFl4pFg+JoA96klyvsGDJd8/pCUWemb4j23mcIPCTz5q/6b73GE/qn9 ddOLzmTFyGWlX6jnUf7/0eJUs3eZJB0V4CgE4X6TDkTEhkP5SQ0ZRzXOe4qPpeZ++498H5678bq I/QFMou+SmMI0KHJzL6WprYEv68ysvTQeqtvzgnz/iQaI/B3sgfs03ZYnmeCsvLvf0dXV/OTOvh iptz5KqdXp1QizGBXa6G0/nXOLUTWi575B2KTzFw+TEFwsMu+fHNYl2lgd5vKim/IvYvwGsUb+C Fo77Z0GH4ocjT8rA7JeexFMDtxEplObXmMcgmqBcuwSQft/YSB52j+ojFWI3SyqXKyUFz/P/R0m 2hrDT8oldL8CdEkHBLvcIE5MR/rRnu1OT46sgezS0D/yEXc89EhQgLD4C6Z6hJhRniNiQtBM1gA Ioe1EPK9f/DMR+iqVvJUj6lO8x6d58ddFHqDJcAakMj9G/+V53SVfl3LPbtiI= X-Google-Smtp-Source: AGHT+IFXOS6l7hNbQ6Qgd7a7LAjAdBl92r89g4mI/45u1/vUukXrYjISEjg9uQL0y7uwCZNCNptdCA== X-Received: by 2002:a05:600c:1f16:b0:46e:372e:bfe9 with SMTP id 5b1f17b1804b1-46fa9b1b317mr112364735e9.8.1760557479889; Wed, 15 Oct 2025 12:44:39 -0700 (PDT) Received: from d25728c254ff.v.cablecom.net (84-74-0-139.dclient.hispeed.ch. [84.74.0.139]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-426ce5825aasm30291626f8f.14.2025.10.15.12.44.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Oct 2025 12:44:39 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, martin.petersen@oracle.com, pabeni@redhat.com, rostedt@goodmis.org, bhelgaas@google.com, l.rubusch@gmail.com Cc: arnd@arndb.de, matthew.gerlach@altera.com, tien.fong.chee@altera.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 11/11] ARM: dts: socfpga: add Enclustra SoM dts files Date: Wed, 15 Oct 2025 19:44:16 +0000 Message-Id: <20251015194416.33502-12-l.rubusch@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251015194416.33502-1-l.rubusch@gmail.com> References: <20251015194416.33502-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the approach to set up a combination of Enclustra's SoM on a carrier board and corresponding boot-mode as single device-tree target. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/Makefile | 24 +++++++++++++++++++ .../socfpga_arria10_mercury_aa1_pe1_emmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe1_qspi.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe1_sdmmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe3_emmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe3_qspi.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe3_sdmmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_st1_emmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_st1_qspi.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_st1_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_pe1_emmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_pe1_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_pe3_emmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_pe3_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_st1_emmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_st1_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa1_st1_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa2_pe1_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa2_pe3_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa2_st1_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa2_st1_sdmmc.dts | 16 +++++++++++++ 25 files changed, 408 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _aa1_pe1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _aa1_pe1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _aa1_pe1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _aa1_pe3_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _aa1_pe3_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _aa1_pe3_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _aa1_st1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _aa1_st1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury= _aa1_st1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1_pe1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1_pe1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1_pe1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1_pe3_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1_pe3_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1_pe3_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1_st1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1_st1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa1_st1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa2_pe1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa2_pe1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa2_pe3_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa2_pe3_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa2_st1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercur= y_sa2_st1_sdmmc.dts diff --git a/arch/arm/boot/dts/intel/socfpga/Makefile b/arch/arm/boot/dts/i= ntel/socfpga/Makefile index 73a912ec6d95..8df0976da01c 100644 --- a/arch/arm/boot/dts/intel/socfpga/Makefile +++ b/arch/arm/boot/dts/intel/socfpga/Makefile @@ -2,6 +2,30 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) +=3D \ socfpga_arria5_socdk.dtb \ socfpga_arria10_chameleonv3.dtb \ + socfpga_arria10_mercury_aa1_pe1_emmc.dtb \ + socfpga_arria10_mercury_aa1_pe1_qspi.dtb \ + socfpga_arria10_mercury_aa1_pe1_sdmmc.dtb \ + socfpga_arria10_mercury_aa1_pe3_emmc.dtb \ + socfpga_arria10_mercury_aa1_pe3_qspi.dtb \ + socfpga_arria10_mercury_aa1_pe3_sdmmc.dtb \ + socfpga_arria10_mercury_aa1_st1_emmc.dtb \ + socfpga_arria10_mercury_aa1_st1_qspi.dtb \ + socfpga_arria10_mercury_aa1_st1_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa1_pe1_emmc.dtb \ + socfpga_cyclone5_mercury_sa1_pe1_qspi.dtb \ + socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa1_pe3_emmc.dtb \ + socfpga_cyclone5_mercury_sa1_pe3_qspi.dtb \ + socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa1_st1_emmc.dtb \ + socfpga_cyclone5_mercury_sa1_st1_qspi.dtb \ + socfpga_cyclone5_mercury_sa1_st1_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa2_pe1_qspi.dtb \ + socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa2_pe3_qspi.dtb \ + socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa2_st1_qspi.dtb \ + socfpga_cyclone5_mercury_sa2_st1_sdmmc.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 1_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 1_emmc.dts new file mode 100644 index 000000000000..b6cca0b5fd09 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_emmc.= dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ PE1 Base Board"; + compatible =3D "enclustra,mercury-sa1-pe1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 1_qspi.dts new file mode 100644 index 000000000000..6ad023477cd2 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_qspi.= dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model =3D "Enclustra Mercury+ AA1 on Mercury+ PE1 Base Board"; + compatible =3D "enclustra,mercury-aa1-pe1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_p= e1_sdmmc.dts new file mode 100644 index 000000000000..653c9a86516b --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_sdmmc= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model =3D "Enclustra Mercury+ AA1 on Mercury+ PE1 Base Board"; + compatible =3D "enclustra,mercury-aa1-pe1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 3_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 3_emmc.dts new file mode 100644 index 000000000000..ae9c7c6a2370 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_emmc.= dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model =3D "Enclustra Mercury+ AA1 on Mercury+ PE3 Base Board"; + compatible =3D "enclustra,mercury-aa1-pe3", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 3_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 3_qspi.dts new file mode 100644 index 000000000000..c3a0c30a07a5 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_qspi.= dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model =3D "Enclustra Mercury+ AA1 on Mercury+ PE3 Base Board"; + compatible =3D "enclustra,mercury-aa1-pe3", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe= 3_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_p= e3_sdmmc.dts new file mode 100644 index 000000000000..dc1e1ad20381 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_sdmmc= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model =3D "Enclustra Mercury+ AA1 on Mercury+ PE3 Base Board"; + compatible =3D "enclustra,mercury-aa1-pe3", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st= 1_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st= 1_emmc.dts new file mode 100644 index 000000000000..61d5e4c85d9b --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_emmc.= dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model =3D "Enclustra Mercury+ AA1 on Mercury+ ST1 Base Board"; + compatible =3D "enclustra,mercury-aa1-st1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st= 1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st= 1_qspi.dts new file mode 100644 index 000000000000..a3b99c9b16fd --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_qspi.= dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model =3D "Enclustra Mercury+ AA1 on Mercury+ ST1 Base Board"; + compatible =3D "enclustra,mercury-aa1-st1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st= 1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_s= t1_sdmmc.dts new file mode 100644 index 000000000000..5deb289e2b55 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_sdmmc= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model =3D "Enclustra Mercury+ AA1 on Mercury+ ST1 Base Board"; + compatible =3D "enclustra,mercury-aa1-st1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_p= e1_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_= pe1_emmc.dts new file mode 100644 index 000000000000..85d6146da0da --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_emmc= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ PE1 Base Board"; + compatible =3D "enclustra,mercury-sa1-pe1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_p= e1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_= pe1_qspi.dts new file mode 100644 index 000000000000..770ab680a18c --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_qspi= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ PE1 Base Board"; + compatible =3D "enclustra,mercury-sa1-pe1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_p= e1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1= _pe1_sdmmc.dts new file mode 100644 index 000000000000..990ca0fec61e --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_sdmm= c.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ PE1 Base Board"; + compatible =3D "enclustra,mercury-sa1-pe1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_p= e3_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_= pe3_emmc.dts new file mode 100644 index 000000000000..6c8fd5b0d6eb --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_emmc= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ PE3 Base Board"; + compatible =3D "enclustra,mercury-sa1-pe3", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_p= e3_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_= pe3_qspi.dts new file mode 100644 index 000000000000..3292426078a1 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_qspi= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ PE3 Base Board"; + compatible =3D "enclustra,mercury-sa1-pe3", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_p= e3_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1= _pe3_sdmmc.dts new file mode 100644 index 000000000000..1eb10b5244dd --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_sdmm= c.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ PE3 Base Board"; + compatible =3D "enclustra,mercury-sa1-pe3", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_s= t1_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_= st1_emmc.dts new file mode 100644 index 000000000000..8c97b5b3adea --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_emmc= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ ST1 Base Board"; + compatible =3D "enclustra,mercury-sa1-st1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_s= t1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_= st1_qspi.dts new file mode 100644 index 000000000000..e6d14b22e41d --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_qspi= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ ST1 Base Board"; + compatible =3D "enclustra,mercury-sa1-st1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_s= t1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1= _st1_sdmmc.dts new file mode 100644 index 000000000000..beaeca94d4df --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_sdmm= c.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model =3D "Enclustra Mercury SA1 on Mercury+ ST1 Base Board"; + compatible =3D "enclustra,mercury-sa1-st1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_p= e1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_= pe1_qspi.dts new file mode 100644 index 000000000000..6f79d9ed1d36 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_qspi= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model =3D "Enclustra Mercury+ SA2 on Mercury+ PE1 Base Board"; + compatible =3D "enclustra,mercury-sa2-pe1", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_p= e1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2= _pe1_sdmmc.dts new file mode 100644 index 000000000000..b94bd8bafc26 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_sdmm= c.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model =3D "Enclustra Mercury+ SA2 on Mercury+ PE1 Base Board"; + compatible =3D "enclustra,mercury-sa2-pe1", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_p= e3_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_= pe3_qspi.dts new file mode 100644 index 000000000000..51fc4a22937a --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_qspi= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model =3D "Enclustra Mercury+ SA2 on Mercury+ PE3 Base Board"; + compatible =3D "enclustra,mercury-sa2-pe3", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_p= e3_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2= _pe3_sdmmc.dts new file mode 100644 index 000000000000..e4209209f4fa --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_sdmm= c.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model =3D "Enclustra Mercury+ SA2 on Mercury+ PE3 Base Board"; + compatible =3D "enclustra,mercury-sa2-pe3", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_s= t1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_= st1_qspi.dts new file mode 100644 index 000000000000..ab4549a0d455 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_qspi= .dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model =3D "Enclustra Mercury+ SA2 on Mercury+ ST1 Base Board"; + compatible =3D "enclustra,mercury-sa2-st1", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_s= t1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2= _st1_sdmmc.dts new file mode 100644 index 000000000000..ebe62879c3fb --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_sdmm= c.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model =3D "Enclustra Mercury+ SA2 on Mercury+ ST1 Base Board"; + compatible =3D "enclustra,mercury-sa2-st1", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; --=20 2.39.5