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([103.218.174.23]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29034f941a5sm162808455ad.127.2025.10.14.05.02.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Oct 2025 05:02:36 -0700 (PDT) From: Sudarshan Shetty To: andersson@kernel.org Cc: konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, tessolveupstream@gmail.com Subject: [PATCH v3 1/2] dt-bindings: arm: qcom: Add QCS615 Talos EVK SMARC platform Date: Tue, 14 Oct 2025 17:32:22 +0530 Message-Id: <20251014120223.1914790-2-tessolveupstream@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251014120223.1914790-1-tessolveupstream@gmail.com> References: <20251014120223.1914790-1-tessolveupstream@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add binding support for the QCS615-based Talos EVK SMARC platform. Signed-off-by: Sudarshan Shetty --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index 0a3222d6f368..a323be3d2ba2 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -862,6 +862,7 @@ properties: - items: - enum: - qcom,qcs615-ride + - qcom,talos-evk - const: qcom,qcs615 - const: qcom,sm6150 =20 --=20 2.34.1 From nobody Fri Dec 19 18:59:25 2025 Received: from mail-pl1-f181.google.com (mail-pl1-f181.google.com [209.85.214.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89BE53112B7 for ; Tue, 14 Oct 2025 12:02:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760443365; cv=none; b=Qn2uHpsDjt5MxdfVl5csA7T+F9z1OJeJbAdoGCGYa6NxpKFH7izp5+sAnRXBPRaAa4niUgKprGr8tVewYxnSULwkNttXoFoxtsnRxEaQDjxB4GI41ZW9DQuSLsTbk6pZER03s4aBvgVuAzChP+ikXZbmkWeyiItqUFypwVy3t9k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760443365; c=relaxed/simple; bh=nwxFGhjne8niioCTlQUAmlqkYjbvQLqtVeG7lLZ5g7w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=uiMKOm94XyuzhaODU2b1phsSCdaF3J7WLfftOg0/tW2IQz71ahbiLERJYjYvJl1uNJp487YM60iVCtbHXSyEso8OUib9XsyqcGYkExHcOY18lLinndLlRSebOGbCrnHHdaDulaSn2Rx/MWfzluGBW1PRnlOgw/Y22PN/E2cz89Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Y4SHU9Xz; arc=none smtp.client-ip=209.85.214.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Y4SHU9Xz" Received: by mail-pl1-f181.google.com with SMTP id d9443c01a7336-2897522a1dfso48746555ad.1 for ; Tue, 14 Oct 2025 05:02:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1760443363; x=1761048163; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ikuugM7jNJHTOmMK4OgZ9YweQdNTosUeT9K/gZecsk0=; b=Y4SHU9XzmKedLqGXLmafqAPWLLzzy9AbqTJ7ihgWFswTeG/wtu/8sirOlZXcg079GJ rl6blDk2UWJW1yp/y4cYFR+yeo8009ma5YZBqs5P+lIqETNn6gocK8R1Tth4yZRLfqWV NYhFmAcGQrl6fNNKcVBj2lRBZeeh0aGCIMPXaDu/twcFgIAU1vDDLscMzZNZMsINeFml Q873kRS390RROB/QbIUK7nnQNSStCYtddQQB6ylhnNxaD+37KOC6fA08ZiCk9Yc6PdUL H0pYdL57SCTPMISQr7owThsxfMQCOzjTJSOEYNB3ulv+uViVwixWLCD/EjB1U3FGPVo+ xGJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760443363; x=1761048163; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ikuugM7jNJHTOmMK4OgZ9YweQdNTosUeT9K/gZecsk0=; b=EEleNnIzo6B/kPyAe7YPvWEjqbEgSZaJA/vvTGKWPqUEEUb641MFQzotG/Irv0Hlzo sufj/fe+5I7+Lg5V3KRh5V2/kyB6aDHQLGnmWljmu6nt8zFZh74fpBvF7zBRt72Q4NCG CkpazpnVqQtpYRDrm8AQOnRQTthaYVoA97JkKYY3fO357bg8ym0mTld4zv0pBxBljh+o eYGPRz9buFCLFOvX0471Vkl3tq883Jv5nDvSz2WyAAy/Gtlrc4gJrjnmQ1g6f8ENd7jj VI4XCZpvQn85t37Zwcv5YBysfIR12nPc6QoRu8BzY3071p7KQt0ft0sona2qJgprTfy8 NWPQ== X-Forwarded-Encrypted: i=1; AJvYcCVyW9wKfB1ztr8fuw26z0EH2by4bzSX3bNbZcR7v8bGZuY2Qm4FoIyEAqQ8EVelWkyYLaN5jW+e77U9dCw=@vger.kernel.org X-Gm-Message-State: AOJu0Yx7YRqTDZFN1W1I6/Qyx7tKZhyaVUaj28KFIv0naQTY5xjEZPxY prsQECGuulibtTMu9nepI7vW4vjjfQ7NieJqd9U47R6et7aivMikHatb X-Gm-Gg: ASbGncum58Pr9jVP+32M0VYo0Su8mw76FWrdLSAIsYUMHBMp/S0jFrEhoNMWivVAYNw vVFbkmDlL59QounX12J6dbyYylzY2swfkxzHcDSfNze5z3HSfLyFKy195xtWrp6vWL5+1gGqnv8 AC3tmOo+Q8BprSF8bkAITxYgvccU7OJsjl27JwX3+Kw+BQ+cDFoyp9I84Jp3DFsY/UGyVqvE6ns Bp47YR4md3iPwOGraaPb+m9WXGOXh8vI12bFrbh4XFt6KmRpD23d4HQA8SAc+2ZkJf31WVQpxkF eWHzp00H3DmTPNqSmQ0qcqsQSxx9UHuY2NNNo9s6PFRuvLiMZnT+cn9mmmimvTujnID1tC5mMfe tGKhlfn2AHP6YE8JWHM6jqrLJNmM8qznZjLbGFSrkUNp+QVWuAwKXv79LIacbdLZR24KGcbG9ev hDGQ== X-Google-Smtp-Source: AGHT+IElUHOYsYatpFKKmjOympKJ2XjbGqIFV2uTN7nKDDiQpTa/+xJi3CbhMjO4Jn/Zzda5LhF9pw== X-Received: by 2002:a17:902:da85:b0:249:f16:f086 with SMTP id d9443c01a7336-290272dededmr297889215ad.42.1760443362625; Tue, 14 Oct 2025 05:02:42 -0700 (PDT) Received: from test-HP-Desktop-Pro-G3.. ([103.218.174.23]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29034f941a5sm162808455ad.127.2025.10.14.05.02.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Oct 2025 05:02:42 -0700 (PDT) From: Sudarshan Shetty To: andersson@kernel.org Cc: konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, tessolveupstream@gmail.com Subject: [PATCH v3 2/2] arm64: dts: qcom: Add support for QCS615 talos evk board Date: Tue, 14 Oct 2025 17:32:23 +0530 Message-Id: <20251014120223.1914790-3-tessolveupstream@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251014120223.1914790-1-tessolveupstream@gmail.com> References: <20251014120223.1914790-1-tessolveupstream@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware components: the talos-evk-som and the talos-evk carrier board. The talos-evk-som is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications. The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up. This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems. The initial device tree includes basic support for: - CPU and memory - UART - GPIOs - Regulators - PMIC - Early console - AT24MAC602 EEPROM - MCP2515 SPI to CAN QCS615 talos-evk uses a Quectel AF68E WiFi/BT module (PCIe for WiFi and UART for Bluetooth), which is different from the RIDE platform. Plan to enable these in a follow-up patch series. Signed-off-by: Sudarshan Shetty --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/talos-evk-som.dtsi | 435 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/talos-evk.dts | 42 ++ 3 files changed, 478 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/talos-evk-som.dtsi create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 5b52f9e4e5f3..282d744acd73 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -305,6 +305,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D sm8650-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8650-qrd.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8750-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8750-qrd.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D talos-evk.dtb x1e001de-devkit-el2-dtbs :=3D x1e001de-devkit.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e001de-devkit.dtb x1e001de-devkit-el2.dtb x1e78100-lenovo-thinkpad-t14s-el2-dtbs :=3D x1e78100-lenovo-thinkpad-t14s.= dtb x1-el2.dtbo diff --git a/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi b/arch/arm64/boot/= dts/qcom/talos-evk-som.dtsi new file mode 100644 index 000000000000..55ec8034103d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi @@ -0,0 +1,435 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ +/dts-v1/; + +#include +#include +#include "sm6150.dtsi" +#include "pm8150.dtsi" +/ { + aliases { + mmc0 =3D &sdhc_1; + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + clocks { + sleep_clk: sleep-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <32764>; + #clock-cells =3D <0>; + }; + + xo_board_clk: xo-board-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <38400000>; + #clock-cells =3D <0>; + }; + }; + + extcon_usb_1: extcon-usb-1 { + compatible =3D "linux,extcon-usb-gpio"; + vbus-gpio =3D <&pm8150_gpios 6 GPIO_ACTIVE_HIGH>; + id-gpio =3D <&pm8150_gpios 7 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&usb1_vbus_det_default &usb1_id_det_default>; + pinctrl-names =3D "default"; + }; + + regulator-usb2-vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "USB2_VBUS"; + gpio =3D <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&usb2_en>; + pinctrl-names =3D "default"; + enable-active-high; + regulator-always-on; + }; + + vreg_v3p3_can: regulator-v3p3-can { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg-v3p3-can"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_v5p0_can: regulator-v5p0-can { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg-v5p0-can"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8150-rpmh-regulators"; + qcom,pmic-id =3D "a"; + + vreg_s3a: smps3 { + regulator-name =3D "vreg_s3a"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <650000>; + regulator-initial-mode =3D ; + }; + + vreg_s4a: smps4 { + regulator-name =3D "vreg_s4a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1829000>; + regulator-initial-mode =3D ; + }; + + vreg_s5a: smps5 { + regulator-name =3D "vreg_s5a"; + regulator-min-microvolt =3D <1896000>; + regulator-max-microvolt =3D <2040000>; + regulator-initial-mode =3D ; + }; + + vreg_s6a: smps6 { + regulator-name =3D "vreg_s6a"; + regulator-min-microvolt =3D <1304000>; + regulator-max-microvolt =3D <1404000>; + regulator-initial-mode =3D ; + }; + + vreg_l1a: ldo1 { + regulator-name =3D "vreg_l1a"; + regulator-min-microvolt =3D <488000>; + regulator-max-microvolt =3D <852000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l2a: ldo2 { + regulator-name =3D "vreg_l2a"; + regulator-min-microvolt =3D <1650000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l3a: ldo3 { + regulator-name =3D "vreg_l3a"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1248000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l5a: ldo5 { + regulator-name =3D "vreg_l5a"; + regulator-min-microvolt =3D <875000>; + regulator-max-microvolt =3D <975000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l7a: ldo7 { + regulator-name =3D "vreg_l7a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1900000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l8a: ldo8 { + regulator-name =3D "vreg_l8a"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1350000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l10a: ldo10 { + regulator-name =3D "vreg_l10a"; + regulator-min-microvolt =3D <2950000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l11a: ldo11 { + regulator-name =3D "vreg_l11a"; + regulator-min-microvolt =3D <1232000>; + regulator-max-microvolt =3D <1260000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l12a: ldo12 { + regulator-name =3D "vreg_l12a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1890000>; + regulator-initial-mode =3D ; + }; + + vreg_l13a: ldo13 { + regulator-name =3D "vreg_l13a"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3230000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l15a: ldo15 { + regulator-name =3D "vreg_l15a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1904000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l16a: ldo16 { + regulator-name =3D "vreg_l16a"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l17a: ldo17 { + regulator-name =3D "vreg_l17a"; + regulator-min-microvolt =3D <2950000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&i2c5 { + status =3D "okay"; + + eeprom@57 { + compatible =3D "atmel,24c02"; + reg =3D <0x57>; + pagesize =3D <16>; + }; + + eeprom@5f { + compatible =3D "atmel,24mac602"; + reg =3D <0x5f>; + pagesize =3D <16>; + }; +}; + +&pcie { + perst-gpios =3D <&tlmm 101 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 100 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&pcie_default_state>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie_phy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + + status =3D "okay"; +}; + +&pm8150_gpios { + usb2_en: usb2-en-state { + pins =3D "gpio10"; + function =3D "normal"; + output-enable; + power-source =3D <0>; + }; + + usb1_vbus_det_default: usb1-vbus-det-default-state { + pins =3D "gpio6"; + function =3D "normal"; + output-enable; + power-source =3D <0>; + }; + + usb1_id_det_default: usb1-id-det-default-state { + pins =3D "gpio7"; + function =3D "normal"; + output-enable; + power-source =3D <0>; + }; +}; + +&qupv3_id_0 { + status =3D "okay"; +}; + +&qupv3_id_1 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/qcs615/adsp.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/qcs615/cdsp.mbn"; + + status =3D "okay"; +}; + +&sdhc_1 { + pinctrl-0 =3D <&sdc1_state_on>; + pinctrl-1 =3D <&sdc1_state_off>; + pinctrl-names =3D "default", "sleep"; + + bus-width =3D <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + vmmc-supply =3D <&vreg_l17a>; + vqmmc-supply =3D <&vreg_s4a>; + + non-removable; + no-sd; + no-sdio; + + status =3D "okay"; +}; + +&spi6 { + status =3D "okay"; + + mcp2515@0 { + compatible =3D "microchip,mcp2515"; + reg =3D <0>; + clock-frequency =3D <20000000>; + interrupts-extended =3D <&tlmm 87 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency =3D <10000000>; + vdd-supply =3D <&vreg_v3p3_can>; + xceiver-supply =3D <&vreg_v5p0_can>; + }; +}; + +&tlmm { + pcie_default_state: pcie-default-state { + clkreq-pins { + pins =3D "gpio90"; + function =3D "pcie_clk_req"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-pins { + pins =3D "gpio101"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + + wake-pins { + pins =3D "gpio100"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; +}; + +&uart0 { + status =3D "okay"; +}; + +&usb_1_hsphy { + vdd-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + vdda-phy-dpdm-supply =3D <&vreg_l13a>; + + status =3D "okay"; +}; + +&usb_qmpphy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + + status =3D "okay"; +}; + +&usb_1 { + status =3D "okay"; +}; + +/* + * USB1 port supports both host and device modes. + * By default, it operates in device mode. + * To enable host mode, set switch SW1 to 'ON' position on the SoM. + */ + +&usb_1_dwc3 { + dr_mode =3D "otg"; + extcon =3D <&extcon_usb_1>; +}; + +&usb_hsphy_2 { + vdd-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + vdda-phy-dpdm-supply =3D <&vreg_l13a>; + + status =3D "okay"; +}; + +&usb_2 { + status =3D "okay"; +}; + +&usb_2_dwc3 { + dr_mode =3D "host"; +}; + +&ufs_mem_hc { + reset-gpios =3D <&tlmm 123 GPIO_ACTIVE_LOW>; + vcc-supply =3D <&vreg_l17a>; + vcc-max-microamp =3D <600000>; + vccq2-supply =3D <&vreg_s4a>; + vccq2-max-microamp =3D <600000>; + + status =3D "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + + status =3D "okay"; +}; + +&venus { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/talos-evk.dts b/arch/arm64/boot/dts/q= com/talos-evk.dts new file mode 100644 index 000000000000..25057f4f6a91 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/talos-evk.dts @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ +/dts-v1/; + +#include "talos-evk-som.dtsi" + +/ { + model =3D "Qualcomm QCS615 IQ 615 EVK"; + compatible =3D "qcom,talos-evk", "qcom,qcs615", "qcom,sm6150"; + chassis-type =3D "embedded"; + + aliases { + mmc1 =3D &sdhc_2; + }; +}; + +&pon_pwrkey { + status =3D "okay"; +}; + +&pon_resin { + linux,code =3D ; + + status =3D "okay"; +}; + +&sdhc_2 { + pinctrl-0 =3D <&sdc2_state_on>; + pinctrl-1 =3D <&sdc2_state_off>; + pinctrl-names =3D "default", "sleep"; + + bus-width =3D <4>; + cd-gpios =3D <&tlmm 99 GPIO_ACTIVE_LOW>; + + vmmc-supply =3D <&vreg_l10a>; + vqmmc-supply =3D <&vreg_s4a>; + + status =3D "okay"; +}; --=20 2.34.1