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Tue, 14 Oct 2025 04:32:54 -0700 (PDT) From: Anand Moon To: Vignesh Raghavendra , Siddharth Vadapalli , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-omap@vger.kernel.org (open list:PCI DRIVER FOR TI DRA7XX/J721E), linux-pci@vger.kernel.org (open list:PCI DRIVER FOR TI DRA7XX/J721E), linux-arm-kernel@lists.infradead.org (moderated list:PCI DRIVER FOR TI DRA7XX/J721E), linux-kernel@vger.kernel.org (open list) Cc: Anand Moon Subject: [PATCH v1 2/3] PCI: j721e: Use devm_clk_get_optional_enabled() to get the clock Date: Tue, 14 Oct 2025 17:02:28 +0530 Message-ID: <20251014113234.44418-3-linux.amoon@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251014113234.44418-1-linux.amoon@gmail.com> References: <20251014113234.44418-1-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Use devm_clk_get_optional_enabled() helper instead of calling devm_clk_get_optional() and then clk_prepare_enable(). It simplifies the error handling and makes the code more compact. This changes removes the unnecessary clk variable and assigns the result of the devm_clk_get_optional_enabled() call directly to pcie->refclk. This makes the code more concise and readable without changing the behavior. Cc: Siddharth Vadapalli Signed-off-by: Anand Moon --- v1: Drop explicit clk_disable_unprepare =E2=80=94 handled by devm_clk_get_o= ptional_enabled Since devm_clk_get_optional_enabled internally manages clk_prepare_enab= le and clk_disable_unprepare as part of its lifecycle, the explicit call to clk_disable_unprepare is redundant and can be safely removed. --- drivers/pci/controller/cadence/pci-j721e.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/contr= oller/cadence/pci-j721e.c index 9c7bfa77a66e..ed8e182f0772 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -479,7 +479,6 @@ static int j721e_pcie_probe(struct platform_device *pde= v) struct cdns_pcie_ep *ep =3D NULL; struct gpio_desc *gpiod; void __iomem *base; - struct clk *clk; u32 num_lanes; u32 mode; int ret; @@ -603,18 +602,11 @@ static int j721e_pcie_probe(struct platform_device *p= dev) goto err_get_sync; } =20 - clk =3D devm_clk_get_optional(dev, "pcie_refclk"); - if (IS_ERR(clk)) { - ret =3D dev_err_probe(dev, PTR_ERR(clk), "failed to get pcie_refclk\n"); - goto err_pcie_setup; - } - - ret =3D clk_prepare_enable(clk); - if (ret) { + pcie->refclk =3D devm_clk_get_optional_enabled(dev, "pcie_refclk"); + if (IS_ERR(pcie->refclk)) { ret =3D dev_err_probe(dev, ret, "failed to enable pcie_refclk\n"); goto err_pcie_setup; } - pcie->refclk =3D clk; =20 /* * Section 2.2 of the PCI Express Card Electromechanical @@ -630,7 +622,6 @@ static int j721e_pcie_probe(struct platform_device *pde= v) =20 ret =3D cdns_pcie_host_setup(rc); if (ret < 0) { - clk_disable_unprepare(pcie->refclk); goto err_pcie_setup; } =20 @@ -679,7 +670,6 @@ static void j721e_pcie_remove(struct platform_device *p= dev) =20 gpiod_set_value_cansleep(pcie->reset_gpio, 0); =20 - clk_disable_unprepare(pcie->refclk); cdns_pcie_disable_phy(cdns_pcie); j721e_pcie_disable_link_irq(pcie); pm_runtime_put(dev); --=20 2.50.1