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charset="utf-8" From: Palash Kambar On QCOM UFSHC V6 in MCQ mode, a race condition exists where simultaneous data and hibernate commands can cause data commands to be dropped when the Auto-Hibernate Idle Timer (AHIT) is near expiration. To mitigate this, AHIT is disabled before updating the SQ tail pointer, and re-enabled only when no active commands remain. This prevents conflicting command sequences from reaching the UniPro layer during critical timing windows. To support this: - Introduce a new vendor operation `compl_command` to allow vendors to handle command completion in a customized manner. - Update the argument list for the existing `setup_xfer_req` vendor operation to align with the updated UFS core interface. - Modify the Exynos-specific `setup_xfer_req` implementation to match the new interface and support the AHIT handling logic. Signed-off-by: Palash Kambar --- drivers/ufs/core/ufshcd.c | 6 ++++-- drivers/ufs/host/ufs-exynos.c | 6 +++++- include/ufs/ufshcd.h | 5 +++-- 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 568a449e7331..fd771d6c315e 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -2383,11 +2383,11 @@ void ufshcd_send_command(struct ufs_hba *hba, unsig= ned int task_tag, memcpy(dest, src, utrd_size); ufshcd_inc_sq_tail(hwq); spin_unlock(&hwq->sq_lock); + hba->vops->setup_xfer_req(hba, lrbp); } else { spin_lock_irqsave(&hba->outstanding_lock, flags); if (hba->vops && hba->vops->setup_xfer_req) - hba->vops->setup_xfer_req(hba, lrbp->task_tag, - !!lrbp->cmd); + hba->vops->setup_xfer_req(hba, lrbp); __set_bit(lrbp->task_tag, &hba->outstanding_reqs); ufshcd_writel(hba, 1 << lrbp->task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL); @@ -5637,6 +5637,7 @@ void ufshcd_compl_one_cqe(struct ufs_hba *hba, int ta= sk_tag, } cmd =3D lrbp->cmd; if (cmd) { + hba->vops->compl_command(hba, lrbp); if (unlikely(ufshcd_should_inform_monitor(hba, lrbp))) ufshcd_update_monitor(hba, lrbp); ufshcd_add_command_trace(hba, task_tag, UFS_CMD_COMP); @@ -5645,6 +5646,7 @@ void ufshcd_compl_one_cqe(struct ufs_hba *hba, int ta= sk_tag, /* Do not touch lrbp after scsi done */ scsi_done(cmd); } else { + hba->vops->compl_command(hba, lrbp); if (cqe) { ocs =3D le32_to_cpu(cqe->status) & MASK_OCS; lrbp->utr_descriptor_ptr->header.ocs =3D ocs; diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c index 70d195179eba..d87276f45e01 100644 --- a/drivers/ufs/host/ufs-exynos.c +++ b/drivers/ufs/host/ufs-exynos.c @@ -910,11 +910,15 @@ static int exynos_ufs_post_pwr_mode(struct ufs_hba *h= ba, } =20 static void exynos_ufs_specify_nexus_t_xfer_req(struct ufs_hba *hba, - int tag, bool is_scsi_cmd) + struct ufshcd_lrb *lrbp) { struct exynos_ufs *ufs =3D ufshcd_get_variant(hba); u32 type; + int tag; + bool is_scsi_cmd; =20 + tag =3D lrbp->task_tag; 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charset="utf-8" From: Can Guo In MCQ mode, a race condition can occur on QCOM UFSHC V6 when the Auto-Hibernate Idle Timer (AHIT) is close to expiring. If a data command and a hibernate command are issued simultaneously to the UniPro layer, the data command may be dropped. To prevent this, AHIT is disabled by reprogramming it to 0 before updating the SQ tail pointer. Once there are no active commands in the UFS host controller, the timer is re-enabled. This change ensures reliable command delivery in MCQ mode by avoiding timing conflicts between data and hibernate operations. Signed-off-by: Can Guo Co-developed-by: Palash Kambar Signed-off-by: Palash Kambar --- drivers/ufs/host/ufs-qcom.c | 35 +++++++++++++++++++++++++++++++++++ drivers/ufs/host/ufs-qcom.h | 1 + 2 files changed, 36 insertions(+) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 89a3328a7a75..f31239f4fc50 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1286,6 +1286,39 @@ static int ufs_qcom_icc_init(struct ufs_qcom_host *h= ost) return 0; } =20 +static void ufs_qcom_send_command(struct ufs_hba *hba, + struct ufshcd_lrb *lrbp) +{ + struct ufs_qcom_host *host =3D ufshcd_get_variant(hba); + unsigned long flags; + + if ((host->hw_ver.major =3D=3D 6 && host->hw_ver.minor =3D=3D 0 && + host->hw_ver.step =3D=3D 0) && hba->mcq_enabled) { + spin_lock_irqsave(hba->host->host_lock, flags); + if ((++host->active_cmds) =3D=3D 1) + /* Stop the auto-hiberate idle timer */ + ufshcd_writel(hba, 0, REG_AUTO_HIBERNATE_IDLE_TIMER); + spin_unlock_irqrestore(hba->host->host_lock, flags); + } +} + +static void ufs_qcom_compl_command(struct ufs_hba *hba, + struct ufshcd_lrb *lrbp) +{ + struct ufs_qcom_host *host =3D ufshcd_get_variant(hba); + unsigned long flags; + + if ((host->hw_ver.major =3D=3D 6 && host->hw_ver.minor =3D=3D 0 && + host->hw_ver.step =3D=3D 0) && hba->mcq_enabled) { + spin_lock_irqsave(hba->host->host_lock, flags); + if ((--host->active_cmds) =3D=3D 0) + /* Activate the auto-hiberate idle timer */ + ufshcd_writel(hba, hba->ahit, + REG_AUTO_HIBERNATE_IDLE_TIMER); + spin_unlock_irqrestore(hba->host->host_lock, flags); + } +} + /** * ufs_qcom_init - bind phy with controller * @hba: host controller instance @@ -2194,6 +2227,8 @@ static const struct ufs_hba_variant_ops ufs_hba_qcom_= vops =3D { .get_ufs_hci_version =3D ufs_qcom_get_ufs_hci_version, .clk_scale_notify =3D ufs_qcom_clk_scale_notify, .setup_clocks =3D ufs_qcom_setup_clocks, + .setup_xfer_req =3D ufs_qcom_send_command, + .compl_command =3D ufs_qcom_compl_command, .hce_enable_notify =3D ufs_qcom_hce_enable_notify, .link_startup_notify =3D ufs_qcom_link_startup_notify, .pwr_change_notify =3D ufs_qcom_pwr_change_notify, diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index 380d02333d38..a97da99361a8 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -308,6 +308,7 @@ struct ufs_qcom_host { u32 phy_gear; =20 bool esi_enabled; + unsigned long active_cmds; }; =20 struct ufs_qcom_drvdata { --=20 2.34.1