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Mon, 13 Oct 2025 22:28:07 -0700 (PDT) Received: from tixy.nay.do ([2405:201:8000:a149:4670:c55c:fe13:754d]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33b6192995asm14510106a91.0.2025.10.13.22.28.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Oct 2025 22:28:07 -0700 (PDT) From: Ankan Biswas To: akpm@linux-foundation.org Cc: lasse.collin@tukaani.org, visitorckw@gmail.com, skhan@linuxfoundation.org, khalid@kernel.org, david.hunter.linux@gmail.com, linux-kernel@vger.kernel.org, linux-kernel-mentees@lists.linux.dev, Ankan Biswas Subject: [PATCH v3] lib/xz: remove dead IA-64 (Itanium) support code Date: Tue, 14 Oct 2025 10:54:36 +0530 Message-ID: <20251014052738.31185-1-spyjetfayed@gmail.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Support for the IA-64 (Itanium) architecture was removed in commit cf8e8658100d ("arch: Remove Itanium (IA-64) architecture"). This patch drops the IA-64 specific decompression code from lib/xz, which was conditionally compiled with the now-obsolete CONFIG_XZ_DEC_IA64 option. Signed-off-by: Ankan Biswas Reviewed-by: Kuan-Wei Chiu Acked-by: Lasse Collin Reviewed-by: Khalid Aziz --- Changes in v3: - Removed log about IA-64 support in upstream Changes in v2: - Added second hunk to diff of xz_private.h lib/xz/xz_dec_bcj.c | 95 --------------------------------------------- lib/xz/xz_private.h | 4 -- 2 files changed, 99 deletions(-) diff --git a/lib/xz/xz_dec_bcj.c b/lib/xz/xz_dec_bcj.c index 8237db17eee3..610d58d947ab 100644 --- a/lib/xz/xz_dec_bcj.c +++ b/lib/xz/xz_dec_bcj.c @@ -20,7 +20,6 @@ struct xz_dec_bcj { enum { BCJ_X86 =3D 4, /* x86 or x86-64 */ BCJ_POWERPC =3D 5, /* Big endian only */ - BCJ_IA64 =3D 6, /* Big or little endian */ BCJ_ARM =3D 7, /* Little endian only */ BCJ_ARMTHUMB =3D 8, /* Little endian only */ BCJ_SPARC =3D 9, /* Big or little endian */ @@ -180,92 +179,6 @@ static size_t bcj_powerpc(struct xz_dec_bcj *s, uint8_= t *buf, size_t size) } #endif =20 -#ifdef XZ_DEC_IA64 -static size_t bcj_ia64(struct xz_dec_bcj *s, uint8_t *buf, size_t size) -{ - static const uint8_t branch_table[32] =3D { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 4, 4, 6, 6, 0, 0, 7, 7, - 4, 4, 0, 0, 4, 4, 0, 0 - }; - - /* - * The local variables take a little bit stack space, but it's less - * than what LZMA2 decoder takes, so it doesn't make sense to reduce - * stack usage here without doing that for the LZMA2 decoder too. - */ - - /* Loop counters */ - size_t i; - size_t j; - - /* Instruction slot (0, 1, or 2) in the 128-bit instruction word */ - uint32_t slot; - - /* Bitwise offset of the instruction indicated by slot */ - uint32_t bit_pos; - - /* bit_pos split into byte and bit parts */ - uint32_t byte_pos; - uint32_t bit_res; - - /* Address part of an instruction */ - uint32_t addr; - - /* Mask used to detect which instructions to convert */ - uint32_t mask; - - /* 41-bit instruction stored somewhere in the lowest 48 bits */ - uint64_t instr; - - /* Instruction normalized with bit_res for easier manipulation */ - uint64_t norm; - - size &=3D ~(size_t)15; - - for (i =3D 0; i < size; i +=3D 16) { - mask =3D branch_table[buf[i] & 0x1F]; - for (slot =3D 0, bit_pos =3D 5; slot < 3; ++slot, bit_pos +=3D 41) { - if (((mask >> slot) & 1) =3D=3D 0) - continue; - - byte_pos =3D bit_pos >> 3; - bit_res =3D bit_pos & 7; - instr =3D 0; - for (j =3D 0; j < 6; ++j) - instr |=3D (uint64_t)(buf[i + j + byte_pos]) - << (8 * j); - - norm =3D instr >> bit_res; - - if (((norm >> 37) & 0x0F) =3D=3D 0x05 - && ((norm >> 9) & 0x07) =3D=3D 0) { - addr =3D (norm >> 13) & 0x0FFFFF; - addr |=3D ((uint32_t)(norm >> 36) & 1) << 20; - addr <<=3D 4; - addr -=3D s->pos + (uint32_t)i; - addr >>=3D 4; - - norm &=3D ~((uint64_t)0x8FFFFF << 13); - norm |=3D (uint64_t)(addr & 0x0FFFFF) << 13; - norm |=3D (uint64_t)(addr & 0x100000) - << (36 - 20); - - instr &=3D (1 << bit_res) - 1; - instr |=3D norm << bit_res; - - for (j =3D 0; j < 6; j++) - buf[i + j + byte_pos] - =3D (uint8_t)(instr >> (8 * j)); - } - } - } - - return i; -} -#endif - #ifdef XZ_DEC_ARM static size_t bcj_arm(struct xz_dec_bcj *s, uint8_t *buf, size_t size) { @@ -509,11 +422,6 @@ static void bcj_apply(struct xz_dec_bcj *s, filtered =3D bcj_powerpc(s, buf, size); break; #endif -#ifdef XZ_DEC_IA64 - case BCJ_IA64: - filtered =3D bcj_ia64(s, buf, size); - break; -#endif #ifdef XZ_DEC_ARM case BCJ_ARM: filtered =3D bcj_arm(s, buf, size); @@ -699,9 +607,6 @@ enum xz_ret xz_dec_bcj_reset(struct xz_dec_bcj *s, uint= 8_t id) #ifdef XZ_DEC_POWERPC case BCJ_POWERPC: #endif -#ifdef XZ_DEC_IA64 - case BCJ_IA64: -#endif #ifdef XZ_DEC_ARM case BCJ_ARM: #endif diff --git a/lib/xz/xz_private.h b/lib/xz/xz_private.h index 8409784b1639..6775078f3cce 100644 --- a/lib/xz/xz_private.h +++ b/lib/xz/xz_private.h @@ -24,9 +24,6 @@ # ifdef CONFIG_XZ_DEC_POWERPC # define XZ_DEC_POWERPC # endif -# ifdef CONFIG_XZ_DEC_IA64 -# define XZ_DEC_IA64 -# endif # ifdef CONFIG_XZ_DEC_ARM # define XZ_DEC_ARM # endif @@ -103,7 +100,6 @@ */ #ifndef XZ_DEC_BCJ # if defined(XZ_DEC_X86) || defined(XZ_DEC_POWERPC) \ - || defined(XZ_DEC_IA64) \ || defined(XZ_DEC_ARM) || defined(XZ_DEC_ARMTHUMB) \ || defined(XZ_DEC_SPARC) || defined(XZ_DEC_ARM64) \ || defined(XZ_DEC_RISCV) --=20 2.51.0