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Tue, 14 Oct 2025 08:04:36 -0700 (PDT) From: Nick Chan Date: Tue, 14 Oct 2025 23:02:38 +0800 Subject: [PATCH RESEND v8 05/21] drivers/perf: apple_m1: Support configuring counters for 32-bit EL0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251014-apple-cpmu-v8-5-3f94d4a2a285@gmail.com> References: <20251014-apple-cpmu-v8-0-3f94d4a2a285@gmail.com> In-Reply-To: <20251014-apple-cpmu-v8-0-3f94d4a2a285@gmail.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Janne Grunau , Alyssa Rosenzweig , Neal Gompa , Sven Peter Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, devicetree@vger.kernel.org, asahi@lists.linux.dev, linux-kernel@vger.kernel.org, Nick Chan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1977; 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fpr=4B5278785C97ACF79C3C688301CA08B7A6C50824 Add support for configuring counters for 32-bit EL0 to allow adding support for implementations with 32-bit EL0. Signed-off-by: Nick Chan --- arch/arm64/include/asm/apple_m1_pmu.h | 2 ++ drivers/perf/apple_m1_cpu_pmu.c | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm64/include/asm/apple_m1_pmu.h b/arch/arm64/include/asm= /apple_m1_pmu.h index 02e05d05851f739b985bf416f1aa3baeafd691dc..8a667e7f07a517419c22a4f9309= 47347be8546f7 100644 --- a/arch/arm64/include/asm/apple_m1_pmu.h +++ b/arch/arm64/include/asm/apple_m1_pmu.h @@ -38,8 +38,10 @@ =20 #define SYS_IMP_APL_PMCR1_EL1 sys_reg(3, 1, 15, 1, 0) #define SYS_IMP_APL_PMCR1_EL12 sys_reg(3, 1, 15, 7, 2) +#define PMCR1_COUNT_A32_EL0_0_7 GENMASK(7, 0) #define PMCR1_COUNT_A64_EL0_0_7 GENMASK(15, 8) #define PMCR1_COUNT_A64_EL1_0_7 GENMASK(23, 16) +#define PMCR1_COUNT_A32_EL0_8_9 GENMASK(33, 32) #define PMCR1_COUNT_A64_EL0_8_9 GENMASK(41, 40) #define PMCR1_COUNT_A64_EL1_8_9 GENMASK(49, 48) =20 diff --git a/drivers/perf/apple_m1_cpu_pmu.c b/drivers/perf/apple_m1_cpu_pm= u.c index b5fe04ef186f04b4af32524fe433afb79979b791..fb2759069fe9e47146f0342fa46= e40f3ab836926 100644 --- a/drivers/perf/apple_m1_cpu_pmu.c +++ b/drivers/perf/apple_m1_cpu_pmu.c @@ -348,10 +348,16 @@ static void __m1_pmu_configure_event_filter(unsigned = int index, bool user, case 0 ... 7: user_bit =3D BIT(get_bit_offset(index, PMCR1_COUNT_A64_EL0_0_7)); kernel_bit =3D BIT(get_bit_offset(index, PMCR1_COUNT_A64_EL1_0_7)); + + if (system_supports_32bit_el0()) + user_bit |=3D BIT(get_bit_offset(index, PMCR1_COUNT_A32_EL0_0_7)); break; case 8 ... 9: user_bit =3D BIT(get_bit_offset(index - 8, PMCR1_COUNT_A64_EL0_8_9)); kernel_bit =3D BIT(get_bit_offset(index - 8, PMCR1_COUNT_A64_EL1_8_9)); + + if (system_supports_32bit_el0()) + user_bit |=3D BIT(get_bit_offset(index - 8, PMCR1_COUNT_A32_EL0_8_9)); break; default: BUG(); --=20 2.51.0