From nobody Sun Feb 8 09:22:54 2026 Received: from DM5PR21CU001.outbound.protection.outlook.com (mail-centralusazon11011043.outbound.protection.outlook.com [52.101.62.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F336429E0E1; Mon, 13 Oct 2025 19:37:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.62.43 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760384269; cv=fail; b=JdyHZVs48CvN98Wq+VA7FSme/ceFKcQaTA1yQf8AP77pvGGhGA2oT9wMWwIrOZ7qFiZOop6WaMTJvpj+dJjZj3P3nX8ZHvbHzSECW0tWimgC8MpxUxbfve+oboIjXr0tWvS43dS9goRo/wMkU/Ci6QcbHAyC6HQ5ePnbY4GmR4A= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760384269; c=relaxed/simple; bh=fmHe6bfL64nDGNj0u3+1fSiK+mmoYEv/EVwOj/WW5mo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eqtBMVue/stKwDmpaega75Jdt+W9bkr/7EpzFXdfInqkDmWRXP+l5gk3FYaz5fKUQIphKuD0tQUdVhhET+njbwgar/KYAnLFtCnLV++j5Wt3epsr2Qlqj8omJ7O4XDFim7meDaI4vRAnmS369mA7D3SXmWI/d5+HC/Hy4yEJnA4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=b0ypWHC3; arc=fail smtp.client-ip=52.101.62.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="b0ypWHC3" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=cwmeN5+QNBAntib+e1ijbjV8Fk7dW8hVhZKbXNXeLJ5G/tO2ITVvZp8L4xvSMrYGJgw6XN7aXDeNOHshFDXkeEWsa2jHPC7vsGj3xSA06GZVDL/WgyXpj/oJ64E2dzpkxcrZTUuQ3WC8RSBSpb1asuUsJG7aG0MztxKMJpbmRbiPXYEBLauQkQ4rOF808xdg991hnYu0KyimuKGqO29IoFawB28TsEPt94eZ54thuTGxVQ094A0dPKgzwc2CbdsA/EpFhP6Cia1X1boGO9EPOO3GoHLBgm4tXkZ1+I6KogoIYl88Adg2sU1iXTXWBqBAhLNjLmb+Lbei9KLkeUl+Zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=vyl0VD4Csmoz1eDpjo1nZwY3eOSxSZRl2lmZQRdRIMk=; b=ZG1XgdL1W71qhs4Lxi4VzxYPFZjQxoVDeDxwWfjbfwiwFVI6+lzt/aY0xNvjw45EVv2P71wizCXhYVGlw47rRw4Lvrf2vb7z3jJgD9EaqgrNA5niPk2V0TeXbH1BgGmC8RixbK7UsEIk9oARp694DJN9cdldU26e4Hdu2yrACiCFwl55Nt9AQAC4eEDwU1uPzCf6mcooE1LwXSXRTaIR+4VdHakHmVqgTfPVy27bXZTuDnPU4OuwEnz90RQKi2e/kt7zqIbVUhvnHdptqPgvmi8IBAyYxUMCmBj4V4Fe46lHTV/cIBd+8G9z/JYgOfgClMffBlbuRfW02Xw5tmFbhQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=vyl0VD4Csmoz1eDpjo1nZwY3eOSxSZRl2lmZQRdRIMk=; b=b0ypWHC3d2400JiWOG9q195k4+qj6PzXupS9HTPkNaTfoFocTQlT+ChtTK+D47Kojnz7rLPKqLHvsj2EWFKDlDMsdQdC0gltRmaESw7gLnL6jKW3CLcLCN5mKIPkVgFHFKcKwl8bzwLG2kh3dzVSxa6IcpJ4OcWLOIKu3JfyltY= Received: from MN2PR05CA0020.namprd05.prod.outlook.com (2603:10b6:208:c0::33) by IA1PR12MB8223.namprd12.prod.outlook.com (2603:10b6:208:3f3::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9203.12; Mon, 13 Oct 2025 19:37:45 +0000 Received: from MN1PEPF0000F0E4.namprd04.prod.outlook.com (2603:10b6:208:c0:cafe::8d) by MN2PR05CA0020.outlook.office365.com (2603:10b6:208:c0::33) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9228.8 via Frontend Transport; Mon, 13 Oct 2025 19:37:45 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by MN1PEPF0000F0E4.mail.protection.outlook.com (10.167.242.42) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.7 via Frontend Transport; Mon, 13 Oct 2025 19:37:44 +0000 Received: from titanite-d354host.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 13 Oct 2025 12:37:43 -0700 From: Avadhut Naik To: CC: , , , , Subject: [PATCH v3 1/2] RAS/AMD/ATL: Translate UMC normalized address to DRAM address using PRM Date: Mon, 13 Oct 2025 19:34:48 +0000 Message-ID: <20251013193726.2221539-2-avadhut.naik@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251013193726.2221539-1-avadhut.naik@amd.com> References: <20251013193726.2221539-1-avadhut.naik@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E4:EE_|IA1PR12MB8223:EE_ X-MS-Office365-Filtering-Correlation-Id: eecdc0fe-7d2e-4344-8be9-08de0a8ffb7c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?9J+wm5lpU1yOIGlZ3Bp5aqvy+WDjmTds/oEJew9OVJR50mBPNNGej68HeYhQ?= =?us-ascii?Q?cBWcIM7GdALZhI2bLEGWPpdOGJJPeWFQDqvY1a+CFCYzmCtArnI+wthW9/K+?= =?us-ascii?Q?eDvQLyToDEnP4KcJPlMBHB0nggMf12q9FLS7QZY8APJwKPIntuC/+CKWvAWI?= =?us-ascii?Q?XGNuCCFot+fu9RwH5hj3Ge0532Kg9TywR6QSvCce4kK8q3MvAhYorBkazBvN?= =?us-ascii?Q?imXBxC+R2YdD0pbiXl7VFI3nwhrSD8jPXRAnAnyVC454xJQE6fclLTffD2oh?= =?us-ascii?Q?mgiKhfMNktkdiRHArXUIvilNZ2F9agZZ+eTjvqyKqC345zX9awxBJjeJpyCO?= =?us-ascii?Q?vcOjrIICT+aSZhvnVSDJcYa25JGcgWLMS95tBB+pVdXGspLmhYwd26kn8XLP?= =?us-ascii?Q?ToqdrNq5mos2HE5FfmqOc1JWWtc0yA9jc+DLrEBM7p1vM3kRJc1jazdyRato?= =?us-ascii?Q?nBoP6GdlXVF7hFcH0Jhc0tPCnH7rJcKgEfQupdaAOhU35MSQdkmdIw4DcKs1?= =?us-ascii?Q?Gf2jgikyVDXZdBeW+addwXvWPdWKKcYovp3QhXYC6FFhsql1y6++7FgMDWI/?= =?us-ascii?Q?ZYeUt2Ot5PIrXVmcXfDPlMJEpLVXVECuje37MSyvXyQBMiWdWmfc8Pb4CPrX?= =?us-ascii?Q?yCFYZKn0rmw/IFYYUs277NzhuimsXSykr/KLXfJNBFnIAC7+ME509OvExg4p?= =?us-ascii?Q?MAv4tBhWHA/VpG5yQCIRfe9wklyy2ikwK6AvGEhQqcLUjT46bZwzpiIa+Y5Y?= =?us-ascii?Q?ImiKjbDvlE0mvqFTIYwnuyJhRvefGAZkSm7x5HkECZ9RfwhnB0k76M4rTCfU?= =?us-ascii?Q?Wm9OoTUma0YOcfSpNfW13pNSosWRCB0vxr/vx945s0q6ZhoNhMkVV+PgtZAI?= =?us-ascii?Q?xUtB8XhSzH/9UjnulNSrXt7ahO8pCynX+LI607MKBgcXLh9eL+mStsdfAkLz?= =?us-ascii?Q?E60Eg12tO5e9WB+vi84QxqSbewWvcU4FN4Kn2/o7YEmteUYtLDiUolm2cWHF?= =?us-ascii?Q?iOZ5WwUBNv+QYbWfy3E7O1FlBtJeF1iERfNsVea6WEi4uFMnwjM4EQloYXI5?= =?us-ascii?Q?/eV1+TD1FCdbKG3/CI1iJiDjqAt3dNcHeJ8UCakFDUZvXSdrnZKkPmjtji9q?= =?us-ascii?Q?gO9l84Fc5JsbgAkf3C5uCxxKghyI3eDfzor8GXWK2KGlYkJGEnXXdK/qWq0H?= =?us-ascii?Q?FSjM3IUixoHS+RPrPVAFbWmq681JWzbOyoGOh1wwmhUU+LVtXBrOhlkN46Q/?= =?us-ascii?Q?UVIzmM2rFWDz16gfO6FOnxnV8EWeTI43jf7anTpLMoPXWlGo1Q4FGK7faGT7?= =?us-ascii?Q?h+bbDXq8JJKZoWoA/K313ldv65ExZi3mnRI8Vf2dmLo5U387D9R8VwhC2631?= =?us-ascii?Q?Vihj5IQ53I7P6Ek9AdXN5d718PtN7a9RlzGfMUtvuIoo01oaFI/9YEgTBfMw?= =?us-ascii?Q?zbWPoewR7wwNoDgiDHFCgV6th2T2ayXBGjarpRRkpy8KxdvsRAzgq53Nl32Z?= =?us-ascii?Q?FpAQ8cpuNF3CdXPiRvw6uHsbirL8cGxvJXZ2Dhtomk81FCTnjPRbyOsMzHw7?= =?us-ascii?Q?Kq51Y5bdlEt5zHr++fA=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 19:37:44.8599 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eecdc0fe-7d2e-4344-8be9-08de0a8ffb7c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8223 Content-Type: text/plain; charset="utf-8" Modern AMD SOCs provide UEFI PRM module that implements various address translation PRM handlers.[1] These handlers can be invoked by the OS or hypervisor at runtime to perform address translations. On AMD's Zen-based SOCs, Unified Memory Controller (UMC) relative "normalized" address is reported through MCA_ADDR of UMC SMCA bank type on occurrence of a DRAM ECC error. This address must be converted into system physical address and DRAM address to export additional information about the error. Add support to convert normalized address into DRAM address through the appropriate PRM handler. Instead of logging the translated DRAM address locally, register the translating function when the Address Translation library is initialized. Modules like amd64_edac can then invoke the PRM handler to add the DRAM address to their error records. Additionally, it can also be exported through the RAS tracepont. [1] https://bugzilla.kernel.org/show_bug.cgi?id=3D220577 Signed-off-by: Avadhut Naik Reviewed-by: Yazen Ghannam --- Changes in v2: 1. Modified the commit message and linked kernel bugzilla as reference. 2. Removed unnecessary variables. 3. Renamed struct dram_addr to atl_dram_addr. Changes in v3: 1. Rebase on top of edac-for-next. 2. Add Reviewed-by: Yazen Ghannam --- drivers/ras/amd/atl/core.c | 3 ++- drivers/ras/amd/atl/internal.h | 9 +++++++++ drivers/ras/amd/atl/prm.c | 36 ++++++++++++++++++++++++++++++---- drivers/ras/amd/atl/umc.c | 9 +++++++++ drivers/ras/ras.c | 18 +++++++++++++++-- include/linux/ras.h | 19 +++++++++++++++++- 6 files changed, 86 insertions(+), 8 deletions(-) diff --git a/drivers/ras/amd/atl/core.c b/drivers/ras/amd/atl/core.c index 4197e10993ac..ca1646d030ca 100644 --- a/drivers/ras/amd/atl/core.c +++ b/drivers/ras/amd/atl/core.c @@ -207,7 +207,8 @@ static int __init amd_atl_init(void) =20 /* Increment this module's recount so that it can't be easily unloaded. */ __module_get(THIS_MODULE); - amd_atl_register_decoder(convert_umc_mca_addr_to_sys_addr); + amd_atl_register_decoder(convert_umc_mca_addr_to_sys_addr, + convert_umc_mca_addr_to_dram_addr); =20 pr_info("AMD Address Translation Library initialized\n"); return 0; diff --git a/drivers/ras/amd/atl/internal.h b/drivers/ras/amd/atl/internal.h index 2b6279d32774..3dad1a5860d6 100644 --- a/drivers/ras/amd/atl/internal.h +++ b/drivers/ras/amd/atl/internal.h @@ -279,18 +279,27 @@ int dehash_address(struct addr_ctx *ctx); =20 unsigned long norm_to_sys_addr(u8 socket_id, u8 die_id, u8 coh_st_inst_id,= unsigned long addr); unsigned long convert_umc_mca_addr_to_sys_addr(struct atl_err *err); +int convert_umc_mca_addr_to_dram_addr(struct atl_err *err, struct atl_dram= _addr *dram_addr); =20 u64 add_base_and_hole(struct addr_ctx *ctx, u64 addr); u64 remove_base_and_hole(struct addr_ctx *ctx, u64 addr); =20 #ifdef CONFIG_AMD_ATL_PRM unsigned long prm_umc_norm_to_sys_addr(u8 socket_id, u64 umc_bank_inst_id,= unsigned long addr); +int prm_umc_norm_to_dram_addr(u8 socket_id, u64 bank_id, + unsigned long addr, struct atl_dram_addr *dram_addr); #else static inline unsigned long prm_umc_norm_to_sys_addr(u8 socket_id, u64 umc= _bank_inst_id, unsigned long addr) { return -ENODEV; } + +static inline int prm_umc_norm_to_dram_addr(u8 socket_id, u64 bank_id, + unsigned long addr, struct atl_dram_addr *dram_addr) +{ + return -ENODEV; +} #endif =20 /* diff --git a/drivers/ras/amd/atl/prm.c b/drivers/ras/amd/atl/prm.c index 0931a20d213b..02c47c27690b 100644 --- a/drivers/ras/amd/atl/prm.c +++ b/drivers/ras/amd/atl/prm.c @@ -19,10 +19,11 @@ #include =20 /* - * PRM parameter buffer - normalized to system physical address, as descri= bed - * in the "PRM Parameter Buffer" section of the AMD ACPI Porting Guide. + * PRM parameter buffer - normalized to system physical address and normal= ized + * to DRAM address, as described in the "PRM Parameter Buffer" section of = the + * AMD ACPI Porting Guide. */ -struct norm_to_sys_param_buf { +struct prm_parameter_buffer { u64 norm_addr; u8 socket; u64 bank_id; @@ -33,9 +34,13 @@ static const guid_t norm_to_sys_guid =3D GUID_INIT(0xE71= 80659, 0xA65D, 0x451D, 0x92, 0xCD, 0x2B, 0x56, 0xF1, 0x2B, 0xEB, 0xA6); =20 +static const guid_t norm_to_dram_guid =3D GUID_INIT(0x7626C6AE, 0xF973, 0x= 429C, + 0xA9, 0x1C, 0x10, 0x7D, 0x7B, + 0xE2, 0x98, 0xB0); + unsigned long prm_umc_norm_to_sys_addr(u8 socket_id, u64 bank_id, unsigned= long addr) { - struct norm_to_sys_param_buf p_buf; + struct prm_parameter_buffer p_buf; unsigned long ret_addr; int ret; =20 @@ -55,3 +60,26 @@ unsigned long prm_umc_norm_to_sys_addr(u8 socket_id, u64= bank_id, unsigned long =20 return ret; } + +int prm_umc_norm_to_dram_addr(u8 socket_id, u64 bank_id, + unsigned long addr, struct atl_dram_addr *dram_addr) +{ + struct prm_parameter_buffer p_buf; + int ret; + + p_buf.norm_addr =3D addr; + p_buf.socket =3D socket_id; + p_buf.bank_id =3D bank_id; + p_buf.out_buf =3D dram_addr; + + ret =3D acpi_call_prm_handler(norm_to_dram_guid, &p_buf); + if (!ret) + return ret; + + if (ret =3D=3D -ENODEV) + pr_debug("PRM module/handler not available.\n"); + else + pr_notice_once("PRM DRAM Address Translation failed.\n"); + + return ret; +} diff --git a/drivers/ras/amd/atl/umc.c b/drivers/ras/amd/atl/umc.c index 6e072b7667e9..3f53f90dadc0 100644 --- a/drivers/ras/amd/atl/umc.c +++ b/drivers/ras/amd/atl/umc.c @@ -427,3 +427,12 @@ unsigned long convert_umc_mca_addr_to_sys_addr(struct = atl_err *err) =20 return norm_to_sys_addr(socket_id, die_id, coh_st_inst_id, addr); } + +int convert_umc_mca_addr_to_dram_addr(struct atl_err *err, struct atl_dram= _addr *dram_addr) +{ + u8 socket_id =3D topology_physical_package_id(err->cpu); + unsigned long addr =3D get_addr(err->addr); + u64 bank_id =3D err->ipid; + + return prm_umc_norm_to_dram_addr(socket_id, bank_id, addr, dram_addr); +} diff --git a/drivers/ras/ras.c b/drivers/ras/ras.c index ac0e132ccc3e..94f767be08ee 100644 --- a/drivers/ras/ras.c +++ b/drivers/ras/ras.c @@ -19,15 +19,20 @@ */ static unsigned long (*amd_atl_umc_na_to_spa)(struct atl_err *err); =20 -void amd_atl_register_decoder(unsigned long (*f)(struct atl_err *)) +static int (*amd_atl_umc_na_to_dram_addr)(struct atl_err *err, struct atl_= dram_addr *dram_addr); + +void amd_atl_register_decoder(unsigned long (*f1)(struct atl_err *), + int (*f2)(struct atl_err *, struct atl_dram_addr *)) { - amd_atl_umc_na_to_spa =3D f; + amd_atl_umc_na_to_spa =3D f1; + amd_atl_umc_na_to_dram_addr =3D f2; } EXPORT_SYMBOL_GPL(amd_atl_register_decoder); =20 void amd_atl_unregister_decoder(void) { amd_atl_umc_na_to_spa =3D NULL; + amd_atl_umc_na_to_dram_addr =3D NULL; } EXPORT_SYMBOL_GPL(amd_atl_unregister_decoder); =20 @@ -39,6 +44,15 @@ unsigned long amd_convert_umc_mca_addr_to_sys_addr(struc= t atl_err *err) return amd_atl_umc_na_to_spa(err); } EXPORT_SYMBOL_GPL(amd_convert_umc_mca_addr_to_sys_addr); + +int amd_convert_umc_mca_addr_to_dram_addr(struct atl_err *err, struct atl_= dram_addr *dram_addr) +{ + if (!amd_atl_umc_na_to_dram_addr) + return -EINVAL; + + return amd_atl_umc_na_to_dram_addr(err, dram_addr); +} +EXPORT_SYMBOL_GPL(amd_convert_umc_mca_addr_to_dram_addr); #endif /* CONFIG_AMD_ATL */ =20 #define CREATE_TRACE_POINTS diff --git a/include/linux/ras.h b/include/linux/ras.h index a64182bc72ad..f489da8b4722 100644 --- a/include/linux/ras.h +++ b/include/linux/ras.h @@ -42,15 +42,32 @@ struct atl_err { u32 cpu; }; =20 +struct atl_dram_addr { + u8 chip_select; + u8 bank_group; + u8 bank_addr; + u32 row_addr; + u16 col_addr; + u8 rank_mul; + u8 sub_ch; +} __packed; + #if IS_ENABLED(CONFIG_AMD_ATL) -void amd_atl_register_decoder(unsigned long (*f)(struct atl_err *)); +void amd_atl_register_decoder(unsigned long (*f1)(struct atl_err *), + int (*f2)(struct atl_err *, struct atl_dram_addr *)); void amd_atl_unregister_decoder(void); void amd_retire_dram_row(struct atl_err *err); unsigned long amd_convert_umc_mca_addr_to_sys_addr(struct atl_err *err); +int amd_convert_umc_mca_addr_to_dram_addr(struct atl_err *err, struct atl_= dram_addr *dram_addr); #else static inline void amd_retire_dram_row(struct atl_err *err) { } static inline unsigned long amd_convert_umc_mca_addr_to_sys_addr(struct atl_err *err) { return -EINVAL= ; } +static inline int amd_convert_umc_mca_addr_to_dram_addr(struct atl_err *er= r, + struct atl_dram_addr *dram_addr) +{ + return -EINVAL; +} #endif /* CONFIG_AMD_ATL */ =20 #endif /* __RAS_H__ */ --=20 2.43.0 From nobody Sun Feb 8 09:22:54 2026 Received: from SN4PR0501CU005.outbound.protection.outlook.com (mail-southcentralusazon11011026.outbound.protection.outlook.com [40.93.194.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46D4025783C; Mon, 13 Oct 2025 19:37:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.194.26 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760384280; cv=fail; b=e0lOnbbtdayz6EE/dIpqIBC8Yin/LRX75BB62TheskHs5kFcGy6/CYgA1gWyo5Jn3FZaKB+Rc5bpA09kvSHshuTLbgX78godzyfgZA3dLVbEq1SVeqlrWc1E0hZ9cixQgcTWu60UXzzzbaCdluYnYOsTVonFjN4Hh05Ub8k+zwc= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760384280; c=relaxed/simple; bh=ESEKelxi51aq0LV2woM+2k+l1PAw5Qacydc1NZnv4s8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=snspgy+lPEdWaxiVzOAWZKTBdi0foGPh5fDRZ2xVq03QOZ/FPx6CqX80fElLH0R2GKv9ibEoJtCWr3lyG6SKajk6Jm84trSkOeO2sGVsZjCnqgNam1bZFQfKMI6XEWbo0oseMTnZ0oQDvbNxGOUtm87uHwtHQbex5TEe3dWgVOw= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=Sl3MSCQd; arc=fail smtp.client-ip=40.93.194.26 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="Sl3MSCQd" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=t/B84MNjtOAsS6Jpc32YyMKfKhyH2Irg7eb2LKcNOrzP/GKpRX9aFm+k9f7WLKTKJ9UU+Il5z7+mAFr/frWc2hHxfHZoI0xXt0rXlxAM3CTuGbv/QEsF6akpKUji3+nuhk2sPWLTE7ILL5DOxc17+sYOEAYls/VMG2T1eIAJOxJ2QBRftdL++0wPwXzboupanqwgEMFkutXdAHYsnoj0tneW5WIlLvF4vY2ZOtrutJfiVxumkcIQj5e2Jb3NwRcPr7HpDA8YWrMHjmcwOKUE8n9jpp267wmyTwUBTaKdx/XtVXxfNZ3xNyHRvzjhJ3mm0OICWatVB6Zfaq6rARQMyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=+AwJB9xqAuKuR1d8649BsNj5q2CUFBWw493yJiFtDYU=; b=M27joUkPPW2r61CeiJ3HcI4IsXZXMFGKjLpUVaiT3uKJG7hxRikjyodRAR1CkEqxKcJzU2zhZmitQdgl/8frU3EnIxDwc+fV5UXKYKjZlHCtTEGmY/NofptTeDsXHufZ9EKnFS8NTMDI6hyu5cLakN/S5uwpweRX9d8U9IB8Zky/5Z9NsE5V38QX7xq4r+xnXk3HjiGtGarrdKbjgOYyv56PTI5KJSIej+wbOo/z/jDkXWzXdi3A90zEIN1k3eIeJs2CRkWFEevav9NiwrmtC5dAFL1YsvK5ijvfQejXCUu+RFoN6KyhHLF6OvlGsSsTM2X8hyLCqr5wBum608zMXg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=+AwJB9xqAuKuR1d8649BsNj5q2CUFBWw493yJiFtDYU=; b=Sl3MSCQdpJKy+mFYnWxM3o5JqFlmjM+mz7d+CPUK2/liQtzyaIN5cwH2fBYbkCHaXYhsKdRZ5rO2f5FjZ+eNl1oG9O9ktu1ZEXrsElfvLsSkKNd6mBifzlrxnwBYMxI7uqJtOhiZ5EUheRIl8skOU3eOgq5FBKNIloVrCzmRP1Q= Received: from MN2PR05CA0010.namprd05.prod.outlook.com (2603:10b6:208:c0::23) by IA1PR12MB9531.namprd12.prod.outlook.com (2603:10b6:208:596::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9203.12; Mon, 13 Oct 2025 19:37:56 +0000 Received: from MN1PEPF0000F0E4.namprd04.prod.outlook.com (2603:10b6:208:c0:cafe::2) by MN2PR05CA0010.outlook.office365.com (2603:10b6:208:c0::23) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9228.7 via Frontend Transport; Mon, 13 Oct 2025 19:37:56 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by MN1PEPF0000F0E4.mail.protection.outlook.com (10.167.242.42) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.7 via Frontend Transport; Mon, 13 Oct 2025 19:37:56 +0000 Received: from titanite-d354host.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 13 Oct 2025 12:37:54 -0700 From: Avadhut Naik To: CC: , , , , Subject: [PATCH v3 2/2] EDAC/amd64: Incorporate DRAM Address in EDAC message Date: Mon, 13 Oct 2025 19:34:49 +0000 Message-ID: <20251013193726.2221539-3-avadhut.naik@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251013193726.2221539-1-avadhut.naik@amd.com> References: <20251013193726.2221539-1-avadhut.naik@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E4:EE_|IA1PR12MB9531:EE_ X-MS-Office365-Filtering-Correlation-Id: 1e8d69c3-d006-4407-6dba-08de0a900252 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?9/RFFtf8KzZre9CPQlrbVkCZpm+50lI0ZXb5i4GAye7FC66c5xbcCv3cmf5B?= =?us-ascii?Q?NUloiaYG7oSERxIrV4PEVKWX8ApVe1A1LjWeMngUSXymLYenw+HT9bnz95pb?= =?us-ascii?Q?YThjsngO7qkyEkN2sFXtK7oobtIgpoWCsMotyHvq4R4k+WLxQe+qGOu7yLy/?= =?us-ascii?Q?oeZv3MulBQ8j14dMh6CeBPIoBcMVX/8CeScCsrPI7ra0xwRWgHZHWD3lCQk8?= =?us-ascii?Q?9+uk/++XrbwN9G0DHOqepoZnVYvocwrymuTImH72WPq3rqbWeCbN2uqq4cSN?= =?us-ascii?Q?MnprxCrDHEsankpJ4ww/wcSMRig7t/K0iRAx1PJHNuqS+ktc/dQDbprcXcyX?= =?us-ascii?Q?P34qr9JFYjEZLXcziOkTGVWOEaMihkiZfnWmIb8jvjSbuCCM6quj32W9EAWt?= =?us-ascii?Q?orn9UuCNaigVQGVT9d3yWidRXUtd5fDwJj7vb52+1lp3oorTC1veNErnSzBZ?= =?us-ascii?Q?F8oQcFyeWQTeM9bfWhF6o928kx5CT6c3vzyq4QUnwxKv9gLBWiUM4rtprkDc?= =?us-ascii?Q?Jp/kxVrnoX8Gq0OGgmfNMNvX+rCCw1p76IFr6VbfP+BSl9ougyzCTfvr+uQq?= =?us-ascii?Q?xK7x4zYxwAUCBzIV6OOYhihzcTW4CoIvNFeOGlRJolFnQfhXWAo2Z6dT2fzD?= =?us-ascii?Q?SFngOssuPzt0TRIMoIhxKYWokKtc/GKY4cAuxYKNvDoXWIaFl/O1qII6vOdx?= =?us-ascii?Q?HjzCq1LPpMXQvKWBwFLnhZdSkqNGDSTHyuzyq37S89peO3hgkHK3R9FieqJP?= =?us-ascii?Q?kVogzSG4B8vdVEo7i5s2SKqwW5339rfm1PZqqxP9lPdKY2Jtlqvg2c473pUe?= =?us-ascii?Q?n32a46g+rR8iRu22d2RiYw9LS+jOXR/qaYVgiwvEuoDdVJUq7Up2Otwq3dGd?= =?us-ascii?Q?8H+mMDDoLk6Yh6Twe99nPuiWCrfOYSsXP8yPUjKhWMsyGbOekxrAci5+vBX8?= =?us-ascii?Q?HUo02E6QwO0Drq68HOFpI1FVv8r1l61hzKUuJafEFhJRrh4pdPBkBPQHjrm3?= =?us-ascii?Q?wxo0Ux1Wc4ZJyHGbJ52RL5S0kqXO2QMcqCiLJPBdhoS+YKPkneIZtOdg7aL+?= =?us-ascii?Q?urErP/BRMqXSGY6TeAD9+FhGsvJFGmABcIy5t2Rffu31EM/sHfFQldGm0OV6?= =?us-ascii?Q?c+i7Ew1wIhuDgmp5nk4K7TIUIr27P7BXai/2QwcuxbwuVwnz/uMtkSR5Qs3V?= =?us-ascii?Q?APmcMIdJhkXNRREZ+ecIlvYQnkXnoyYPzU/YEVvs0a+5reTlAG5q/lh+uZhM?= =?us-ascii?Q?xjAocVHUIvMqz0tvM6Q6ipaqhXdpydweP7TcP6QOsZAueV5MTQPzIrDwBtZz?= =?us-ascii?Q?Yt8S+8bDCe4PYvBeIby92jkn3kS3FM1zSuU1gbTn3lVw2iz5GUOemwt/cSW0?= =?us-ascii?Q?WPnOGTGErJIsLYBjOZXg6e5WU2b41oK5qXksvoq8sF+PWi7vD2gFokuMNqJ9?= =?us-ascii?Q?zmMTkkMVwNMFKy47YrRhddvrHgC21mkgeDv5m9vjtTgBpdOuORBk+GQxYRJZ?= =?us-ascii?Q?PTOWoKlLCtwWzgrBFME/RLDA4U9ZVlsiyy1p78Dc0PnX3ocJuZ2qG4MMqZxk?= =?us-ascii?Q?lmHOLvy++JwQEVVfamM=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 19:37:56.3280 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e8d69c3-d006-4407-6dba-08de0a900252 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB9531 Content-Type: text/plain; charset="utf-8" Currently, the amd64_edac module provides decoded error data to the EDAC interface. This data involves the system physical address (PFN + offset). Furthermore, the UMC normalized address, gathered from MCA error decoding, is also provided. The DRAM Address on which the error has occurred, however, is not provided. Use the new PRM call in the AMD Address Translation Library to gather the DRAM address of an error. Include this data in the EDAC 'string' so it is available in the kernel messages and the RAS tracepoint. Signed-off-by: Avadhut Naik Reviewed-by: Yazen Ghannam --- Changes in v2: 1. Modify commit message per feedback received. 2. Pass the DRAM Address to edac_mc_handle_error() through "other_detail" parameter instead of "msg". 3. Replace sprintf call with scnprintf in __log_ecc_error(). Changes in v3: 1. Rebase on top of edac-for-next. 2. Add Reviewed-by: Yazen Ghannam --- drivers/edac/amd64_edac.c | 23 ++++++++++++++++++++++- drivers/edac/amd64_edac.h | 1 + 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 2f6ab783bf20..856a78175885 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2709,6 +2709,9 @@ static void __log_ecc_error(struct mem_ctl_info *mci,= struct err_info *err, { enum hw_event_mc_err_type err_type; const char *string; + char s[100]; + + memset(s, 0, sizeof(s)); =20 if (ecc_type =3D=3D 2) err_type =3D HW_EVENT_ERR_CORRECTED; @@ -2724,6 +2727,17 @@ static void __log_ecc_error(struct mem_ctl_info *mci= , struct err_info *err, switch (err->err_code) { case DECODE_OK: string =3D ""; + + if (err->dram_addr) { + scnprintf(s, sizeof(s), "Cs: 0x%x Bank Grp: 0x%x Bank Addr: 0x%x Row: 0= x%x Column: 0x%x RankMul: 0x%x SubChannel: 0x%x", + err->dram_addr->chip_select, + err->dram_addr->bank_group, + err->dram_addr->bank_addr, + err->dram_addr->row_addr, + err->dram_addr->col_addr, + err->dram_addr->rank_mul, + err->dram_addr->sub_ch); + } break; case ERR_NODE: string =3D "Failed to map error addr to a node"; @@ -2748,7 +2762,7 @@ static void __log_ecc_error(struct mem_ctl_info *mci,= struct err_info *err, edac_mc_handle_error(err_type, mci, 1, err->page, err->offset, err->syndrome, err->csrow, err->channel, -1, - string, ""); + string, s); } =20 static inline void decode_bus_error(int node_id, struct mce *m) @@ -2808,11 +2822,13 @@ static void umc_get_err_info(struct mce *m, struct = err_info *err) static void decode_umc_error(int node_id, struct mce *m) { u8 ecc_type =3D (m->status >> 45) & 0x3; + struct atl_dram_addr dram_addr; struct mem_ctl_info *mci; unsigned long sys_addr; struct amd64_pvt *pvt; struct atl_err a_err; struct err_info err; + int ret; =20 node_id =3D fixup_node_id(node_id, m); =20 @@ -2822,6 +2838,7 @@ static void decode_umc_error(int node_id, struct mce = *m) =20 pvt =3D mci->pvt_info; =20 + memset(&dram_addr, 0, sizeof(dram_addr)); memset(&err, 0, sizeof(err)); =20 if (m->status & MCI_STATUS_DEFERRED) @@ -2853,6 +2870,10 @@ static void decode_umc_error(int node_id, struct mce= *m) goto log_error; } =20 + ret =3D amd_convert_umc_mca_addr_to_dram_addr(&a_err, &dram_addr); + if (!ret) + err.dram_addr =3D &dram_addr; + error_address_to_page_and_offset(sys_addr, &err); =20 log_error: diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index d70b8a8d0b09..5d82e052746d 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -399,6 +399,7 @@ struct err_info { u16 syndrome; u32 page; u32 offset; + struct atl_dram_addr *dram_addr; }; =20 static inline u32 get_umc_base(u8 channel) --=20 2.43.0