From nobody Fri Dec 19 19:04:52 2025 Received: from mail-pj1-f46.google.com (mail-pj1-f46.google.com [209.85.216.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26B6C30B516 for ; Mon, 13 Oct 2025 21:56:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760392584; cv=none; b=ENbs+tQLvIfgbcn8EW1ENhEQ9v3BxyFopca9Ja5pswJf3TFLr1YWDy/oOkYL5FEIjVAUIUsM++JfrH1MSY7ibMV1ARASivkYotf9f2p4ZaLpLXa/dvWsMgRFiunhEyL8MHMpwqxcgTCaa1OOxNireWM+59QNKYrY0BnbzKOMSKY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760392584; c=relaxed/simple; bh=HpHI2zP/MHNPN2ZG0jq8qy7AdU5skeePc4YpaV5sqak=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ddbBhTBJiA+kUcBlMq6iO19G0H/PoJE4+j3ofj3+3dsClB53qikm69fIa64qtqpboSDrb+XPhiQBupkgBbnFi3m4xb5Jx7XVyY0CtV+japCqFpViiSYXOVnpIrnNU895QzAt0JyCVJEvT9qQb40bdayzU9VRN0cqu/N832pUKGs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc.com header.i=@rivosinc.com header.b=L868amDc; arc=none smtp.client-ip=209.85.216.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc.com header.i=@rivosinc.com header.b="L868amDc" Received: by mail-pj1-f46.google.com with SMTP id 98e67ed59e1d1-3322e63602eso6280334a91.0 for ; Mon, 13 Oct 2025 14:56:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc.com; s=google; t=1760392581; x=1760997381; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=2zbm+cvasSeWoh5NRRT51waj2rRu/qBUWCUacGfv0Qo=; b=L868amDc3XM0X1Ui+Nm1iDFOY0XopYwCAQWlnroda7BY096AGKypbzOOe7zMt6pqaP yQPzS1snvU7hqYIWn1nDlitfk1P15N14Qx2JVy6V3IPRoW+p2PmB5GFIn15PutKkKtJd kPO7SlaoUIi+bmcc+f4RgfIqoYHtva+eMWEkY9Q1ra7wOahPSS563wTVsLKSO6Pn0KiI +y+fmHm3vmMk7dnKZTT0+5iD45ZTk2ciUMyRi8HtJ7Yt2Zec614GyLgg1mv8+Z/jjg7j S1eYfmF+G5VAfzkrZfaVGbi+c4I767QdIyDKFzSJJkOOr1R2E48rU2/J7dj97XjTDOvv BroA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760392581; x=1760997381; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2zbm+cvasSeWoh5NRRT51waj2rRu/qBUWCUacGfv0Qo=; b=PSMERuZsiEH2N6CLUFFRGfGJS+4BHi2atkLjwx1p/31Sfy2a/QyLDDMMv3lrNEAMOx gt06uZUZwXZPEV7v7O0/KmH7wmmriiP8ziDAx3EZ6o78CiY8vEem0HIxivuP0U5Bh3wI BdFy6a8DskPvHMeyxLE+Ingw+r+BzrotoZyJxtpC9ipyEvILL5DhACfrjMdAm96BfXgJ Fh1+3+IyiQ4eMuv0GAI+azzWIaASYlvjTehVmGDiXKGkC6PbbRXKJcBSIAmz886oSmcA j8nLEHY+igZi/96NO0kAlqNkb9HRRK0bH9oZKWa7LYhmCXBVKroQgLohcw1ig48+7sMB 9vtw== X-Gm-Message-State: AOJu0Ywn9VGPUs+tye5TyeF9w0yQyDX5L2ZMj5a8WwLKjFoBIcbhaQ76 uIASpKu+nGmk63FOvnBg8WCFZy53Gh0soOTvNvM1HzdufEHCuLzc8sfBKUR+CtYKgnw= X-Gm-Gg: ASbGncsyoTPrcyj7lp+11bucLC8TWAQGGSdRopkpQ+IIs0k8FGF1MZlXT8B6UgVN8yO 6J5p11BM8OQV5lDzMabSLRlwYyOPVnO4fuDnoIHOXns8Q1KCw9o3nQDm6vxgn5kwQvyTF7pBVwn ds7Ra1z4y9TsXqdARUh61nRanMNkW4UyyvqaZ3gn4p8Mnj4PIdgB63VPD2XrqDuJtVGjFwbfoo8 XsY44Knyj3COnErJug5eqouc1qvdk3VtWyj8QhjCyKRsUPR/8fxV9JnCe2tKUF8Q7ViTeEceThs DrALXkNP1uSqY1UIyLrEox9I/VzdleFypePO4TK4CbQC3nSpF2qiKF1FYUY5Q/xPPfaj4c+Vzlz rUkEfE3lwLAK6CN5UxKRnIksR7DHiFjRSx4xsvqtz57YQWKuuuEtzh9+S3Fk2Mw== X-Google-Smtp-Source: AGHT+IH2aM16uziaM+H2JTzUiIlcdNp/HFJgSd8zU/93dEXG3WxK3O7M3bw31zbvPmN0Ojf7SBbvIA== X-Received: by 2002:a17:90b:1b43:b0:32e:18f2:7a59 with SMTP id 98e67ed59e1d1-33b5116251cmr34255365a91.11.1760392581262; Mon, 13 Oct 2025 14:56:21 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33b626bb49esm13143212a91.12.2025.10.13.14.56.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Oct 2025 14:56:20 -0700 (PDT) From: Deepak Gupta Date: Mon, 13 Oct 2025 14:56:02 -0700 Subject: [PATCH v20 10/28] riscv/mm: Implement map_shadow_stack() syscall Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251013-v5_user_cfi_series-v20-10-b9de4be9912e@rivosinc.com> References: <20251013-v5_user_cfi_series-v20-0-b9de4be9912e@rivosinc.com> In-Reply-To: <20251013-v5_user_cfi_series-v20-0-b9de4be9912e@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Benno Lossin Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org, Zong Li , Deepak Gupta X-Mailer: b4 0.13.0 As discussed extensively in the changelog for the addition of this syscall on x86 ("x86/shstk: Introduce map_shadow_stack syscall") the existing mmap() and madvise() syscalls do not map entirely well onto the security requirements for shadow stack memory since they lead to windows where memory is allocated but not yet protected or stacks which are not properly and safely initialised. Instead a new syscall map_shadow_stack() has been defined which allocates and initialises a shadow stack page. This patch implements this syscall for riscv. riscv doesn't require token to be setup by kernel because user mode can do that by itself. However to provide compatibility and portability with other architectues, user mode can specify token set flag. Reviewed-by: Zong Li Signed-off-by: Deepak Gupta --- arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/usercfi.c | 143 ++++++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 144 insertions(+) diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index f60fce69b725..2d0e0dcedbd3 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -125,3 +125,4 @@ obj-$(CONFIG_ACPI) +=3D acpi.o obj-$(CONFIG_ACPI_NUMA) +=3D acpi_numa.o =20 obj-$(CONFIG_GENERIC_CPU_VULNERABILITIES) +=3D bugs.o +obj-$(CONFIG_RISCV_USER_CFI) +=3D usercfi.o diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c new file mode 100644 index 000000000000..0b3bbb41490a --- /dev/null +++ b/arch/riscv/kernel/usercfi.c @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024 Rivos, Inc. + * Deepak Gupta + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SHSTK_ENTRY_SIZE sizeof(void *) + +/* + * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` = can happen + * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` t= akes pointer to + * shadow stack. To keep it simple, we plan to use `ssamoswap` to perform = writes on shadow + * stack. + */ +static noinline unsigned long amo_user_shstk(unsigned long *addr, unsigned= long val) +{ + /* + * Never expect -1 on shadow stack. Expect return addresses and zero + */ + unsigned long swap =3D -1; + + __enable_user_access(); + asm goto( + ".option push\n" + ".option arch, +zicfiss\n" + "1: ssamoswap.d %[swap], %[val], %[addr]\n" + _ASM_EXTABLE(1b, %l[fault]) + ".option pop\n" + : [swap] "=3Dr" (swap), [addr] "+A" (*addr) + : [val] "r" (val) + : "memory" + : fault + ); + __disable_user_access(); + return swap; +fault: + __disable_user_access(); + return -1; +} + +/* + * Create a restore token on the shadow stack. A token is always XLEN wide + * and aligned to XLEN. + */ +static int create_rstor_token(unsigned long ssp, unsigned long *token_addr) +{ + unsigned long addr; + + /* Token must be aligned */ + if (!IS_ALIGNED(ssp, SHSTK_ENTRY_SIZE)) + return -EINVAL; + + /* On RISC-V we're constructing token to be function of address itself */ + addr =3D ssp - SHSTK_ENTRY_SIZE; + + if (amo_user_shstk((unsigned long __user *)addr, (unsigned long)ssp) =3D= =3D -1) + return -EFAULT; + + if (token_addr) + *token_addr =3D addr; + + return 0; +} + +static unsigned long allocate_shadow_stack(unsigned long addr, unsigned lo= ng size, + unsigned long token_offset, bool set_tok) +{ + int flags =3D MAP_ANONYMOUS | MAP_PRIVATE; + struct mm_struct *mm =3D current->mm; + unsigned long populate, tok_loc =3D 0; + + if (addr) + flags |=3D MAP_FIXED_NOREPLACE; + + mmap_write_lock(mm); + addr =3D do_mmap(NULL, addr, size, PROT_READ, flags, + VM_SHADOW_STACK | VM_WRITE, 0, &populate, NULL); + mmap_write_unlock(mm); + + if (!set_tok || IS_ERR_VALUE(addr)) + goto out; + + if (create_rstor_token(addr + token_offset, &tok_loc)) { + vm_munmap(addr, size); + return -EINVAL; + } + + addr =3D tok_loc; + +out: + return addr; +} + +SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size= , unsigned int, flags) +{ + bool set_tok =3D flags & SHADOW_STACK_SET_TOKEN; + unsigned long aligned_size =3D 0; + + if (!cpu_supports_shadow_stack()) + return -EOPNOTSUPP; + + /* Anything other than set token should result in invalid param */ + if (flags & ~SHADOW_STACK_SET_TOKEN) + return -EINVAL; + + /* + * Unlike other architectures, on RISC-V, SSP pointer is held in CSR_SSP = and is available + * CSR in all modes. CSR accesses are performed using 12bit index program= med in instruction + * itself. This provides static property on register programming and writ= es to CSR can't + * be unintentional from programmer's perspective. As long as programmer = has guarded areas + * which perform writes to CSR_SSP properly, shadow stack pivoting is not= possible. Since + * CSR_SSP is writeable by user mode, it itself can setup a shadow stack = token subsequent + * to allocation. Although in order to provide portablity with other arch= itecture (because + * `map_shadow_stack` is arch agnostic syscall), RISC-V will follow expec= tation of a token + * flag in flags and if provided in flags, setup a token at the base. + */ + + /* If there isn't space for a token */ + if (set_tok && size < SHSTK_ENTRY_SIZE) + return -ENOSPC; + + if (addr && (addr & (PAGE_SIZE - 1))) + return -EINVAL; + + aligned_size =3D PAGE_ALIGN(size); + if (aligned_size < size) + return -EOVERFLOW; + + return allocate_shadow_stack(addr, aligned_size, size, set_tok); +} --=20 2.43.0