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Mon, 13 Oct 2025 01:55:48 -0700 (PDT) From: Neil Armstrong Date: Mon, 13 Oct 2025 10:55:44 +0200 Subject: [PATCH v6 1/3] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document lanes mapping when not using in USB-C complex Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251013-topic-x1e80100-hdmi-v6-1-3a9c8f7506d6@linaro.org> References: <20251013-topic-x1e80100-hdmi-v6-0-3a9c8f7506d6@linaro.org> In-Reply-To: <20251013-topic-x1e80100-hdmi-v6-0-3a9c8f7506d6@linaro.org> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Xilin Wu , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4604; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top of a combo glue to route either lanes to the 4 shared physical lanes. The routing of the lanes can be: - 2 DP + 2 USB3 - 4 DP - 2 USB3 The layout of the lanes was designed to be mapped and swapped related to the USB-C Power Delivery negociation, so it supports a finite set of mappings inherited by the USB-C Altmode layouts. Nevertheless those QMP Comby PHY can be used to drive a DisplayPort connector, DP->HDMI bridge, USB3 A Connector, etc... without an USB-C connector and no PD events. Document the data-lanes on numbered port@0 out endpoints, allowing us to document the lanes mapping to DisplayPort and/or USB3 connectors/peripherals. Reviewed-by: Rob Herring (Arm) Signed-off-by: Neil Armstrong --- .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 69 ++++++++++++++++++= +++- 1 file changed, 68 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43d= p-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43d= p-phy.yaml index bdf7894ff84869030252f64f20acb4f920fd19e9..1d7a7f0f356b11e080fc8d6c88a= 0c97be88a25a4 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.y= aml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.y= aml @@ -85,10 +85,77 @@ properties: =20 ports: $ref: /schemas/graph.yaml#/properties/ports + properties: port@0: - $ref: /schemas/graph.yaml#/properties/port + $ref: /schemas/graph.yaml#/$defs/port-base description: Output endpoint of the PHY + unevaluatedProperties: false + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + endpoint@0: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + description: Display Port Output lanes of the PHY when used wi= th static mapping, + The entry index is the DP lanes index, and the nu= mber is the PHY + signal in the order RX0, TX0, TX1, RX1. + unevaluatedProperties: false + + properties: + # Static lane mappings are mutually exclusive with typec-mux= /orientation-mux + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 4 + oneOf: + - items: # DisplayPort 1 lane, normal orientation + - const: 3 + - items: # DisplayPort 1 lane, flipped orientation + - const: 0 + - items: # DisplayPort 2 lanes, normal orientation + - const: 3 + - const: 2 + - items: # DisplayPort 2 lanes, flipped orientation + - const: 0 + - const: 1 + - items: # DisplayPort 4 lanes, normal orientation + - const: 3 + - const: 2 + - const: 1 + - const: 0 + - items: # DisplayPort 4 lanes, flipped orientation + - const: 0 + - const: 1 + - const: 2 + - const: 3 + required: + - data-lanes + + endpoint@1: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + description: USB Output lanes of the PHY when used with static= mapping. + The entry index is the USB3 lane in the order TX = then RX, and the + number is the PHY signal in the order RX0, TX0, T= X1, RX1. + unevaluatedProperties: false + + properties: + # Static lane mappings are mutually exclusive with typec-mux= /orientation-mux + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + oneOf: + - items: # USB3, normal orientation + - const: 1 + - const: 0 + - items: # USB3, flipped orientation + - const: 2 + - const: 3 + + required: + - data-lanes =20 port@1: $ref: /schemas/graph.yaml#/properties/port --=20 2.34.1 From nobody Sun Dec 7 04:41:11 2025 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 31CD92FB622 for ; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top of a combo glue to route either lanes to the 4 shared physical lanes. The routing of the lanes can be: - 2 DP + 2 USB3 - 4 DP - 2 USB3 Get the lanes mapping from DT and stop registering the USB-C muxes in favor of a static mode and orientation detemined by the lanes mapping. This allows supporting boards with direct connection of USB3 and DisplayPort lanes to the QMP Combo PHY lanes, not using the USB-C Altmode feature. Reviewed-by: Dmitry Baryshkov Tested-by: Xilin Wu # qcs6490-radxa-dragon-q6a Signed-off-by: Neil Armstrong Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 142 ++++++++++++++++++++++++++= ++-- 1 file changed, 134 insertions(+), 8 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualco= mm/phy-qcom-qmp-combo.c index 7b5af30f1d028c592500e723ecd27b54ed554709..18321f441bafb36fd53ca3904d4= fbe839412156d 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -1744,6 +1745,26 @@ static const u8 qmp_dp_v6_pre_emphasis_hbr_rbr[4][4]= =3D { { 0x22, 0xff, 0xff, 0xff } }; =20 +struct qmp_combo_lane_mapping { + unsigned int lanes_count; + enum typec_orientation orientation; + u32 lanes[4]; +}; + +static const struct qmp_combo_lane_mapping usb3_data_lanes[] =3D { + { 2, TYPEC_ORIENTATION_NORMAL, { 1, 0 }}, + { 2, TYPEC_ORIENTATION_REVERSE, { 2, 3 }}, +}; + +static const struct qmp_combo_lane_mapping dp_data_lanes[] =3D { + { 1, TYPEC_ORIENTATION_NORMAL, { 3 }}, + { 1, TYPEC_ORIENTATION_REVERSE, { 0 }}, + { 2, TYPEC_ORIENTATION_NORMAL, { 3, 2 }}, + { 2, TYPEC_ORIENTATION_REVERSE, { 0, 1 }}, + { 4, TYPEC_ORIENTATION_NORMAL, { 3, 2, 1, 0 }}, + { 4, TYPEC_ORIENTATION_REVERSE, { 0, 1, 2, 3 }}, +}; + struct qmp_combo; =20 struct qmp_combo_offsets { @@ -4117,6 +4138,84 @@ static struct phy *qmp_combo_phy_xlate(struct device= *dev, const struct of_phand return ERR_PTR(-EINVAL); } =20 +static void qmp_combo_find_lanes_orientation(const struct qmp_combo_lane_m= apping *mapping, + unsigned int mapping_count, + u32 *lanes, unsigned int lanes_count, + enum typec_orientation *orientation) +{ + int i; + + for (i =3D 0; i < mapping_count; i++) { + if (mapping[i].lanes_count !=3D lanes_count) + continue; + if (!memcmp(mapping[i].lanes, lanes, sizeof(u32) * lanes_count)) { + *orientation =3D mapping[i].orientation; + return; + } + } +} + +static int qmp_combo_get_dt_lanes_mapping(struct device *dev, unsigned int= endpoint, + u32 *data_lanes, unsigned int max, + unsigned int *count) +{ + struct device_node *ep __free(device_node) =3D NULL; + int ret; + + ep =3D of_graph_get_endpoint_by_regs(dev->of_node, 0, endpoint); + if (!ep) + return -EINVAL; + + ret =3D of_property_count_u32_elems(ep, "data-lanes"); + if (ret < 0) + return ret; + + *count =3D ret; + if (*count > max) + return -EINVAL; + + return of_property_read_u32_array(ep, "data-lanes", data_lanes, + min_t(unsigned int, *count, max)); +} + +static int qmp_combo_get_dt_dp_orientation(struct device *dev, + enum typec_orientation *orientation) +{ + unsigned int count; + u32 data_lanes[4]; + int ret; + + /* DP is described on the first endpoint of the first port */ + ret =3D qmp_combo_get_dt_lanes_mapping(dev, 0, data_lanes, 4, &count); + if (ret < 0) + return ret =3D=3D -EINVAL ? 0 : ret; + + /* Search for a match and only update orientation if found */ + qmp_combo_find_lanes_orientation(dp_data_lanes, ARRAY_SIZE(dp_data_lanes), + data_lanes, count, orientation); + + return 0; +} + +static int qmp_combo_get_dt_usb3_orientation(struct device *dev, + enum typec_orientation *orientation) +{ + unsigned int count; + u32 data_lanes[2]; + int ret; + + /* USB3 is described on the second endpoint of the first port */ + ret =3D qmp_combo_get_dt_lanes_mapping(dev, 1, data_lanes, 2, &count); + if (ret < 0) + return ret =3D=3D -EINVAL ? 0 : ret; + + /* Search for a match and only update orientation if found */ + qmp_combo_find_lanes_orientation(usb3_data_lanes, ARRAY_SIZE(usb3_data_la= nes), + data_lanes, count, orientation); + + return 0; +} + static int qmp_combo_probe(struct platform_device *pdev) { struct qmp_combo *qmp; @@ -4167,9 +4266,41 @@ static int qmp_combo_probe(struct platform_device *p= dev) if (ret) goto err_node_put; =20 - ret =3D qmp_combo_typec_register(qmp); - if (ret) - goto err_node_put; + qmp->qmpphy_mode =3D QMPPHY_MODE_USB3DP; + + if (of_property_present(dev->of_node, "mode-switch") || + of_property_present(dev->of_node, "orientation-switch")) { + ret =3D qmp_combo_typec_register(qmp); + if (ret) + goto err_node_put; + } else { + enum typec_orientation dp_orientation =3D TYPEC_ORIENTATION_NONE; + enum typec_orientation usb3_orientation =3D TYPEC_ORIENTATION_NONE; + + ret =3D qmp_combo_get_dt_dp_orientation(dev, &dp_orientation); + if (ret) + goto err_node_put; + + ret =3D qmp_combo_get_dt_usb3_orientation(dev, &usb3_orientation); + if (ret) + goto err_node_put; + + if (dp_orientation =3D=3D TYPEC_ORIENTATION_NONE && + usb3_orientation !=3D TYPEC_ORIENTATION_NONE) { + qmp->qmpphy_mode =3D QMPPHY_MODE_USB3_ONLY; + qmp->orientation =3D usb3_orientation; + } else if (usb3_orientation =3D=3D TYPEC_ORIENTATION_NONE && + dp_orientation !=3D TYPEC_ORIENTATION_NONE) { + qmp->qmpphy_mode =3D QMPPHY_MODE_DP_ONLY; + qmp->orientation =3D dp_orientation; + } else if (dp_orientation !=3D TYPEC_ORIENTATION_NONE && + dp_orientation =3D=3D usb3_orientation) { + qmp->qmpphy_mode =3D QMPPHY_MODE_USB3DP; + qmp->orientation =3D dp_orientation; + } else { + dev_warn(dev, "unable to determine orientation & mode from data-lanes"); + } + } =20 ret =3D drm_aux_bridge_register(dev); if (ret) @@ -4189,11 +4320,6 @@ static int qmp_combo_probe(struct platform_device *p= dev) if (ret) goto err_node_put; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The Thinkpad T14s embeds a transparent 4lanes DP->HDMI transceiver connected to the third QMP Combo PHY 4 lanes. Add all the data routing, disable mode switching and specify the QMP Combo PHY should be in DP-Only mode to route the 4 lanes to the underlying DP phy. Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong --- .../dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi | 81 ++++++++++++++++++= ++++ 1 file changed, 81 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi b/= arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi index 654cbce9d6ecb61c8a6e874d16385d66e362e439..7aa7ae66f49a7a179652757fd82= 6e9d11b9b29da 100644 --- a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi @@ -62,6 +62,45 @@ switch-lid { }; }; =20 + hdmi-bridge { + compatible =3D "realtek,rtd2171"; + + pinctrl-0 =3D <&hdmi_hpd_default>; + pinctrl-names =3D "default"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + hdmi_bridge_dp_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_qmpphy_out_dp>; + }; + }; + + port@1 { + reg =3D <1>; + + hdmi_bridge_tmds_out: endpoint { + remote-endpoint =3D <&hdmi_con>; + }; + }; + }; + }; + + hdmi-connector { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_con: endpoint { + remote-endpoint =3D <&hdmi_bridge_tmds_out>; + }; + }; + }; + pmic-glink { compatible =3D "qcom,x1e80100-pmic-glink", "qcom,sm8550-pmic-glink", @@ -1028,6 +1067,14 @@ &mdss_dp1_out { link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; }; =20 +&mdss_dp2 { + status =3D "okay"; +}; + +&mdss_dp2_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + &mdss_dp3 { /delete-property/ #sound-dai-cells; =20 @@ -1317,6 +1364,12 @@ eusb6_reset_n: eusb6-reset-n-state { output-low; }; =20 + hdmi_hpd_default: hdmi-hpd-default-state { + pins =3D "gpio126"; + function =3D "usb2_dp"; + bias-disable; + }; + tpad_default: tpad-default-state { pins =3D "gpio3"; function =3D "gpio"; @@ -1548,6 +1601,34 @@ &usb_1_ss1_qmpphy_out { remote-endpoint =3D <&retimer_ss1_ss_in>; }; =20 +&usb_1_ss2_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + /delete-property/ mode-switch; + /delete-property/ orientation-switch; + + status =3D "okay"; + + ports { + port@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + /delete-node/ endpoint; + + usb_1_ss2_qmpphy_out_dp: endpoint@0 { + reg =3D <0>; + + data-lanes =3D <3 2 1 0>; + remote-endpoint =3D <&hdmi_bridge_dp_in>; + }; + + /* No USB3 lanes connected */ + }; + }; +}; + &usb_2 { status =3D "okay"; }; --=20 2.34.1