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Wysocki" , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Conor Dooley Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krishna Chaitanya Chundru X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760352825; l=4058; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=DMfL92AdXlzenYd0/1DcFtxFL7fShJdaftub5B4NfLA=; b=31xcT0QdpgR7G2WSAuRQQywywT1N0r3T7iCT13jrZ565TkRMr/wHsbX0Yy5s26RjTQdCMMMbE deYLgUXgn3bBSAAHsg/USnh5L4PFJPRiixnZCAR2KC8LOeDhv732Fpw X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Proofpoint-ORIG-GUID: KQwLg_ecjr0NctEXLxNTS9jmbG6YWBHg X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDExMDAxOCBTYWx0ZWRfX+xIWaHzzvA2V NzkkC4chieGl5bKKiKF1/PlAhIWzmsBnzDW9PIN2n3ILIsVleHUHiV5k2HBVO8Nuyo55cB8JCW5 ssZZGq1b+FHOnVHnDD44H0Vx3R2+d3fDHFHJMZ6N0/uCvAOqTCsB5eWg9rWz+ChA7d9Ii7RaM1X QxJ3yKmnL3x2LtKBoMRd3q23Mk3R7QjxUTtsSPaocAbqfZ+uLbaCPmHWIAETPdJrqMUBs5gT7er XKmRsYO5d+dwRo18gBvXxnVfA24C6FKjZ2mooDHXeq93uo0/+tbJXEftpg6SrDS3e1vj1MNNp1w FOf2yMsiVe7S2dl8RHv0isS9nPGr9vgoNHMq/KlqUfbUju1Vy5IAyTDAMan5fKuSaff9NOlesBw t1j/S9Ghh6tTihXNqiXkoSlcIt0DGg== X-Proofpoint-GUID: KQwLg_ecjr0NctEXLxNTS9jmbG6YWBHg X-Authority-Analysis: v=2.4 cv=PdTyRyhd c=1 sm=1 tr=0 ts=68ecda45 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=EUspDBNiAAAA:8 a=qQkGquXN9PvF_GGjQ98A:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-13_04,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 bulkscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510110018 The existing OPP table for PCIe is shared across different link configurations such as data rates 8GT/s x2 and 16GT/s x1. These configurations often operate at the same frequency, allowing them to reuse the same OPP entries. However, 8GT/s and 16 GT/s may have different RPMh votes which cannot be represented accurately when sharing a single OPP. To address this, introduce an `opp-level` to indicate the PCIe data rate and uniquely differentiate OPP entries even when the frequency is the same. Although this platform does not currently suffer from this issue, the change is introduced to support unification across platforms. Append the opp level to name of the opp node to indicate both frequency and level. Signed-off-by: Krishna Chaitanya Chundru --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 55 ++++++++++++++++++++++++++------= ---- 1 file changed, 40 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 23420e6924728cb80fc9e44fb4d7e01fbffae21f..2ae56c39f2e6d8a11a2ef0f77bf= fcf05a6fd637e 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2047,25 +2047,28 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, pcie0_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - /* GEN 1 x1 */ + /* 2.5 GT/s x1 */ opp-2500000 { opp-hz =3D /bits/ 64 <2500000>; required-opps =3D <&rpmhpd_opp_low_svs>; opp-peak-kBps =3D <250000 1>; + opp-level =3D <1>; }; =20 - /* GEN 2 x1 */ + /* 5 GT/s x1 */ opp-5000000 { opp-hz =3D /bits/ 64 <5000000>; required-opps =3D <&rpmhpd_opp_low_svs>; opp-peak-kBps =3D <500000 1>; + opp-level =3D <2>; }; =20 - /* GEN 3 x1 */ + /* 8 GT/s x1 */ opp-8000000 { opp-hz =3D /bits/ 64 <8000000>; required-opps =3D <&rpmhpd_opp_nom>; opp-peak-kBps =3D <984500 1>; + opp-level =3D <3>; }; }; =20 @@ -2209,46 +2212,68 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, pcie1_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - /* GEN 1 x1 */ - opp-2500000 { + /* 2.5 GT/s x1 */ + opp-2500000-1 { opp-hz =3D /bits/ 64 <2500000>; required-opps =3D <&rpmhpd_opp_low_svs>; opp-peak-kBps =3D <250000 1>; + opp-level =3D <1>; }; =20 - /* GEN 1 x2 and GEN 2 x1 */ - opp-5000000 { + /* 2.5 GT/s x2 */ + opp-5000000-1 { + opp-hz =3D /bits/ 64 <5000000>; + required-opps =3D <&rpmhpd_opp_low_svs>; + opp-peak-kBps =3D <500000 1>; + opp-level =3D <1>; + }; + + /* 5 GT/s x1 */ + opp-5000000-2 { opp-hz =3D /bits/ 64 <5000000>; required-opps =3D <&rpmhpd_opp_low_svs>; opp-peak-kBps =3D <500000 1>; + opp-level =3D <2>; }; =20 - /* GEN 2 x2 */ - opp-10000000 { + /* 5 GT/s x2 */ + opp-10000000-2 { opp-hz =3D /bits/ 64 <10000000>; required-opps =3D <&rpmhpd_opp_low_svs>; opp-peak-kBps =3D <1000000 1>; + opp-level =3D <2>; }; =20 - /* GEN 3 x1 */ - opp-8000000 { + /* 8 GT/s x1 */ + opp-8000000-3 { opp-hz =3D /bits/ 64 <8000000>; required-opps =3D <&rpmhpd_opp_nom>; opp-peak-kBps =3D <984500 1>; + opp-level =3D <3>; + }; + + /* 8 GT/s x2 */ + opp-16000000-3 { + opp-hz =3D /bits/ 64 <16000000>; + required-opps =3D <&rpmhpd_opp_nom>; + opp-peak-kBps =3D <1969000 1>; + opp-level =3D <3>; }; =20 - /* GEN 3 x2 and GEN 4 x1 */ - opp-16000000 { + /* 16 GT/s x1 */ + opp-16000000-4 { opp-hz =3D /bits/ 64 <16000000>; required-opps =3D <&rpmhpd_opp_nom>; opp-peak-kBps =3D <1969000 1>; + opp-level =3D <4>; }; =20 - /* GEN 4 x2 */ - opp-32000000 { + /* 16 GT/s x2 */ + opp-32000000-4 { opp-hz =3D /bits/ 64 <32000000>; required-opps =3D <&rpmhpd_opp_nom>; opp-peak-kBps =3D <3938000 1>; + opp-level =3D <4>; }; }; =20 --=20 2.34.1