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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2904f61a1desm64388675ad.82.2025.10.12.23.11.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Oct 2025 23:11:42 -0700 (PDT) From: Jie Gan Date: Mon, 13 Oct 2025 14:11:16 +0800 Subject: [PATCH v3 1/3] dt-bindings: arm: document the static TPDM compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251013-add-static-tpdm-support-v3-1-a720b73e83db@oss.qualcomm.com> References: <20251013-add-static-tpdm-support-v3-0-a720b73e83db@oss.qualcomm.com> In-Reply-To: <20251013-add-static-tpdm-support-v3-0-a720b73e83db@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang , Mao Jinlong , Tao Zhang , Alexander Shishkin , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jie Gan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760335892; l=1550; i=jie.gan@oss.qualcomm.com; s=20250909; h=from:subject:message-id; bh=ril99Wt36AaQWNv+PDjT8BlLjpjvdFqefjO73sSkLmU=; b=HvBZBhPoXjlRC0YdVww2PK4swhc3dY0OMjVa0IXNyNsiaBHrYx6rix1xuT7DU9SRmw+65geZN kJyQ54ZKrmwC+pp8TNSXg0alrdswDbuTaVRsA3/6eNF0p7W2T1KcFWJ X-Developer-Key: i=jie.gan@oss.qualcomm.com; a=ed25519; pk=3LxxUZRPCNkvPDlWOvXfJNqNO4SfGdy3eghMb8puHuk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDExMDAxOCBTYWx0ZWRfX8igkiNaw4h4/ cRUAYcyn1vpkgin0Cg676IRrr9BK6Zw1lPitp2s1gcyC8OH3UDVoc6kqGj0gcuFefknObBsnyeS 6UUGKH8MIO5FJtqsUGFM15a/AxzQiF4iV8D7uxLIQ4nqxnbOBoHb3XBM/F8kamKOFvMjMQN5t3n U6sHLk7mv0WeyT0+ZG18sc1dtFQoZ75JHhwuj/UAZf9V0PXXBYt7/+o+dk4wEpYK/+Bw7DNNNXX RiRGXJtmFRz/B4U/dVjpOO8NZxPeIsrE2P4u7NF0556Rq6/dey19zodu+fLG3TCfTRwTvUpTTuO Cv17MgPX5Rhc6cv6OatuBTwIJjE8DTWn9/evsb6fajf7T/vp0hNF7COk7cE8cJpWOvJMzKKgJIe cJI+H+iO5QRixBAIj672eELdB/cvow== X-Proofpoint-ORIG-GUID: gTMhVhIcsEUxuiMHyZByzx0Z-_bm8vl8 X-Proofpoint-GUID: gTMhVhIcsEUxuiMHyZByzx0Z-_bm8vl8 X-Authority-Analysis: v=2.4 cv=U7SfzOru c=1 sm=1 tr=0 ts=68ec9820 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=5Z_N_GBq0btHVWfAyk4A:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-13_03,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 spamscore=0 malwarescore=0 bulkscore=0 clxscore=1015 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510110018 The static TPDM device is intended for sources that do not require MMIO mapping. Its compatible string should be documented clearly, along with an example illustrating how to define a static TPDM node in the DT. Reviewed-by: Rob Herring (Arm) Signed-off-by: Jie Gan --- .../bindings/arm/qcom,coresight-tpdm.yaml | 23 ++++++++++++++++++= +--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml= b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index 4edc47483851..c349306f0d52 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -36,9 +36,12 @@ properties: $nodename: pattern: "^tpdm(@[0-9a-f]+)$" compatible: - items: - - const: qcom,coresight-tpdm - - const: arm,primecell + oneOf: + - items: + - const: qcom,coresight-static-tpdm + - items: + - const: qcom,coresight-tpdm + - const: arm,primecell =20 reg: maxItems: 1 @@ -147,4 +150,18 @@ examples: }; }; }; + + turing-llm-tpdm { + compatible =3D "qcom,coresight-static-tpdm"; + + qcom,cmb-element-bits =3D <32>; + + out-ports { + port { + turing_llm_tpdm_out: endpoint { + remote-endpoint =3D <&turing0_funnel_in1>; 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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2904f61a1desm64388675ad.82.2025.10.12.23.11.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Oct 2025 23:11:47 -0700 (PDT) From: Jie Gan Date: Mon, 13 Oct 2025 14:11:17 +0800 Subject: [PATCH v3 2/3] coresight: tpdm: add static tpdm support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251013-add-static-tpdm-support-v3-2-a720b73e83db@oss.qualcomm.com> References: <20251013-add-static-tpdm-support-v3-0-a720b73e83db@oss.qualcomm.com> In-Reply-To: <20251013-add-static-tpdm-support-v3-0-a720b73e83db@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang , Mao Jinlong , Tao Zhang , Alexander Shishkin , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jie Gan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760335892; l=8786; i=jie.gan@oss.qualcomm.com; s=20250909; h=from:subject:message-id; bh=v23xmem2Bt+Tgm+51X3S8Idk7oSeK94L/FuNsCG9NiI=; b=yfr4C8+me/BPW2PCtcSD7ksxh4HEiJxv1Pr2Gx7Lpmn0NzjOA8LDrDmj/vCnXmzJQLxD6dBLc Xqf+4eHZSf4DlOf+BrdHhJ9bpgJbdnbMdCmRsj9tcQ03IRoj1BaUTqn X-Developer-Key: i=jie.gan@oss.qualcomm.com; a=ed25519; pk=3LxxUZRPCNkvPDlWOvXfJNqNO4SfGdy3eghMb8puHuk= X-Proofpoint-GUID: _DUcdALi3foCEAmHiDaL7-g_zXn4bjML X-Proofpoint-ORIG-GUID: _DUcdALi3foCEAmHiDaL7-g_zXn4bjML X-Authority-Analysis: v=2.4 cv=eaIwvrEH c=1 sm=1 tr=0 ts=68ec9825 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=EUspDBNiAAAA:8 a=_wMi7B_O7ukW3LTXVV0A:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDExMDAyMiBTYWx0ZWRfXyVLCZQY/wUVM 4vd/8IqnDswPLxiGFAXZculdvfc05ykMAVtVHmbk8cO9aDerLiawvry8iIk9kdNKGuQ3T421nbI HZPKWjSBZ4MAgFHkslkcoo8fN3LgBJL3ekZOyStAseYcQa9U242ERaJpi9X0vG5Or13U3T8dhsF Id1r1HTz+uYMsN0dfoExvBBj9zY1k6ECFDukNsg10YVwwPsSIE5rnShYvuATA/rPL/0PyQU1GaQ /qMyuqnTt+pg+9cqwmKpv/Wa4GGHlFVDtOmjGE6ojA/NAh9du6DsnZkFSbKf3voSvmQWUBmtiuR 0+U4eUY8RFJe/yrQNqhYAEw5ue01cJ0pZ+uGqhGpy5osFu62M/+6xQ7Xr3rm3m3ltZVCzNejLaF FceYTC9SqIZ9i7BbrqNFkaHXfLLSIQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-13_03,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 spamscore=0 impostorscore=0 phishscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510110022 The static TPDM function as a dummy source, however, it is essential to enable the port connected to the TPDA and configure the element size. Without this, the TPDA cannot correctly receive trace data from the static TPDM. Since the static TPDM does not require MMIO mapping to access its registers, a clock controller is not mandatory for its operation. Signed-off-by: Jie Gan --- drivers/hwtracing/coresight/coresight-tpda.c | 9 ++ drivers/hwtracing/coresight/coresight-tpdm.c | 148 +++++++++++++++++++++--= ---- drivers/hwtracing/coresight/coresight-tpdm.h | 8 ++ 3 files changed, 131 insertions(+), 34 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtraci= ng/coresight/coresight-tpda.c index 333b3cb23685..4e93fa5bace4 100644 --- a/drivers/hwtracing/coresight/coresight-tpda.c +++ b/drivers/hwtracing/coresight/coresight-tpda.c @@ -68,6 +68,15 @@ static int tpdm_read_element_size(struct tpda_drvdata *d= rvdata, int rc =3D -EINVAL; struct tpdm_drvdata *tpdm_data =3D dev_get_drvdata(csdev->dev.parent); =20 + if (coresight_is_static_tpdm(csdev)) { + rc =3D fwnode_property_read_u32(dev_fwnode(csdev->dev.parent), + "qcom,dsb-element-bits", &drvdata->dsb_esize); + rc &=3D fwnode_property_read_u32(dev_fwnode(csdev->dev.parent), + "qcom,cmb-element-bits", &drvdata->cmb_esize); + + goto out; + } + if (tpdm_data->dsb) { rc =3D fwnode_property_read_u32(dev_fwnode(csdev->dev.parent), "qcom,dsb-element-bits", &drvdata->dsb_esize); diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtraci= ng/coresight/coresight-tpdm.c index 7214e65097ec..1766b0182819 100644 --- a/drivers/hwtracing/coresight/coresight-tpdm.c +++ b/drivers/hwtracing/coresight/coresight-tpdm.c @@ -495,7 +495,9 @@ static int tpdm_enable(struct coresight_device *csdev, = struct perf_event *event, return -EBUSY; } =20 - __tpdm_enable(drvdata); + if (!coresight_is_static_tpdm(csdev)) + __tpdm_enable(drvdata); + drvdata->enable =3D true; spin_unlock(&drvdata->spinlock); =20 @@ -551,7 +553,9 @@ static void tpdm_disable(struct coresight_device *csdev, return; } =20 - __tpdm_disable(drvdata); + if (!coresight_is_static_tpdm(csdev)) + __tpdm_disable(drvdata); + coresight_set_mode(csdev, CS_MODE_DISABLED); drvdata->enable =3D false; spin_unlock(&drvdata->spinlock); @@ -1342,10 +1346,9 @@ static const struct attribute_group *tpdm_attr_grps[= ] =3D { NULL, }; =20 -static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) +static int tpdm_probe(struct device *dev, struct resource *res) { void __iomem *base; - struct device *dev =3D &adev->dev; struct coresight_platform_data *pdata; struct tpdm_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; @@ -1354,32 +1357,33 @@ static int tpdm_probe(struct amba_device *adev, con= st struct amba_id *id) pdata =3D coresight_get_platform_data(dev); if (IS_ERR(pdata)) return PTR_ERR(pdata); - adev->dev.platform_data =3D pdata; + dev->platform_data =3D pdata; =20 /* driver data*/ drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); if (!drvdata) return -ENOMEM; - drvdata->dev =3D &adev->dev; + drvdata->dev =3D dev; dev_set_drvdata(dev, drvdata); =20 - base =3D devm_ioremap_resource(dev, &adev->res); - if (IS_ERR(base)) - return PTR_ERR(base); + if (res) { + base =3D devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); =20 - drvdata->base =3D base; + drvdata->base =3D base; + ret =3D tpdm_datasets_setup(drvdata); + if (ret) + return ret; =20 - ret =3D tpdm_datasets_setup(drvdata); - if (ret) - return ret; + if (drvdata && tpdm_has_dsb_dataset(drvdata)) + of_property_read_u32(drvdata->dev->of_node, + "qcom,dsb-msrs-num", &drvdata->dsb_msr_num); =20 - if (drvdata && tpdm_has_dsb_dataset(drvdata)) - of_property_read_u32(drvdata->dev->of_node, - "qcom,dsb-msrs-num", &drvdata->dsb_msr_num); - - if (drvdata && tpdm_has_cmb_dataset(drvdata)) - of_property_read_u32(drvdata->dev->of_node, - "qcom,cmb-msrs-num", &drvdata->cmb_msr_num); + if (drvdata && tpdm_has_cmb_dataset(drvdata)) + of_property_read_u32(drvdata->dev->of_node, + "qcom,cmb-msrs-num", &drvdata->cmb_msr_num); + } =20 /* Set up coresight component description */ desc.name =3D coresight_alloc_device_name(&tpdm_devs, dev); @@ -1388,34 +1392,51 @@ static int tpdm_probe(struct amba_device *adev, con= st struct amba_id *id) desc.type =3D CORESIGHT_DEV_TYPE_SOURCE; desc.subtype.source_subtype =3D CORESIGHT_DEV_SUBTYPE_SOURCE_TPDM; desc.ops =3D &tpdm_cs_ops; - desc.pdata =3D adev->dev.platform_data; - desc.dev =3D &adev->dev; + desc.pdata =3D dev->platform_data; + desc.dev =3D dev; desc.access =3D CSDEV_ACCESS_IOMEM(base); - desc.groups =3D tpdm_attr_grps; + if (res) + desc.groups =3D tpdm_attr_grps; drvdata->csdev =3D coresight_register(&desc); if (IS_ERR(drvdata->csdev)) return PTR_ERR(drvdata->csdev); =20 spin_lock_init(&drvdata->spinlock); =20 - /* Decrease pm refcount when probe is done.*/ - pm_runtime_put(&adev->dev); - return 0; } =20 -static void tpdm_remove(struct amba_device *adev) +static int tpdm_remove(struct device *dev) { - struct tpdm_drvdata *drvdata =3D dev_get_drvdata(&adev->dev); + struct tpdm_drvdata *drvdata =3D dev_get_drvdata(dev); =20 coresight_unregister(drvdata->csdev); + + return 0; +} + +static int dynamic_tpdm_probe(struct amba_device *adev, + const struct amba_id *id) +{ + int ret; + + ret =3D tpdm_probe(&adev->dev, &adev->res); + if (!ret) + pm_runtime_put(&adev->dev); + + return ret; +} + +static void dynamic_tpdm_remove(struct amba_device *adev) +{ + tpdm_remove(&adev->dev); } =20 /* * Different TPDM has different periph id. * The difference is 0-7 bits' value. So ignore 0-7 bits. */ -static const struct amba_id tpdm_ids[] =3D { +static const struct amba_id dynamic_tpdm_ids[] =3D { { .id =3D 0x001f0e00, .mask =3D 0x00ffff00, @@ -1423,17 +1444,76 @@ static const struct amba_id tpdm_ids[] =3D { { 0, 0, NULL }, }; =20 -static struct amba_driver tpdm_driver =3D { +MODULE_DEVICE_TABLE(amba, dynamic_tpdm_ids); + +static struct amba_driver dynamic_tpdm_driver =3D { .drv =3D { .name =3D "coresight-tpdm", .suppress_bind_attrs =3D true, }, - .probe =3D tpdm_probe, - .id_table =3D tpdm_ids, - .remove =3D tpdm_remove, + .probe =3D dynamic_tpdm_probe, + .id_table =3D dynamic_tpdm_ids, + .remove =3D dynamic_tpdm_remove, }; =20 -module_amba_driver(tpdm_driver); +static int tpdm_platform_probe(struct platform_device *pdev) +{ + struct resource *res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); + int ret; + + pm_runtime_get_noresume(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + + ret =3D tpdm_probe(&pdev->dev, res); + pm_runtime_put(&pdev->dev); + if (ret) + pm_runtime_disable(&pdev->dev); + + return ret; +} + +static void tpdm_platform_remove(struct platform_device *pdev) +{ + struct tpdm_drvdata *drvdata =3D dev_get_drvdata(&pdev->dev); + + if (WARN_ON(!drvdata)) + return; + + tpdm_remove(&pdev->dev); + pm_runtime_disable(&pdev->dev); +} + +static const struct of_device_id static_tpdm_match[] =3D { + {.compatible =3D "qcom,coresight-static-tpdm"}, + {} +}; + +MODULE_DEVICE_TABLE(of, static_tpdm_match); + +static struct platform_driver static_tpdm_driver =3D { + .probe =3D tpdm_platform_probe, + .remove =3D tpdm_platform_remove, + .driver =3D { + .name =3D "coresight-static-tpdm", + .of_match_table =3D static_tpdm_match, + .suppress_bind_attrs =3D true, + }, +}; + +static int __init tpdm_init(void) +{ + return coresight_init_driver("tpdm", &dynamic_tpdm_driver, &static_tpdm_d= river, + THIS_MODULE); +} + +static void __exit tpdm_exit(void) +{ + coresight_remove_driver(&dynamic_tpdm_driver, &static_tpdm_driver); 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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2904f61a1desm64388675ad.82.2025.10.12.23.11.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Oct 2025 23:11:52 -0700 (PDT) From: Jie Gan Date: Mon, 13 Oct 2025 14:11:18 +0800 Subject: [PATCH v3 3/3] arm64: dts: qcom: lemans: enable static TPDM Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251013-add-static-tpdm-support-v3-3-a720b73e83db@oss.qualcomm.com> References: <20251013-add-static-tpdm-support-v3-0-a720b73e83db@oss.qualcomm.com> In-Reply-To: <20251013-add-static-tpdm-support-v3-0-a720b73e83db@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang , Mao Jinlong , Tao Zhang , Alexander Shishkin , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jie Gan , Konrad Dybcio X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760335892; l=3216; i=jie.gan@oss.qualcomm.com; s=20250909; h=from:subject:message-id; bh=cM+KsUjm1CT8Q4hIp2dfJ8uGxYpJWqBu6GWePVipu+s=; b=niUZtQK2sHWXXqAzI24xd1rCBjQ0KFEZ2P9GaHcYMlWkrf7WJmHFusVPyMcgZ2lb6bdsDJ6JF AnEHO6sh9GRCNJov/G9xDJJ8KLy+DDPZ/lqDpjSwep6tO4oqFqjL7d2 X-Developer-Key: i=jie.gan@oss.qualcomm.com; a=ed25519; pk=3LxxUZRPCNkvPDlWOvXfJNqNO4SfGdy3eghMb8puHuk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDExMDAxOCBTYWx0ZWRfX1qnvIQ1FpmdG LWM0Pu+S/PL+5rzfVD2xf8Cb3VidpRPPHOYDVYI5QjQPUXv7Umcft3/ts1slfbFcZG6LFdrushz 0N8Q2vIowqoW/HDQqts58uzJOVbuFvdI8Mbyrdn7DiniKzw2gf5MhG/xtdIgA8geSQvz9OQ5aoC xF/JGJrK48xxD6ggZgtddVzEwmnRPAKJp0BRZ19d0DsawAwAoKEqjNeldwp234aDKqgMGD/cjOj mKcrwEPJBe2b8XHTmE1l0gllYENZEkTfH59eU/4tokozomCENgFb5HYZ+L56/ebMk8msQPI7pzW FTsaJTDc3VKqO0VmrzeFGgEWoQoa33ITFbJiHmroJ0SPtmS4ohUq7/ikERkGcoV75KL7CZkrtFE k9HW9ELdR1NwR0Tm9JC7SZps3XrCGw== X-Proofpoint-ORIG-GUID: j_UaS6twjYYcVH1xYdr6WC6KOF2jKcki X-Proofpoint-GUID: j_UaS6twjYYcVH1xYdr6WC6KOF2jKcki X-Authority-Analysis: v=2.4 cv=U7SfzOru c=1 sm=1 tr=0 ts=68ec982a cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=EUspDBNiAAAA:8 a=_1kJojZ1I3LL_-Zbm_IA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-13_03,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 spamscore=0 malwarescore=0 bulkscore=0 clxscore=1015 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510110018 Enable static TPDM device for lemans. Reviewed-by: Konrad Dybcio Signed-off-by: Jie Gan --- arch/arm64/boot/dts/qcom/lemans.dtsi | 105 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qco= m/lemans.dtsi index cf685cb186ed..3646e2347068 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -2961,6 +2961,14 @@ funnel1_in4: endpoint { <&apss_funnel1_out>; }; }; + + port@5 { + reg =3D <5>; + + funnel1_in5: endpoint { + remote-endpoint =3D <&dlct0_funnel_out>; + }; + }; }; }; =20 @@ -3118,6 +3126,60 @@ etr1_out: endpoint { }; }; =20 + tpda@4ad3000 { + compatible =3D "qcom,coresight-tpda", "arm,primecell"; + reg =3D <0x0 0x4ad3000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@10 { + reg =3D <16>; + dlct0_tpda_in16: endpoint { + remote-endpoint =3D <&turing0_funnel_out>; + }; + }; + }; + + out-ports { + port { + dlct0_tpda_out: endpoint { + remote-endpoint =3D + <&dlct0_funnel_in0>; + }; + }; + }; + + }; + + funnel@4ad4000 { + compatible =3D "arm,coresight-dynamic-funnel", "arm,primecell"; + reg =3D <0x0 0x4ad4000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + port { + dlct0_funnel_in0: endpoint { + remote-endpoint =3D <&dlct0_tpda_out>; + }; + }; + }; + + out-ports { + port { + dlct0_funnel_out: endpoint { + remote-endpoint =3D <&funnel1_in5>; + }; + }; + }; + }; + funnel@4b04000 { compatible =3D "arm,coresight-dynamic-funnel", "arm,primecell"; reg =3D <0x0 0x4b04000 0x0 0x1000>; @@ -3390,6 +3452,35 @@ aoss_cti: cti@4b13000 { clock-names =3D "apb_pclk"; }; =20 + funnel@4b83000 { + compatible =3D "arm,coresight-dynamic-funnel", "arm,primecell"; + reg =3D <0x0 0x4b83000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@1 { + reg =3D <1>; + + turing0_funnel_in1: endpoint { + remote-endpoint =3D <&turing_llm_tpdm_out>; + }; + }; + }; + + out-ports { + port { + turing0_funnel_out: endpoint { + remote-endpoint =3D <&dlct0_tpda_in16>; + }; + }; + }; + }; + etm@6040000 { compatible =3D "arm,primecell"; reg =3D <0x0 0x6040000 0x0 0x1000>; @@ -8256,6 +8347,20 @@ arch_timer: timer { ; }; =20 + turing-llm-tpdm { + compatible =3D "qcom,coresight-static-tpdm"; + + qcom,cmb-element-bits =3D <32>; + + out-ports { + port { + turing_llm_tpdm_out: endpoint { + remote-endpoint =3D <&turing0_funnel_in1>; + }; + }; + }; + }; + pcie0: pcie@1c00000 { compatible =3D "qcom,pcie-sa8775p"; reg =3D <0x0 0x01c00000 0x0 0x3000>, --=20 2.34.1