From nobody Wed Dec 17 10:52:42 2025 Received: from out-182.mta1.migadu.com (out-182.mta1.migadu.com [95.215.58.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1CC421D596 for ; Sun, 12 Oct 2025 22:49:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760309385; cv=none; b=nGpiibm7/OU2Se44U8Jj+A6fSc3V37p2prLrUJxhMVfcNSqnJi3k6Z2KiswLhJhb4KtMrmurJVJJqrW3MjQyOplV0SvhpdTJvfj+xLvBIWKS6iwzDiofuYD6kDikdrBnH+4ub+bpPhX9/5phTXXkVFcCDA0WVq6zuzH/sYp75bU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760309385; c=relaxed/simple; bh=++W517G07PbsPHf8tLIEwPk8Hn5slItVC8zFHbBE7D8=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=GBWW3dxM0w+59NIZxZhhqz2ISFW4GPv2K2pgryB4W4aockBCavrU7x3NMnMmmuw1Dxz2+VIQ0L+nTkUazjLIegdd3WdvcEAGI3fy3XJKee0HT5QWzvPl80fg5dUf1tkgFifSxoT+SY2chS6G/27pdMWGeRLFuqy9N2Jo7avEI8c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=KUEdOK6f; arc=none smtp.client-ip=95.215.58.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="KUEdOK6f" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1760309372; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=pOzTHT5kWtnB8D7OyyyQQ79h5DZ+AVxhYATw2T0aDTc=; b=KUEdOK6f+Yl4blhQv4Ex4+6YS6XI8k0d3Iqp2tRoWBowRUSI5tYonsekiQCk1Xm4+sjsM6 pBrmggp200WxegO93WazNz8LkNemU8NBrr3QPlJzX4wrmPoOl1/8ntcyyJuwfD73MYI+vW k9ReI1yTFu5y4gH8gTssrYU0m1CDVf+Oj73+cdqfLxYMWZ/o3UHI7laY2OOcls+kjjQEOQ AI+/YZD2ADudtMz5jELo+oL8VryBo+AfIvsPYZ7Od3K+ztT2GV5gf8isEDHi/c3xeKA1Tm zKZkUSHBHO3mpD2Ri/tTyrMfmI+HN06CwDLyracAKvhW1Qbjpy+lk+wWxkEI8A== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Bryan O'Donoghue" , Laurentiu Tudor , Val Packett Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] arm64: dts: qcom: x1-dell-thena: remove dp data-lanes Date: Sun, 12 Oct 2025 19:48:07 -0300 Message-ID: <20251012224909.14988-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" The commit 458de584248a ("arm64: dts: qcom: x1e80100: move dp0/1/2 data-lanes to SoC dtsi") has landed before this file was added, so the data-lanes lines here remained. Remove them to enable 4-lane DP on the X1E Dell Inspiron/Latitude. Fixes: e7733b42111c ("arm64: dts: qcom: Add support for Dell Inspiron 7441 = / Latitude 7455") Reviewed-by: Bryan O'Donoghue Signed-off-by: Val Packett Reviewed-by: Konrad Dybcio --- v2: fixed commit msg style, pulled R-b v1: https://lore.kernel.org/all/20250927032240.20759-1-val@packett.cool/ --- arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi b/arch/arm64/boot/= dts/qcom/x1-dell-thena.dtsi index d71b67824a99..ef83e87e1b7a 100644 --- a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi @@ -1090,7 +1090,6 @@ &mdss_dp0 { }; =20 &mdss_dp0_out { - data-lanes =3D <0 1>; link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; }; =20 @@ -1099,7 +1098,6 @@ &mdss_dp1 { }; =20 &mdss_dp1_out { - data-lanes =3D <0 1>; link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; }; =20 --=20 2.51.0