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[178.79.73.218]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b55d67d8283sm760176466b.38.2025.10.12.12.23.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Oct 2025 12:23:58 -0700 (PDT) From: Jernej Skrabec To: mripard@kernel.org, wens@csie.org Cc: maarten.lankhorst@linux.intel.com, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, samuel@sholland.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Jernej Skrabec Subject: [PATCH 16/30] drm/sun4i: ui_layer: use layer struct instead of multiple args Date: Sun, 12 Oct 2025 21:23:16 +0200 Message-ID: <20251012192330.6903-17-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251012192330.6903-1-jernej.skrabec@gmail.com> References: <20251012192330.6903-1-jernej.skrabec@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This change is equally a cleanup (less arguments) and preparation for DE33 separate plane driver. It will introduce additional register space. Signed-off-by: Jernej Skrabec Reviewed-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 62 +++++++++++++------------- 1 file changed, 30 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i= /sun8i_ui_layer.c index 8f6fcdfcf52a..d5b7241acdea 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -25,24 +25,24 @@ #include "sun8i_ui_scaler.h" #include "sun8i_vi_scaler.h" =20 -static void sun8i_ui_layer_disable(struct sun8i_mixer *mixer, - int channel, int overlay) +static void sun8i_ui_layer_disable(struct sun8i_layer *layer) { - u32 ch_base =3D sun8i_channel_base(mixer, channel); + struct sun8i_mixer *mixer =3D layer->mixer; + u32 ch_base =3D sun8i_channel_base(mixer, layer->channel); =20 regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), 0); + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay), 0); } =20 -static void sun8i_ui_layer_update_attributes(struct sun8i_mixer *mixer, - int channel, int overlay, +static void sun8i_ui_layer_update_attributes(struct sun8i_layer *layer, struct drm_plane *plane) { struct drm_plane_state *state =3D plane->state; + struct sun8i_mixer *mixer =3D layer->mixer; const struct drm_format_info *fmt; u32 val, ch_base, hw_fmt; =20 - ch_base =3D sun8i_channel_base(mixer, channel); + ch_base =3D sun8i_channel_base(mixer, layer->channel); fmt =3D state->fb->format; sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt); =20 @@ -54,22 +54,23 @@ static void sun8i_ui_layer_update_attributes(struct sun= 8i_mixer *mixer, val |=3D SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN; =20 regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), val); + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay), val); } =20 -static void sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int cha= nnel, - int overlay, struct drm_plane *plane) +static void sun8i_ui_layer_update_coord(struct sun8i_layer *layer, + struct drm_plane *plane) { struct drm_plane_state *state =3D plane->state; + struct sun8i_mixer *mixer =3D layer->mixer; u32 src_w, src_h, dst_w, dst_h; u32 outsize, insize; u32 hphase, vphase; u32 ch_base; =20 DRM_DEBUG_DRIVER("Updating UI channel %d overlay %d\n", - channel, overlay); + layer->channel, layer->overlay); =20 - ch_base =3D sun8i_channel_base(mixer, channel); + ch_base =3D sun8i_channel_base(mixer, layer->channel); =20 src_w =3D drm_rect_width(&state->src) >> 16; src_h =3D drm_rect_height(&state->src) >> 16; @@ -87,7 +88,7 @@ static void sun8i_ui_layer_update_coord(struct sun8i_mixe= r *mixer, int channel, state->src.x1 >> 16, state->src.y1 >> 16); DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch_base, overlay), + SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch_base, layer->overlay), insize); regmap_write(mixer->engine.regs, SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch_base), @@ -102,37 +103,38 @@ static void sun8i_ui_layer_update_coord(struct sun8i_= mixer *mixer, int channel, vscale =3D state->src_h / state->crtc_h; =20 if (mixer->cfg->de_type =3D=3D SUN8I_MIXER_DE33) { - sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, + sun8i_vi_scaler_setup(mixer, layer->channel, src_w, src_h, dst_w, dst_h, hscale, vscale, hphase, vphase, state->fb->format); - sun8i_vi_scaler_enable(mixer, channel, true); + sun8i_vi_scaler_enable(mixer, layer->channel, true); } else { - sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, + sun8i_ui_scaler_setup(mixer, layer->channel, src_w, src_h, dst_w, dst_h, hscale, vscale, hphase, vphase); - sun8i_ui_scaler_enable(mixer, channel, true); + sun8i_ui_scaler_enable(mixer, layer->channel, true); } } else { DRM_DEBUG_DRIVER("HW scaling is not needed\n"); if (mixer->cfg->de_type =3D=3D SUN8I_MIXER_DE33) - sun8i_vi_scaler_enable(mixer, channel, false); + sun8i_vi_scaler_enable(mixer, layer->channel, false); else - sun8i_ui_scaler_enable(mixer, channel, false); + sun8i_ui_scaler_enable(mixer, layer->channel, false); } } =20 -static void sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int ch= annel, - int overlay, struct drm_plane *plane) +static void sun8i_ui_layer_update_buffer(struct sun8i_layer *layer, + struct drm_plane *plane) { struct drm_plane_state *state =3D plane->state; + struct sun8i_mixer *mixer =3D layer->mixer; struct drm_framebuffer *fb =3D state->fb; struct drm_gem_dma_object *gem; dma_addr_t dma_addr; u32 ch_base; int bpp; =20 - ch_base =3D sun8i_channel_base(mixer, channel); + ch_base =3D sun8i_channel_base(mixer, layer->channel); =20 /* Get the physical address of the buffer in memory */ gem =3D drm_fb_dma_get_gem_obj(fb, 0); @@ -150,13 +152,13 @@ static void sun8i_ui_layer_update_buffer(struct sun8i= _mixer *mixer, int channel, /* Set the line width */ DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]); regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, overlay), + SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, layer->overlay), fb->pitches[0]); =20 DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &dma_addr); =20 regmap_write(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, overlay), + SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, layer->overlay), lower_32_bits(dma_addr)); } =20 @@ -208,19 +210,15 @@ static void sun8i_ui_layer_atomic_update(struct drm_p= lane *plane, struct drm_plane_state *new_state =3D drm_atomic_get_new_plane_state(stat= e, plane); struct sun8i_layer *layer =3D plane_to_sun8i_layer(plane); - struct sun8i_mixer *mixer =3D layer->mixer; =20 if (!new_state->crtc || !new_state->visible) { - sun8i_ui_layer_disable(mixer, layer->channel, layer->overlay); + sun8i_ui_layer_disable(layer); return; } =20 - sun8i_ui_layer_update_attributes(mixer, layer->channel, - layer->overlay, plane); - sun8i_ui_layer_update_coord(mixer, layer->channel, - layer->overlay, plane); - sun8i_ui_layer_update_buffer(mixer, layer->channel, - layer->overlay, plane); + sun8i_ui_layer_update_attributes(layer, plane); + sun8i_ui_layer_update_coord(layer, plane); + sun8i_ui_layer_update_buffer(layer, plane); } =20 static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs =3D= { --=20 2.51.0