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([94.25.228.43]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-59088585860sm2823882e87.128.2025.10.12.03.00.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Oct 2025 03:00:49 -0700 (PDT) From: Artem Shimko To: Eugeniy Paltsev , Vinod Koul , Philipp Zabel Cc: a.shimko.dev@gmail.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] dmaengine: dw-axi-dmac: add reset control support Date: Sun, 12 Oct 2025 13:00:00 +0300 Message-ID: <20251012100002.2959213-3-a.shimko.dev@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251012100002.2959213-1-a.shimko.dev@gmail.com> References: <20251012100002.2959213-1-a.shimko.dev@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add proper reset control handling to the AXI DMA driver to ensure reliable initialization and power management. The driver now manages resets during probe, remove, and system suspend/resume operations. The implementation stores reset control in the chip structure and adds reset assert/deassert calls at the appropriate points: resets are deasserted during probe after clock acquisition, asserted during remove and error cleanup, and properly managed during suspend/resume cycles. Additionally, proper error handling is implemented for reset control operations to ensure robust behavior. This ensures the controller is properly reset during power transitions and prevents potential issues with incomplete initialization. Signed-off-by: Artem Shimko --- .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 41 ++++++++++++------- drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 2 + 2 files changed, 28 insertions(+), 15 deletions(-) diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/d= w-axi-dmac/dw-axi-dmac-platform.c index 8b7cf3baf5d3..3f4dd2178498 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c @@ -1321,6 +1321,9 @@ static int axi_dma_suspend(struct device *dev) axi_dma_irq_disable(chip); axi_dma_disable(chip); =20 + if (chip->has_resets) + reset_control_assert(chip->resets); + clk_disable_unprepare(chip->core_clk); clk_disable_unprepare(chip->cfgr_clk); =20 @@ -1340,6 +1343,9 @@ static int axi_dma_resume(struct device *dev) if (ret < 0) return ret; =20 + if (chip->has_resets) + reset_control_deassert(chip->resets); + axi_dma_enable(chip); axi_dma_irq_enable(chip); =20 @@ -1455,7 +1461,6 @@ static int dw_probe(struct platform_device *pdev) struct axi_dma_chip *chip; struct dw_axi_dma *dw; struct dw_axi_dma_hcfg *hdata; - struct reset_control *resets; unsigned int flags; u32 i; int ret; @@ -1487,16 +1492,6 @@ static int dw_probe(struct platform_device *pdev) return PTR_ERR(chip->apb_regs); } =20 - if (flags & AXI_DMA_FLAG_HAS_RESETS) { - resets =3D devm_reset_control_array_get_exclusive(&pdev->dev); - if (IS_ERR(resets)) - return PTR_ERR(resets); - - ret =3D reset_control_deassert(resets); - if (ret) - return ret; - } - chip->dw->hdata->use_cfg2 =3D !!(flags & AXI_DMA_FLAG_USE_CFG2); =20 chip->core_clk =3D devm_clk_get(chip->dev, "core-clk"); @@ -1507,18 +1502,31 @@ static int dw_probe(struct platform_device *pdev) if (IS_ERR(chip->cfgr_clk)) return PTR_ERR(chip->cfgr_clk); =20 + chip->has_resets =3D !!(flags & AXI_DMA_FLAG_HAS_RESETS); + if (chip->has_resets) { + chip->resets =3D devm_reset_control_array_get_exclusive(&pdev->dev); + if (IS_ERR(chip->resets)) + return PTR_ERR(chip->resets); + + ret =3D reset_control_deassert(chip->resets); + if (ret) + return dev_err_probe(&pdev->dev, ret, "Failed to deassert resets\n"); + } + ret =3D parse_device_properties(chip); if (ret) - return ret; + goto err_exit; =20 dw->chan =3D devm_kcalloc(chip->dev, hdata->nr_channels, sizeof(*dw->chan), GFP_KERNEL); - if (!dw->chan) - return -ENOMEM; + if (!dw->chan) { + ret =3D -ENOMEM; + goto err_exit; + } =20 ret =3D axi_req_irqs(pdev, chip); if (ret) - return ret; + goto err_exit; =20 INIT_LIST_HEAD(&dw->dma.channels); for (i =3D 0; i < hdata->nr_channels; i++) { @@ -1605,6 +1613,9 @@ static int dw_probe(struct platform_device *pdev) =20 err_pm_disable: pm_runtime_disable(chip->dev); +err_exit: + if (chip->has_resets) + reset_control_assert(chip->resets); =20 return ret; } diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dma= c/dw-axi-dmac.h index b842e6a8d90d..56dc3d75fe92 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h @@ -71,6 +71,8 @@ struct axi_dma_chip { struct clk *core_clk; struct clk *cfgr_clk; struct dw_axi_dma *dw; + struct reset_control *resets; + bool has_resets; }; =20 /* LLI =3D=3D Linked List Item */ --=20 2.43.0