From nobody Fri Dec 19 10:44:08 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DD65A1991D2; Fri, 10 Oct 2025 07:12:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760080371; cv=none; b=O2EimdiJJ3AlV0mPaPjGTITXl/iY/3wJJuoETteBdsO7FBv0oKtkF9rN8uqb/JTdHlSIRjSoTKYQZujBk4NzP436BXjKohko4escgcxqoJM0nrLXY76fPKD3J4DwFa1iUN5YL5lbpEoLsRvWB0ObfyGMr4F/Ig9LNpw3bdmBapE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760080371; c=relaxed/simple; bh=oHUPYoK0XprxGtek8pJ17S5bSCYNpVt98rv9tMQIWtQ=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=jYkaLzSbKnp74GNReyCnQqKKYS1P+bCoWH+r/PCPIvWeJY2e5Jp8OwpmQxO4Z7Y/4qWp4yIQ/BrH62XAIb5MgzFyorRJDW1mkMZ+mMzQLRE1YBL91z3VU1gGYU29hT37Ogy5osNjZxmc+v5YMkel0gFZMLR4ZMezB0+VrmFyBrU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8BxH9PtsehoEpUUAA--.44270S3; Fri, 10 Oct 2025 15:12:45 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowJBxjcHrsehojynYAA--.29868S2; Fri, 10 Oct 2025 15:12:43 +0800 (CST) From: Song Gao To: maobibo@loongson.cn, chenhuacai@kernel.org Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, kernel@xen0n.name, linux-kernel@vger.kernel.org Subject: [PATCH v2] LoongArch: KVM: Add AVEC support Date: Fri, 10 Oct 2025 14:48:58 +0800 Message-Id: <20251010064858.2392927-1-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJBxjcHrsehojynYAA--.29868S2 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Add cpu_has_msgint() to check whether the host cpu supported avec, and restore/save CSR_MSGIS0-CSR_MSGIS3. Signed-off-by: Song Gao --- Based-on: https://patchew.org/linux/20250930093741.2734974-1-maobibo@loongs= on.cn/ v2: fix build error. arch/loongarch/include/asm/kvm_host.h | 4 ++++ arch/loongarch/include/asm/kvm_vcpu.h | 1 + arch/loongarch/include/uapi/asm/kvm.h | 1 + arch/loongarch/kvm/interrupt.c | 3 +++ arch/loongarch/kvm/vcpu.c | 19 +++++++++++++++++-- arch/loongarch/kvm/vm.c | 4 ++++ 6 files changed, 30 insertions(+), 2 deletions(-) diff --git a/arch/loongarch/include/asm/kvm_host.h b/arch/loongarch/include= /asm/kvm_host.h index 392480c9b958..446f1104d59d 100644 --- a/arch/loongarch/include/asm/kvm_host.h +++ b/arch/loongarch/include/asm/kvm_host.h @@ -285,6 +285,10 @@ static inline bool kvm_guest_has_lbt(struct kvm_vcpu_a= rch *arch) return arch->cpucfg[2] & (CPUCFG2_X86BT | CPUCFG2_ARMBT | CPUCFG2_MIPSBT); } =20 +static inline bool cpu_has_msgint(void) +{ + return read_cpucfg(LOONGARCH_CPUCFG1) & CPUCFG1_MSGINT; +} static inline bool kvm_guest_has_pmu(struct kvm_vcpu_arch *arch) { return arch->cpucfg[6] & CPUCFG6_PMP; diff --git a/arch/loongarch/include/asm/kvm_vcpu.h b/arch/loongarch/include= /asm/kvm_vcpu.h index f1efd7cfbc20..3784ab4ccdb5 100644 --- a/arch/loongarch/include/asm/kvm_vcpu.h +++ b/arch/loongarch/include/asm/kvm_vcpu.h @@ -15,6 +15,7 @@ #define CPU_PMU (_ULCAST_(1) << 10) #define CPU_TIMER (_ULCAST_(1) << 11) #define CPU_IPI (_ULCAST_(1) << 12) +#define CPU_AVEC (_ULCAST_(1) << 14) =20 /* Controlled by 0x52 guest exception VIP aligned to estat bit 5~12 */ #define CPU_IP0 (_ULCAST_(1)) diff --git a/arch/loongarch/include/uapi/asm/kvm.h b/arch/loongarch/include= /uapi/asm/kvm.h index 57ba1a563bb1..de6c3f18e40a 100644 --- a/arch/loongarch/include/uapi/asm/kvm.h +++ b/arch/loongarch/include/uapi/asm/kvm.h @@ -104,6 +104,7 @@ struct kvm_fpu { #define KVM_LOONGARCH_VM_FEAT_PV_IPI 6 #define KVM_LOONGARCH_VM_FEAT_PV_STEALTIME 7 #define KVM_LOONGARCH_VM_FEAT_PTW 8 +#define KVM_LOONGARCH_VM_FEAT_MSGINT 9 =20 /* Device Control API on vcpu fd */ #define KVM_LOONGARCH_VCPU_CPUCFG 0 diff --git a/arch/loongarch/kvm/interrupt.c b/arch/loongarch/kvm/interrupt.c index 8462083f0301..adc278fb3cb9 100644 --- a/arch/loongarch/kvm/interrupt.c +++ b/arch/loongarch/kvm/interrupt.c @@ -21,6 +21,7 @@ static unsigned int priority_to_irq[EXCCODE_INT_NUM] =3D { [INT_HWI5] =3D CPU_IP5, [INT_HWI6] =3D CPU_IP6, [INT_HWI7] =3D CPU_IP7, + [INT_AVEC] =3D CPU_AVEC, }; =20 static int kvm_irq_deliver(struct kvm_vcpu *vcpu, unsigned int priority) @@ -36,6 +37,7 @@ static int kvm_irq_deliver(struct kvm_vcpu *vcpu, unsigne= d int priority) case INT_IPI: case INT_SWI0: case INT_SWI1: + case INT_AVEC: set_gcsr_estat(irq); break; =20 @@ -63,6 +65,7 @@ static int kvm_irq_clear(struct kvm_vcpu *vcpu, unsigned = int priority) case INT_IPI: case INT_SWI0: case INT_SWI1: + case INT_AVEC: clear_gcsr_estat(irq); break; =20 diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c index 30e3b089a596..226c735155be 100644 --- a/arch/loongarch/kvm/vcpu.c +++ b/arch/loongarch/kvm/vcpu.c @@ -657,8 +657,7 @@ static int _kvm_get_cpucfg_mask(int id, u64 *v) *v =3D GENMASK(31, 0); return 0; case LOONGARCH_CPUCFG1: - /* CPUCFG1_MSGINT is not supported by KVM */ - *v =3D GENMASK(25, 0); + *v =3D GENMASK(26, 0); return 0; case LOONGARCH_CPUCFG2: /* CPUCFG2 features unconditionally supported by KVM */ @@ -726,6 +725,10 @@ static int kvm_check_cpucfg(int id, u64 val) return -EINVAL; =20 switch (id) { + case LOONGARCH_CPUCFG1: + if ((val & CPUCFG1_MSGINT) && (!cpu_has_msgint())) + return -EINVAL; + return 0; case LOONGARCH_CPUCFG2: if (!(val & CPUCFG2_LLFTP)) /* Guests must have a constant timer */ @@ -1658,6 +1661,12 @@ static int _kvm_vcpu_load(struct kvm_vcpu *vcpu, int= cpu) kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_DMWIN2); kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_DMWIN3); kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_LLBCTL); + if (cpu_has_msgint()) { + kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR0); + kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR1); + kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR2); + kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR3); + } =20 /* Restore Root.GINTC from unused Guest.GINTC register */ write_csr_gintc(csr->csrs[LOONGARCH_CSR_GINTC]); @@ -1747,6 +1756,12 @@ static int _kvm_vcpu_put(struct kvm_vcpu *vcpu, int = cpu) kvm_save_hw_gcsr(csr, LOONGARCH_CSR_DMWIN1); kvm_save_hw_gcsr(csr, LOONGARCH_CSR_DMWIN2); kvm_save_hw_gcsr(csr, LOONGARCH_CSR_DMWIN3); + if (cpu_has_msgint()) { + kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR0); + kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR1); + kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR2); + kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR3); + } =20 vcpu->arch.aux_inuse |=3D KVM_LARCH_SWCSR_LATEST; =20 diff --git a/arch/loongarch/kvm/vm.c b/arch/loongarch/kvm/vm.c index d8c813e2d72e..438885b6f2b1 100644 --- a/arch/loongarch/kvm/vm.c +++ b/arch/loongarch/kvm/vm.c @@ -37,6 +37,9 @@ static void kvm_vm_init_features(struct kvm *kvm) kvm->arch.support_features |=3D BIT(KVM_LOONGARCH_VM_FEAT_PV_STEALTIME); } =20 + if (cpu_has_msgint()) + kvm->arch.support_features |=3D BIT(KVM_LOONGARCH_VM_FEAT_MSGINT); + val =3D read_csr_gcfg(); if (val & CSR_GCFG_GPMP) kvm->arch.support_features |=3D BIT(KVM_LOONGARCH_VM_FEAT_PMU); @@ -153,6 +156,7 @@ static int kvm_vm_feature_has_attr(struct kvm *kvm, str= uct kvm_device_attr *attr case KVM_LOONGARCH_VM_FEAT_PMU: case KVM_LOONGARCH_VM_FEAT_PV_IPI: case KVM_LOONGARCH_VM_FEAT_PV_STEALTIME: + case KVM_LOONGARCH_VM_FEAT_MSGINT: if (kvm_vm_support(&kvm->arch, attr->attr)) return 0; return -ENXIO; --=20 2.39.3