From nobody Tue Dec 16 05:52:51 2025 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB9352F0692 for ; Fri, 10 Oct 2025 12:46:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100410; cv=none; b=CthijR0IwTSov7syMwi2Pu0oXKyP8UYwWV/OttbXhEhgbD3qounHByAk21pW97MZNt+AYdxj6FXQZII5qZpqL9E3GYC6q34xOPiDc4+7ezeJMGIgOm3MvBVvcp03mluLbAgNI9Ck8MO1dOQIvgueFB/Axr9ctyVmOfsdPH+6vYI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100410; c=relaxed/simple; bh=k+x7SigsMLhAqxwhOrFdeHdHMbo3VM9te/+155p1XOI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eWF6/jvN84LXV2iGons39lV7V830OgkAT9jWA9JiXE9RDBhn5kx0ET1qtutkSN0EFMSWDtZhR5K/3JidDv34vsDb0KDL1pwgUyA86fO9BuGCM2yDlKuyFn5D8kwx0jLT0aift/kkrPF/qjVPe9XhOdal6d2BIFSSKwuN/Mkplls= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=x/rdbPli; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="x/rdbPli" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-46e4ad36541so22744915e9.0 for ; Fri, 10 Oct 2025 05:46:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1760100405; x=1760705205; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=JDFgROGNpwR6/oUQPsSAUdlelbgLvQg5uFC4b3ecjXY=; b=x/rdbPlijVLXPfAXL/BbEI/3WyI6gXYnW7fwE7GSAexsSfWYzYWDQMMMfRbNSPlORF oasyWWz+0n4ZudX9j1PLD3xNpvmJdLU3Cs/PiQ4hCUOEJd4bj6lIfVC7WaObDVWbkWEn VQw8g0muxqU2Uk10LPBAB/KKZlFbH8sfpeK+Ri+uB2h0rKSncjo3xN49pDViCkfUM2kF QoaZ71IyYsdfU465PtuY15j+EAHQoTJjhzJJXgHA3CHPRb3hM/+B33jjz8W4HQV4AZWW 971jhF2z+pL9K5JKLiy9kv8LHRpgMXKSgiuH3jnyHgVDNLlroUpv6gbMYVypVkeU17ka eLcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760100405; x=1760705205; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JDFgROGNpwR6/oUQPsSAUdlelbgLvQg5uFC4b3ecjXY=; b=TYJ80V1G3+ZG/yhgrUEICTqpBjgA7LVkhDKFr3piOgwORXbecXc9NMPdsCw1vHWkDg XGl5vgW6R0IGEgyJTG7nw7FIoybJL+b2At9votLdvLIq1QJZNRCpUaPQMIYWcYB33xlZ AZT+1SwRBtRUbVSBbqbiLIKS2B2vXJPP9Ij1g9rr68f4RQ9cd/sXdzmny9gc4KYuGeRN sWVP5MMEmizInX3/LYka6/eQAyUXVwuH1s8P90MK0f4so5Pk5/Wr/ZzzDXwJAK5w1ESa mq/cCM095olgfH5pAjYOkpSGsUyJx3O163C3t5nDvXahIQRkT70dXNxE6VbpwFLulDWu rFoQ== X-Gm-Message-State: AOJu0YxQ72el9Lk8KaL/cke9yWI8Ka7XLaVH/KmnNszSEaG91cB75Uy9 AMWLvCWP9b4EMBxzgtu8qGHg9dhlloJpdgz0vldnDsp/3Bxg6290e9zClGrCJeKIcMI= X-Gm-Gg: ASbGnctLSDAzlsq77zSCRDdldhywzo6G8pi5v4ruNMjFHz6rwAS5BV1OVaeeV3lNqyX gclz7cMIErQJNuiM7fMf04tDWKnPpuVTuGwcgfftcBfPIE9jQN2Zh+IXcV9j6+zhnUPW/CMys2c H3VaJ/3cYHkw+o4hZM6Yb74jMhmuzUAU0JTKfbKV9dgUHOHEZZpsniwNDP+7if40sOTC1ojTnlg bepsVasLc5QtUssLbg9LtkA9oQYaEh9eMssocDJkkwB0kQDTkaUzgS1uWNNwpvYEe77sMjePxxl E/REeq2IYSrBpXQyW5KhMQ9OzjclX1QMKk/4rvFWfAA42Li+QZGI8YEYUI8WGDdDllvDCbNjgrO +1db5FVDLw5trkqNwRSumQyuP79SkuygmPKwbBS2NagcyJsgwdvc8VHbpkNfOkYzWoxXYFIjgI2 G5rqqX0iahyEpkcI/WO2pQeA== X-Google-Smtp-Source: AGHT+IE/dO3nGSvFVXAU6hqMkPw06wJHrP/9TuT1/Nqdw0LoISZ4HCImCFLqMx5Nn+/i3yWnu1kRZQ== X-Received: by 2002:a05:600c:1c23:b0:45b:6b57:5308 with SMTP id 5b1f17b1804b1-46fa9a892a0mr78680205e9.7.1760100405274; Fri, 10 Oct 2025 05:46:45 -0700 (PDT) Received: from ta2.c.googlers.com (213.53.77.34.bc.googleusercontent.com. [34.77.53.213]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fb484d056sm46376895e9.9.2025.10.10.05.46.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Oct 2025 05:46:43 -0700 (PDT) From: Tudor Ambarus Date: Fri, 10 Oct 2025 12:46:31 +0000 Subject: [PATCH v6 1/6] dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251010-acpm-clk-v6-1-321ee8826fd4@linaro.org> References: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> In-Reply-To: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , =?utf-8?q?Andr=C3=A9_Draszik?= , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Alim Akhtar , Sylwester Nawrocki , Chanwoo Choi , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760100401; l=3182; i=tudor.ambarus@linaro.org; s=20241212; h=from:subject:message-id; bh=k+x7SigsMLhAqxwhOrFdeHdHMbo3VM9te/+155p1XOI=; b=Ke/Y7Sr2R6ZDIsHTXGrUwLhr0AJiQlmTDXWgSuvtAxvGhdnCBNAIsOUzS7BT6IzHX4xM9NWih ZirIzmZMcgBBRu6RrV74nBO4fITr2q9dLgKAtAHoVv99PcxDDN8jvck X-Developer-Key: i=tudor.ambarus@linaro.org; a=ed25519; pk=uQzE0NXo3dIjeowMTOPCpIiPHEz12IA/MbyzrZVh9WI= The firmware exposes clocks that can be controlled via the Alive Clock and Power Manager (ACPM) interface. Make the ACPM node a clock provider by adding the mandatory "#clock-cells" property, which allows devices to reference its clock outputs. Signed-off-by: Tudor Ambarus Reviewed-by: Rob Herring (Arm) Reviewed-by: Peter Griffin Tested-by: Peter Griffin # on gs101-oriole --- .../bindings/firmware/google,gs101-acpm-ipc.yaml | 11 +++++++++ include/dt-bindings/clock/google,gs101-acpm.h | 26 ++++++++++++++++++= ++++ 2 files changed, 37 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-i= pc.yaml b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.= yaml index 9785aac3b5f34955bbfe2718eec48581d050954f..d3bca6088d128485618bb2b538e= d8596b4ba14f0 100644 --- a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml +++ b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml @@ -24,6 +24,15 @@ properties: compatible: const: google,gs101-acpm-ipc =20 + "#clock-cells": + const: 1 + description: + Clocks that are variable and index based. These clocks don't provide + an entire range of values between the limits but only discrete points + within the range. The firmware also manages the voltage scaling + appropriately with the clock scaling. The argument is the ID of the + clock contained by the firmware messages. + mboxes: maxItems: 1 =20 @@ -45,6 +54,7 @@ properties: =20 required: - compatible + - "#clock-cells" - mboxes - shmem =20 @@ -56,6 +66,7 @@ examples: =20 power-management { compatible =3D "google,gs101-acpm-ipc"; + #clock-cells =3D <1>; mboxes =3D <&ap2apm_mailbox>; shmem =3D <&apm_sram>; =20 diff --git a/include/dt-bindings/clock/google,gs101-acpm.h b/include/dt-bin= dings/clock/google,gs101-acpm.h new file mode 100644 index 0000000000000000000000000000000000000000..e2ba89e09fa6209f7c81f554dd5= 11b2619009e5b --- /dev/null +++ b/include/dt-bindings/clock/google,gs101-acpm.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright 2025 Linaro Ltd. + * + * Device Tree binding constants for Google gs101 ACPM clock controller. + */ + +#ifndef _DT_BINDINGS_CLOCK_GOOGLE_GS101_ACPM_H +#define _DT_BINDINGS_CLOCK_GOOGLE_GS101_ACPM_H + +#define GS101_CLK_ACPM_DVFS_MIF 0 +#define GS101_CLK_ACPM_DVFS_INT 1 +#define GS101_CLK_ACPM_DVFS_CPUCL0 2 +#define GS101_CLK_ACPM_DVFS_CPUCL1 3 +#define GS101_CLK_ACPM_DVFS_CPUCL2 4 +#define GS101_CLK_ACPM_DVFS_G3D 5 +#define GS101_CLK_ACPM_DVFS_G3DL2 6 +#define GS101_CLK_ACPM_DVFS_TPU 7 +#define GS101_CLK_ACPM_DVFS_INTCAM 8 +#define GS101_CLK_ACPM_DVFS_TNR 9 +#define GS101_CLK_ACPM_DVFS_CAM 10 +#define GS101_CLK_ACPM_DVFS_MFC 11 +#define GS101_CLK_ACPM_DVFS_DISP 12 +#define GS101_CLK_ACPM_DVFS_BO 13 + +#endif /* _DT_BINDINGS_CLOCK_GOOGLE_GS101_ACPM_H */ --=20 2.51.0.740.g6adb054d12-goog From nobody Tue Dec 16 05:52:51 2025 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B9A582F0693 for ; Fri, 10 Oct 2025 12:46:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100410; cv=none; b=opkwI8+Ohk4W0hj7V1j4VvfFAJ4iHYdglIXcN1kVvt9g/87PXyjCLmK0g4uh4LXZ5zQgrzU2bS4CQ+9A52ONZtuQgSoYUYjnL+hmoR3NM9/lgO6D7aMjlz6adV3hgaXyfkQc/BVruYJPBe0Z1cFrZnBFRIrmhr5imk7lxL2KKnc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100410; c=relaxed/simple; bh=nht+0cVmRWVB4+ce3RyGxQzs5Rulvm6JKBBRx7syrdQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SWU/1+H5Lgd8nmH9DVCYThozcfvI8JyHhPtaKXlH/h7r0WEDXCSmG1azHD1cmq/2NLb3LK3BMOv+RC/PDzjg9N4XD0xYDaW657j0h04fybGSAVUL4cbCmlyGPhlR6hu9DLmj/yegJ1qCtluM1xow0hRH0OYWN3Grq73t8kFx7B8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=WeXbz5Bz; arc=none smtp.client-ip=209.85.128.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WeXbz5Bz" Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-46e491a5b96so11145745e9.2 for ; Fri, 10 Oct 2025 05:46:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1760100406; x=1760705206; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=z2nfE8+rIsshVHGW4LOPPJ8IkWn50qSI7r3Sg04LOS8=; b=WeXbz5BzYYzDKX8TpZIUnQgh9nEJiRPM0tI/HqtcTpFAltCCScc0uHhv157GddB7gF xiq0Kye74oF8VFLnfEellguY2pCRVgkoRZ1V5TJbyd6d6j+M4WM8z/IhfUXmnLLezjiD HoSHIS11Q84L9ej6M2YUji5AQcOs70Z5V1C3RiZTjSf7kAI7/6f+5rS24qZTjl0K4jS1 e5FkO+H1gYwyy5AXdw8/hHzPW0EVkEX7fdAKTV3oUFZ8swnG+D/7mPwf3xtxP89gV0l9 CNI6BAQ8J2CVC7RKfppbh0svaDtlTgEJqGyBDZBhTJoymzXflZpq29qnbdlV25tIulps c42Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760100406; x=1760705206; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=z2nfE8+rIsshVHGW4LOPPJ8IkWn50qSI7r3Sg04LOS8=; b=sGkW86JQpP5qWqfTfVzWc4BcioVqMxnGLgCCDmJsh6SKIm07A5tDGjASh3BQRAS/ME ZEblCdtEvZ1QFiYEP8kA24LI4OIhh8lGgagr+KxQ52F1REp7raGhga59WoPVzdK+N93H IeoP984aAqQQq3rPor2GDobq9oPMFZpuUrGAI6zWoHzCDsgtDYKYgfjR6fKrJzwEAuiD ycqzbjGdnK+MbTXqWwfZKnH0HwVU09O3SaNxfvTPhNVAiW308sRVoxlKHlV9pzlyX+KW DFfeHyXEiZCb2EywvHhT1FYfNV7upV0HgM6J+8u8a6drxwA22Qz9ATSrQyBjRf/irQ/M KY/Q== X-Gm-Message-State: AOJu0YySdql3GeMk8uhPALrteLiXmlGSUimtVBl4QMOZ0RPeVVp97yXf YyXVnZ/9wdzny+rJQV4Jum1cFwQYJ99r161opgcEj8B4GlA4WsEElgozNKc6pIsKEiw= X-Gm-Gg: ASbGncvkdoEnKlUAn6uvBD7ufwcDn1AybktjolMEUEi9+40SF4gYBGrpwNC7dLE1RRb EiVATu7Fy5lu9nU5VDqeM59qv4l3C4Cl85gkc6hBfDbNEB3O1CQJaYcpJAci2sItmBNBPaIm72I CvW1ygIIe5ESbEmsVYteRyYTs3wyiFckvh6j+MFLPPII8NF1INRIumJWyje18D5SkfV5e0g4PoJ 6FtGvmClOmNmsRHS/zYXmqJKs7VLsLgv7d4rxxenfe5gFn60wYMLRwjm2VQrniR6YBotwqC/8h2 rhrkYazu6hZuNzUIi8tAcGM4X+6Avd3oNvhFJHK6cxSxYZZ3NIvdFSSXJ4TsdbjwPP+5kb5rneR hzdEA+xMae6nDUqjMsDSHg09ON29/0y7jQNe3P+zOzlOvmttzXNarju75GnUkMA0Wuix6ioxsYP TLVJB+hQT69racNHix3GkY1w== X-Google-Smtp-Source: AGHT+IEATMDjPVaW6xtHUuRAhcGKgkJK9KTgPht87/yGSDwr3glJqlrPD+XxdOBxV2tQdcqhsHLjjw== X-Received: by 2002:a05:600c:c0c3:20b0:46e:39ef:be77 with SMTP id 5b1f17b1804b1-46faef4161fmr41056625e9.14.1760100406013; Fri, 10 Oct 2025 05:46:46 -0700 (PDT) Received: from ta2.c.googlers.com (213.53.77.34.bc.googleusercontent.com. [34.77.53.213]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fb484d056sm46376895e9.9.2025.10.10.05.46.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Oct 2025 05:46:45 -0700 (PDT) From: Tudor Ambarus Date: Fri, 10 Oct 2025 12:46:32 +0000 Subject: [PATCH v6 2/6] firmware: exynos-acpm: add DVFS protocol Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251010-acpm-clk-v6-2-321ee8826fd4@linaro.org> References: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> In-Reply-To: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , =?utf-8?q?Andr=C3=A9_Draszik?= , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Alim Akhtar , Sylwester Nawrocki , Chanwoo Choi , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760100401; l=6635; i=tudor.ambarus@linaro.org; s=20241212; h=from:subject:message-id; bh=nht+0cVmRWVB4+ce3RyGxQzs5Rulvm6JKBBRx7syrdQ=; b=Ypmn0zfN5S3D+Z1XySnzwHo/8CvSXRu297Zid604jR7WgDqUN2+K8z+acuLkiRU/DSEpo3Eps 598dHHMz/tSBPsYJVHKFhgTw6oRHWWPj0AQGWOxJ+HLXlgQVixyW1+w X-Developer-Key: i=tudor.ambarus@linaro.org; a=ed25519; pk=uQzE0NXo3dIjeowMTOPCpIiPHEz12IA/MbyzrZVh9WI= Add ACPM DVFS protocol handler. It constructs DVFS messages that the APM firmware can understand. Signed-off-by: Tudor Ambarus Reviewed-by: Peter Griffin Tested-by: Peter Griffin # on gs101-oriole --- drivers/firmware/samsung/Makefile | 4 +- drivers/firmware/samsung/exynos-acpm-dvfs.c | 80 ++++++++++++++++++= ++++ drivers/firmware/samsung/exynos-acpm-dvfs.h | 21 ++++++ drivers/firmware/samsung/exynos-acpm.c | 5 ++ .../linux/firmware/samsung/exynos-acpm-protocol.h | 10 +++ 5 files changed, 119 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/samsung/Makefile b/drivers/firmware/samsung/M= akefile index 7b4c9f6f34f54fd731886d97a615fe1aa97ba9a0..80d4f89b33a9558b68c9083da67= 5c70ec3d05f19 100644 --- a/drivers/firmware/samsung/Makefile +++ b/drivers/firmware/samsung/Makefile @@ -1,4 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only =20 -acpm-protocol-objs :=3D exynos-acpm.o exynos-acpm-pmic.o +acpm-protocol-objs :=3D exynos-acpm.o +acpm-protocol-objs +=3D exynos-acpm-pmic.o +acpm-protocol-objs +=3D exynos-acpm-dvfs.o obj-$(CONFIG_EXYNOS_ACPM_PROTOCOL) +=3D acpm-protocol.o diff --git a/drivers/firmware/samsung/exynos-acpm-dvfs.c b/drivers/firmware= /samsung/exynos-acpm-dvfs.c new file mode 100644 index 0000000000000000000000000000000000000000..1c5b2b143bcc3fa2d1f92146206= a2351fe0b9e95 --- /dev/null +++ b/drivers/firmware/samsung/exynos-acpm-dvfs.c @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2020 Samsung Electronics Co., Ltd. + * Copyright 2020 Google LLC. + * Copyright 2025 Linaro Ltd. + */ + +#include +#include +#include +#include +#include + +#include "exynos-acpm.h" +#include "exynos-acpm-dvfs.h" + +#define ACPM_DVFS_ID GENMASK(11, 0) +#define ACPM_DVFS_REQ_TYPE GENMASK(15, 0) + +#define ACPM_DVFS_FREQ_REQ 0 +#define ACPM_DVFS_FREQ_GET 1 + +static void acpm_dvfs_set_xfer(struct acpm_xfer *xfer, u32 *cmd, size_t cm= dlen, + unsigned int acpm_chan_id, bool response) +{ + xfer->acpm_chan_id =3D acpm_chan_id; + xfer->txd =3D cmd; + xfer->txlen =3D cmdlen; + + if (response) { + xfer->rxd =3D cmd; + xfer->rxlen =3D cmdlen; + } +} + +static void acpm_dvfs_init_set_rate_cmd(u32 cmd[4], unsigned int clk_id, + unsigned long rate) +{ + cmd[0] =3D FIELD_PREP(ACPM_DVFS_ID, clk_id); + cmd[1] =3D rate / HZ_PER_KHZ; + cmd[2] =3D FIELD_PREP(ACPM_DVFS_REQ_TYPE, ACPM_DVFS_FREQ_REQ); + cmd[3] =3D ktime_to_ms(ktime_get()); +} + +int acpm_dvfs_set_rate(const struct acpm_handle *handle, + unsigned int acpm_chan_id, unsigned int clk_id, + unsigned long rate) +{ + struct acpm_xfer xfer =3D {0}; + u32 cmd[4]; + + acpm_dvfs_init_set_rate_cmd(cmd, clk_id, rate); + acpm_dvfs_set_xfer(&xfer, cmd, sizeof(cmd), acpm_chan_id, false); + + return acpm_do_xfer(handle, &xfer); +} + +static void acpm_dvfs_init_get_rate_cmd(u32 cmd[4], unsigned int clk_id) +{ + cmd[0] =3D FIELD_PREP(ACPM_DVFS_ID, clk_id); + cmd[2] =3D FIELD_PREP(ACPM_DVFS_REQ_TYPE, ACPM_DVFS_FREQ_GET); + cmd[3] =3D ktime_to_ms(ktime_get()); +} + +unsigned long acpm_dvfs_get_rate(const struct acpm_handle *handle, + unsigned int acpm_chan_id, unsigned int clk_id) +{ + struct acpm_xfer xfer; + unsigned int cmd[4] =3D {0}; + int ret; + + acpm_dvfs_init_get_rate_cmd(cmd, clk_id); + acpm_dvfs_set_xfer(&xfer, cmd, sizeof(cmd), acpm_chan_id, true); + + ret =3D acpm_do_xfer(handle, &xfer); + if (ret) + return 0; + + return xfer.rxd[1] * HZ_PER_KHZ; +} diff --git a/drivers/firmware/samsung/exynos-acpm-dvfs.h b/drivers/firmware= /samsung/exynos-acpm-dvfs.h new file mode 100644 index 0000000000000000000000000000000000000000..9f2778e649c9d806646467c3f3f= 1425333b6acd8 --- /dev/null +++ b/drivers/firmware/samsung/exynos-acpm-dvfs.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright 2020 Samsung Electronics Co., Ltd. + * Copyright 2020 Google LLC. + * Copyright 2025 Linaro Ltd. + */ +#ifndef __EXYNOS_ACPM_DVFS_H__ +#define __EXYNOS_ACPM_DVFS_H__ + +#include + +struct acpm_handle; + +int acpm_dvfs_set_rate(const struct acpm_handle *handle, + unsigned int acpm_chan_id, unsigned int id, + unsigned long rate); +unsigned long acpm_dvfs_get_rate(const struct acpm_handle *handle, + unsigned int acpm_chan_id, + unsigned int clk_id); + +#endif /* __EXYNOS_ACPM_DVFS_H__ */ diff --git a/drivers/firmware/samsung/exynos-acpm.c b/drivers/firmware/sams= ung/exynos-acpm.c index 3a69fe3234c75e0b5a93cbea6bb210dc6f69d2a6..9fa0335ccf5db32892fdf09e8d4= b0a885a8f8fb5 100644 --- a/drivers/firmware/samsung/exynos-acpm.c +++ b/drivers/firmware/samsung/exynos-acpm.c @@ -29,6 +29,7 @@ #include =20 #include "exynos-acpm.h" +#include "exynos-acpm-dvfs.h" #include "exynos-acpm-pmic.h" =20 #define ACPM_PROTOCOL_SEQNUM GENMASK(21, 16) @@ -590,8 +591,12 @@ static int acpm_channels_init(struct acpm_info *acpm) */ static void acpm_setup_ops(struct acpm_info *acpm) { + struct acpm_dvfs_ops *dvfs_ops =3D &acpm->handle.ops.dvfs_ops; struct acpm_pmic_ops *pmic_ops =3D &acpm->handle.ops.pmic_ops; =20 + dvfs_ops->set_rate =3D acpm_dvfs_set_rate; + dvfs_ops->get_rate =3D acpm_dvfs_get_rate; + pmic_ops->read_reg =3D acpm_pmic_read_reg; pmic_ops->bulk_read =3D acpm_pmic_bulk_read; pmic_ops->write_reg =3D acpm_pmic_write_reg; diff --git a/include/linux/firmware/samsung/exynos-acpm-protocol.h b/includ= e/linux/firmware/samsung/exynos-acpm-protocol.h index f628bf1862c25fa018a2fe5e7e123bf05c5254b9..b1e95435240fdb895a03f178d4f= b3789411b1583 100644 --- a/include/linux/firmware/samsung/exynos-acpm-protocol.h +++ b/include/linux/firmware/samsung/exynos-acpm-protocol.h @@ -13,6 +13,15 @@ struct acpm_handle; struct device_node; =20 +struct acpm_dvfs_ops { + int (*set_rate)(const struct acpm_handle *handle, + unsigned int acpm_chan_id, unsigned int clk_id, + unsigned long rate); + unsigned long (*get_rate)(const struct acpm_handle *handle, + unsigned int acpm_chan_id, + unsigned int clk_id); +}; + struct acpm_pmic_ops { int (*read_reg)(const struct acpm_handle *handle, unsigned int acpm_chan_id, u8 type, u8 reg, u8 chan, @@ -32,6 +41,7 @@ struct acpm_pmic_ops { }; =20 struct acpm_ops { + struct acpm_dvfs_ops dvfs_ops; struct acpm_pmic_ops pmic_ops; }; =20 --=20 2.51.0.740.g6adb054d12-goog From nobody Tue Dec 16 05:52:51 2025 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80F912F0C6C for ; Fri, 10 Oct 2025 12:46:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100410; cv=none; b=U+owZyrbs3r1+B9jjRFbIXnx/s5Rn827yudnLYzO8EtTJPfez+HMSDxTjvViLMWlRypKPXmtwXtXr/bk9Htm0bRhl/scxF6/iXEWCkmOZjQdwibV+CUzguLhDUMW6XKaoj0fBj5NmdAT883fgs0WENi15Ok1KM9O+XPHfMJHn3g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100410; c=relaxed/simple; bh=t1lPRTLbJh3Ia3iHDBwP0Q/txEDKq77Cj8s7vCWLHB4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=c/TntDRvr3AhF5g2RGBmtVum3P1Uw7dhoBgyxYaKaS4/OyroYDANs2Lj+il2kihSsDXOLI6vRiwL/G0CSLguUF/j1Thw+bRRGCOTTIAr4bIZ2ZH1xm1uUCRDvckm81JX4Xs9EojxgpRxzVmOEGf6ds69tMG8PvnGbUEDb5cT854= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=c916d7s0; arc=none smtp.client-ip=209.85.221.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="c916d7s0" Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-3f2ae6fadb4so2364496f8f.1 for ; Fri, 10 Oct 2025 05:46:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1760100407; x=1760705207; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6iPGUbK9frPbiRIF66lkOW8PKDoG2AW/288srP+02V0=; b=c916d7s06IG11NJ4RQXBFaCRGsnOG4rxBnsPRggVLBhIxXhjv5hDUkXcjwX2UgEdkz jhJPfk1S9n44DZZ91WKYVH2z+4KtJFNyiLtxEcjhKED+pj2U0ehPnRP6yOGzB4ZntcvD sw/k3iZbdV0H+izGzBRxe1AxV7hpiwk+QtyEvkJcqqoZSf6lDPGdfh4rmePe+Y95dcrU Dt76oYpYB3zdJ8aD/EnIdQbSZaL35CnH6K6owgaci+hHlpezsO87Ek5nlcHKTr4yXr/F DuyNjSsqz5Shjfk3w4VTcytgSlla2ge7sLifbPwDzqKcvPhNJXHoeJXDHOyjlEJXlZgJ eycw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760100407; x=1760705207; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6iPGUbK9frPbiRIF66lkOW8PKDoG2AW/288srP+02V0=; b=CEKi38MNwCA3xH2Kr6Srv1feAyqzhutws+T5MyvRAo+bUCV3rO6VRmCuEbasMgdSIn ahMegBRo/MBpn+4jyOM5VIWxZIae55EcyzpZc97cU+2OfDqsPssbjmpjM1oGlIq57JjC AFTqzYovHFibugP5VhhYBZay0BzFS2HHkjJGku1i3kIh3XafIYYIvFLzywK5Y7boRUUs 73fWUQHwJCx4jz+gd6jc0GdtSrECUtZFM/6Kol1sfzhfiwJQG4KlEbCBRVz2RgpkKufL vBgIJ7jXhrAoGYQqbajEJlWBCmPHKVYTTDv+tCRpBIg25REx0TUCN3/VwGG1Tm697FHe wJfw== X-Gm-Message-State: AOJu0YwtAtcEt+KsBw/4te4o3XYYA8UFDaj7SsP3H5PLG7RBgSE2bqtx IL3OVyilslDntf45vLQc6EztzxU0Y/RuSeixQH3KApc+wm+5vn7tWbrqRiLZRb8TZ0M= X-Gm-Gg: ASbGnctDPkHFKbwzDHxgVZhCqtbooJ00as7ywKWUehrvi4wGsyNBpNzw2rVhbUbXndz nVVxhNvpBYparoJHl0V2ONRcDufaHazmcMDBALFIo7kVOB0IyMV6SQ7A86sM8Lrnko0EaOqxzgZ VUgnGsqN8XYTEqi9M40Z2sWujSvre7XySZc4wYphGuFriPjllNnfakCIRHETmKhZ1nzHGlvd/MJ +GkD//am0UjJ4b3IfQNvaQdo7iIGhkFzfwYvsssbCyeSis63qpFlJoJKaCeAIGQYvym0HXYrYMQ Qly6UudA7/wL5I1BTbjJwHTj/M/BWWIC//j0VHF/qTRKEJFyqZ8km9yaC/cbAJ6WyUz6g7Q7xBO 5PhJhkhRYTMgZSFSAMRYely+qGIfdTf+JWkzroaYJxYFkczruYck4q2zdTNAECyJeebsgoufQbH uAKmSeUsZLjwXYZIETYWDseA== X-Google-Smtp-Source: AGHT+IGDLF3Dn6ww4MqMyl8hynsTWVMXq6aUH6TJOkzwSsp0EMXTDsmcy1Rr53t1iniI2RiP834aMQ== X-Received: by 2002:a05:6000:288c:b0:3e4:d981:e312 with SMTP id ffacd0b85a97d-4266e8e51f2mr6813063f8f.62.1760100406667; Fri, 10 Oct 2025 05:46:46 -0700 (PDT) Received: from ta2.c.googlers.com (213.53.77.34.bc.googleusercontent.com. [34.77.53.213]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fb484d056sm46376895e9.9.2025.10.10.05.46.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Oct 2025 05:46:46 -0700 (PDT) From: Tudor Ambarus Date: Fri, 10 Oct 2025 12:46:33 +0000 Subject: [PATCH v6 3/6] firmware: exynos-acpm: register ACPM clocks pdev Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251010-acpm-clk-v6-3-321ee8826fd4@linaro.org> References: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> In-Reply-To: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , =?utf-8?q?Andr=C3=A9_Draszik?= , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Alim Akhtar , Sylwester Nawrocki , Chanwoo Choi , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760100401; l=2732; i=tudor.ambarus@linaro.org; s=20241212; h=from:subject:message-id; bh=t1lPRTLbJh3Ia3iHDBwP0Q/txEDKq77Cj8s7vCWLHB4=; b=qk3U65kSz815bNfHe5stxRu4BJ0qvWZNQmQfMvtFvJGNAjNj9MvxWPW5Jp4sLvaf2hRaK3Jlg J1pvueABQIEBkgK0U/NX3fwYmXMxSALpy5zS1E7Te84RmsjTueCqo4C X-Developer-Key: i=tudor.ambarus@linaro.org; a=ed25519; pk=uQzE0NXo3dIjeowMTOPCpIiPHEz12IA/MbyzrZVh9WI= Register by hand a platform device for the ACPM clocks. The ACPM clocks are not modeled as a DT child of ACPM because: 1/ they don't have their own resources. 2/ they are not a block that can be reused. The clock identifying data is reduced (clock ID, clock name and mailbox channel ID) and may differ from a SoC to another. Signed-off-by: Tudor Ambarus Reviewed-by: Peter Griffin Tested-by: Peter Griffin # on gs101-oriole --- drivers/firmware/samsung/exynos-acpm.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/firmware/samsung/exynos-acpm.c b/drivers/firmware/sams= ung/exynos-acpm.c index 9fa0335ccf5db32892fdf09e8d4b0a885a8f8fb5..0cb269c7046015d4c5fe5731ba0= d61d48dcaeee1 100644 --- a/drivers/firmware/samsung/exynos-acpm.c +++ b/drivers/firmware/samsung/exynos-acpm.c @@ -177,9 +177,11 @@ struct acpm_info { /** * struct acpm_match_data - of_device_id data. * @initdata_base: offset in SRAM where the channels configuration resides. + * @acpm_clk_dev_name: base name for the ACPM clocks device that we're reg= istering. */ struct acpm_match_data { loff_t initdata_base; + const char *acpm_clk_dev_name; }; =20 #define client_to_acpm_chan(c) container_of(c, struct acpm_chan, cl) @@ -604,9 +606,15 @@ static void acpm_setup_ops(struct acpm_info *acpm) pmic_ops->update_reg =3D acpm_pmic_update_reg; } =20 +static void acpm_clk_pdev_unregister(void *data) +{ + platform_device_unregister(data); +} + static int acpm_probe(struct platform_device *pdev) { const struct acpm_match_data *match_data; + struct platform_device *acpm_clk_pdev; struct device *dev =3D &pdev->dev; struct device_node *shmem; struct acpm_info *acpm; @@ -647,6 +655,18 @@ static int acpm_probe(struct platform_device *pdev) =20 platform_set_drvdata(pdev, acpm); =20 + acpm_clk_pdev =3D platform_device_register_data(dev, + match_data->acpm_clk_dev_name, + PLATFORM_DEVID_NONE, NULL, 0); + if (IS_ERR(acpm_clk_pdev)) + return dev_err_probe(dev, PTR_ERR(acpm_clk_pdev), + "Failed to register ACPM clocks device.\n"); + + ret =3D devm_add_action_or_reset(dev, acpm_clk_pdev_unregister, + acpm_clk_pdev); + if (ret) + return dev_err_probe(dev, ret, "Failed to add devm action.\n"); + return devm_of_platform_populate(dev); } =20 @@ -746,6 +766,7 @@ EXPORT_SYMBOL_GPL(devm_acpm_get_by_node); =20 static const struct acpm_match_data acpm_gs101 =3D { .initdata_base =3D ACPM_GS101_INITDATA_BASE, + .acpm_clk_dev_name =3D "gs101-acpm-clk", }; =20 static const struct of_device_id acpm_match[] =3D { --=20 2.51.0.740.g6adb054d12-goog From nobody Tue Dec 16 05:52:51 2025 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5ADBE2EFDAD for ; Fri, 10 Oct 2025 12:46:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100411; cv=none; b=JpruYuA6mWYXwwP+MMJjGw22JlBVHO5gDb3yhdlkKnK7dTfAG1+Y1pFAKMiUNsGd509nTlcUhCURZOAH2ATHe21hiQ1tdpB2RIljOxPfSMTeNdl+6H7tZV/qVfB78H36/dBEqCCsRLehcNJexyWP8gzocR1VjwaV22iSf4qo10o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100411; c=relaxed/simple; bh=WUOPaewEXUxz1AoJ6NXGQ9zCjuaJhlXKujpMsFiB5fI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ePDDKU20InyugOAG5lxp5QEMIpZ8rMKqb5jOJWOXtUoE7Ivl1dmAbw4ayHAaNQY7AvxQmjg8qGYOcLW0MblU+xiixlPi2Bv8L0+lzm0DCABSyDiHuzBgJPT8EyjGqn0TenGvf4b0vEeIzCGuRwBD8IYH9xWwQ1IAd8Z01WhDuoQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=wH5cq9Qr; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="wH5cq9Qr" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-46e37d10f3eso15147095e9.0 for ; Fri, 10 Oct 2025 05:46:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1760100407; x=1760705207; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LAlEGGoIwwLS+tNt2iilinfrs+DKRYT+/rT/ksD4Tt4=; b=wH5cq9QrWs7r15VOlSbLBFIfdqVquh6HoI+h9nrerjGQClHwKTiCcVKIlu533yx6kD Do4SZYxLNlptSKn7ZQ7Ih0ECAZsFI7/ny25Hql5nhQtfOGqYGmEAvMJ7L007LplgqxW2 4qyEvizTDufqK7DNUpQUe3Y8t/fqnBRZuLolnJEueIiuluaTKFep3imrw0+1Ys9sI+qG hHAsIY6XI+xz6gyHeOglnCIYLouYCUV36EBvKym3GEk6YJqUF70dZKcTrwpfmzprY+oK 2evqiIy0VdffXUi//h8YifCVAawu9b/J6mDOmAu5yf6RXeTWADVlYyuhvSIM0YxQ8v9o 6hxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760100407; x=1760705207; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LAlEGGoIwwLS+tNt2iilinfrs+DKRYT+/rT/ksD4Tt4=; b=aO1xrj9ZxYeAOuNLtB7iKY8RQrIL/A3FiddqdNRYSL1XsExF+WcoRxkJTYzj96bA7b dz2amnam7cBqEAsan5fwJs/aTUtyVR04QybKtg1N6ZkYD9jq4CBgrnQg02/gp7vRezRP Q1HBSpdwrXidFYVRVYHQY5N/DUrozL2fI5vkLAQIbWwcwG/CjfY52gk/DcT2eNb6PEnW xqmg0e/RH6ltZAcYJqcMtW7p/dAuUw3YJ27nVjpVbI0VL6N8YHv4vEgQ8J8G7wx/prUU iaNsMJ8vvo7ggkwRI/4oje5MElKSpMrRvf+L8SCHd+nay5TJ43AF4diiN+mJRPgrBrtq Tqow== X-Gm-Message-State: AOJu0YxLyqTmVTN6jWI61c6Tz27DO+kceMmHzAvjeNKp1gSlL2IGh/2y hgIp1b1tKhKuH1p3FLxBJRTdL4+VPyyylgW1Kwy9uVguGm8RokkiVp+AK7/myPQrsQc= X-Gm-Gg: ASbGncu5ZtqpQ496WQGsQ4iFQGME4dgcKjN6dorycBhjgLhATV7rVnqnRjQMYOeeosM COPdyXcjfp6N+Ft6gMXlx40qg61N1go3/Kj2Um4eckJsx3otrKN6dqqMPgxUIHoiBSIYPBEF6gm EyqjDjIserSm4KkaO2geHI62VbOUXKHCZlWKHU0wrojpbCzehFM8NBq1fjp492IonUaSxoMkwSx oCCY7Wa6OHWPZLj6iLiP4RVoyjtdIqFJb5AHfMIAU/90vGJDVUvUsFMmN5LkR7GFjnKlQ9/r2kN AiEgYZ3sUcd8u1JwxKdzSF7g/K0FZXYcmGbfi9MIufeB0z3+9eiISpwF0UNYSSiINLh7sl5sbln CrMdpFcipIfrvJdCDS4LsdbCMxJDNNyUmEfTEH22b0X40LED6sM5mJgomU0qtM2dZVO2808NQh2 +4+rd+Ppq+KSsdYwwytXETGg== X-Google-Smtp-Source: AGHT+IGuI2G+Ae3XpP1MAn3JfPl3PWFrf8R525ep2U5Hm4R+0mx8g5Lnp7ZF1uVZR6Qd868Jax78JA== X-Received: by 2002:a05:600c:8505:b0:46e:67c8:729f with SMTP id 5b1f17b1804b1-46fa9a9447cmr76851325e9.7.1760100407426; Fri, 10 Oct 2025 05:46:47 -0700 (PDT) Received: from ta2.c.googlers.com (213.53.77.34.bc.googleusercontent.com. [34.77.53.213]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fb484d056sm46376895e9.9.2025.10.10.05.46.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Oct 2025 05:46:46 -0700 (PDT) From: Tudor Ambarus Date: Fri, 10 Oct 2025 12:46:34 +0000 Subject: [PATCH v6 4/6] clk: samsung: add Exynos ACPM clock driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251010-acpm-clk-v6-4-321ee8826fd4@linaro.org> References: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> In-Reply-To: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , =?utf-8?q?Andr=C3=A9_Draszik?= , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Alim Akhtar , Sylwester Nawrocki , Chanwoo Choi , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760100401; l=7194; i=tudor.ambarus@linaro.org; s=20241212; h=from:subject:message-id; bh=WUOPaewEXUxz1AoJ6NXGQ9zCjuaJhlXKujpMsFiB5fI=; b=BanjhtC7fgNjpy0sgYOx2hwH230uKAsCpatoQx+xvu1n80CRbIq0YU4T5O6Mx0kMVbVRBX0ub M8hXBqCff5zB8P8HnSUfWxh3XsBlLFCNADZbVT8yMkXZR+KKkPOOCRs X-Developer-Key: i=tudor.ambarus@linaro.org; a=ed25519; pk=uQzE0NXo3dIjeowMTOPCpIiPHEz12IA/MbyzrZVh9WI= Add the Exynos ACPM clock driver. It provides support for clocks that are controlled by firmware that implements the ACPM interface. Signed-off-by: Tudor Ambarus Reviewed-by: Peter Griffin Tested-by: Peter Griffin # on gs101-oriole --- drivers/clk/samsung/Kconfig | 10 +++ drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-acpm.c | 185 +++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 196 insertions(+) diff --git a/drivers/clk/samsung/Kconfig b/drivers/clk/samsung/Kconfig index 76a494e95027af26272e30876a87ac293bd56dfa..70a8b82a0136b4d0213d8ff95e0= 29c52436e5c7f 100644 --- a/drivers/clk/samsung/Kconfig +++ b/drivers/clk/samsung/Kconfig @@ -95,6 +95,16 @@ config EXYNOS_CLKOUT status of the certains clocks from SoC, but it could also be tied to other devices as an input clock. =20 +config EXYNOS_ACPM_CLK + tristate "Clock driver controlled via ACPM interface" + depends on EXYNOS_ACPM_PROTOCOL || (COMPILE_TEST && !EXYNOS_ACPM_PROTOCOL) + help + This driver provides support for clocks that are controlled by + firmware that implements the ACPM interface. + + This driver uses the ACPM interface to interact with the firmware + providing all the clock controlls. + config TESLA_FSD_COMMON_CLK bool "Tesla FSD clock controller support" if COMPILE_TEST depends on COMMON_CLK_SAMSUNG diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile index ef464f434740f96623f9df62f94e2903e14e2226..f3657f2e1b98c6f431ab1f04c2d= 2a44fe317261b 100644 --- a/drivers/clk/samsung/Makefile +++ b/drivers/clk/samsung/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) +=3D clk-exynos990.o obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) +=3D clk-exynosautov9.o obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) +=3D clk-exynosautov920.o obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) +=3D clk-gs101.o +obj-$(CONFIG_EXYNOS_ACPM_CLK) +=3D clk-acpm.o obj-$(CONFIG_S3C64XX_COMMON_CLK) +=3D clk-s3c64xx.o obj-$(CONFIG_S5PV210_COMMON_CLK) +=3D clk-s5pv210.o clk-s5pv210-audss.o obj-$(CONFIG_TESLA_FSD_COMMON_CLK) +=3D clk-fsd.o diff --git a/drivers/clk/samsung/clk-acpm.c b/drivers/clk/samsung/clk-acpm.c new file mode 100644 index 0000000000000000000000000000000000000000..b90809ce3f882c489114c9d7299= 417d7fe373749 --- /dev/null +++ b/drivers/clk/samsung/clk-acpm.c @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Samsung Exynos ACPM protocol based clock driver. + * + * Copyright 2025 Linaro Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct acpm_clk { + u32 id; + struct clk_hw hw; + unsigned int mbox_chan_id; + const struct acpm_handle *handle; +}; + +struct acpm_clk_variant { + const char *name; +}; + +struct acpm_clk_driver_data { + const struct acpm_clk_variant *clks; + unsigned int nr_clks; + unsigned int mbox_chan_id; +}; + +#define to_acpm_clk(clk) container_of(clk, struct acpm_clk, hw) + +#define ACPM_CLK(cname) \ + { \ + .name =3D cname, \ + } + +static const struct acpm_clk_variant gs101_acpm_clks[] =3D { + ACPM_CLK("mif"), + ACPM_CLK("int"), + ACPM_CLK("cpucl0"), + ACPM_CLK("cpucl1"), + ACPM_CLK("cpucl2"), + ACPM_CLK("g3d"), + ACPM_CLK("g3dl2"), + ACPM_CLK("tpu"), + ACPM_CLK("intcam"), + ACPM_CLK("tnr"), + ACPM_CLK("cam"), + ACPM_CLK("mfc"), + ACPM_CLK("disp"), + ACPM_CLK("bo"), +}; + +static const struct acpm_clk_driver_data acpm_clk_gs101 =3D { + .clks =3D gs101_acpm_clks, + .nr_clks =3D ARRAY_SIZE(gs101_acpm_clks), + .mbox_chan_id =3D 0, +}; + +static unsigned long acpm_clk_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct acpm_clk *clk =3D to_acpm_clk(hw); + + return clk->handle->ops.dvfs_ops.get_rate(clk->handle, + clk->mbox_chan_id, clk->id); +} + +static int acpm_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + /* + * We can't figure out what rate it will be, so just return the + * rate back to the caller. acpm_clk_recalc_rate() will be called + * after the rate is set and we'll know what rate the clock is + * running at then. + */ + return 0; +} + +static int acpm_clk_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct acpm_clk *clk =3D to_acpm_clk(hw); + + return clk->handle->ops.dvfs_ops.set_rate(clk->handle, + clk->mbox_chan_id, clk->id, rate); +} + +static const struct clk_ops acpm_clk_ops =3D { + .recalc_rate =3D acpm_clk_recalc_rate, + .determine_rate =3D acpm_clk_determine_rate, + .set_rate =3D acpm_clk_set_rate, +}; + +static int acpm_clk_register(struct device *dev, struct acpm_clk *aclk, + const char *name) +{ + struct clk_init_data init =3D {}; + + init.name =3D name; + init.ops =3D &acpm_clk_ops; + aclk->hw.init =3D &init; + + return devm_clk_hw_register(dev, &aclk->hw); +} + +static int acpm_clk_probe(struct platform_device *pdev) +{ + const struct acpm_handle *acpm_handle; + struct clk_hw_onecell_data *clk_data; + struct clk_hw **hws; + struct device *dev =3D &pdev->dev; + struct acpm_clk *aclks; + unsigned int mbox_chan_id; + int i, err, count; + + acpm_handle =3D devm_acpm_get_by_node(dev, dev->parent->of_node); + if (IS_ERR(acpm_handle)) + return dev_err_probe(dev, PTR_ERR(acpm_handle), + "Failed to get acpm handle\n"); + + count =3D acpm_clk_gs101.nr_clks; + mbox_chan_id =3D acpm_clk_gs101.mbox_chan_id; + + clk_data =3D devm_kzalloc(dev, struct_size(clk_data, hws, count), + GFP_KERNEL); + if (!clk_data) + return -ENOMEM; + + clk_data->num =3D count; + hws =3D clk_data->hws; + + aclks =3D devm_kcalloc(dev, count, sizeof(*aclks), GFP_KERNEL); + if (!aclks) + return -ENOMEM; + + for (i =3D 0; i < count; i++) { + struct acpm_clk *aclk =3D &aclks[i]; + + /* + * The code assumes the clock IDs start from zero, + * are sequential and do not have gaps. + */ + aclk->id =3D i; + aclk->handle =3D acpm_handle; + aclk->mbox_chan_id =3D mbox_chan_id; + + hws[i] =3D &aclk->hw; + + err =3D acpm_clk_register(dev, aclk, + acpm_clk_gs101.clks[i].name); + if (err) + return dev_err_probe(dev, err, + "Failed to register clock\n"); + } + + return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, + clk_data); +} + +static const struct platform_device_id acpm_clk_id[] =3D { + { "gs101-acpm-clk" }, + {} +}; +MODULE_DEVICE_TABLE(platform, acpm_clk_id); + +static struct platform_driver acpm_clk_driver =3D { + .driver =3D { + .name =3D "acpm-clocks", + }, + .probe =3D acpm_clk_probe, + .id_table =3D acpm_clk_id, +}; +module_platform_driver(acpm_clk_driver); + +MODULE_AUTHOR("Tudor Ambarus "); +MODULE_DESCRIPTION("Samsung Exynos ACPM clock driver"); +MODULE_LICENSE("GPL"); --=20 2.51.0.740.g6adb054d12-goog From nobody Tue Dec 16 05:52:51 2025 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EAA662F1FEA for ; Fri, 10 Oct 2025 12:46:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100413; cv=none; b=X9hDKuQFlZ6gbjoeoOjzBDig92SkuRFpMMCOpeDFEWYYnCnyc0qY2j8ROSctJ+3BZFJvI2DRxjgNYG/Ie8dSDBSNUvTdPYTZ1Zc1zsqGqBqh1eBK3hUiY9DGMXhOqWorsorffoU9RG4OJXFofktY94B0F31eDJbZE/EEoPXG7go= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100413; c=relaxed/simple; bh=g3mKjgBA5eOmM+lFx4cmUAPX+2oV/GnRecyAQho2Lnc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UPfpbN7BNna6FXIjLKx+qq3imu6XHyx/53n5pnWGsuy/3D/2X5GBy0bWSVmI4liSfEzylHjpa1rXmDsF0Ye3ZKyM3El2hYNy42g/NzWSOwBv/U430ywycykBNk/WLJGVzboYvIoAHgJ5VZZMN+ddzP89lDfJYHuS8PsvtNoqunU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=XyX41Wqy; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="XyX41Wqy" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-46e48d6b95fso18887965e9.3 for ; Fri, 10 Oct 2025 05:46:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1760100408; x=1760705208; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pI91YBUn0ODEJ37uAPOBfrBDVY8tx0luGRG7kO6Mtbk=; b=XyX41WqyW6BugaY898VZBmSIZQl4cJakg7dvkTLYDBdufG9ltARL6bwvI4VkI3VwAP IAJK+8olzsfwJF61pLKJ88kL/mLFzsjxWxSSWvaYMCr/5qEZ/fqvuO7wzqnh+8SUc1q0 vDKDbbL5ZeswYGt856bA6J66S/Qu5qEJnhbixUHvjnUXmE7gf/7j/muj5BI4qdE/F67Y 8iXS5hH7/H2tcDya966bbQ230ilJmqq9+uoLJ7ydVhIC5SqStNJi5iboEkwlcGWQBUjB th18Qpm+Q4qKg/SLS26KSeM2fGGCoET0zlwS8SE2z6oQh48kkdun9UGzGDNr3mxbTqmw j/eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760100408; x=1760705208; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pI91YBUn0ODEJ37uAPOBfrBDVY8tx0luGRG7kO6Mtbk=; b=B8wZxV7Pd6KOV+Wet85HfNzCrANE0XILKJwKQogVL3XucZ/x4QfSX+U3KZB7frTDlR 9FLexlwFh5cwcZ64N81T4Z9wszw+2R2EUOgH+OF+w1MCBItn8J17cM/+RsHjRjiv75wk RlH1davqFL/RhWkpR/0yckpzk5Nn7nxJYhadnZZpDYIpupQ+uKFgzl+R8TYYNtkj7hS5 +3QYUz63wIo7ZBJnDy8MEyL/aU8YlXOBqs+kxzbFZyYuuuP/1Am5bM6UCCc1uDGkZRgb efuE8joII7M2rT9nDK5iQopT91aVn5q4/t+JYkNQr+p5KOMsUzeJ9v4AIiTJnhIPEb7/ nbXg== X-Gm-Message-State: AOJu0Yzi2EbYWi6dVUlkxj0bDtORi9NpbvScKD6pB90btgC0eENmVED+ qECqAs7+QFSQ0lme/5SUGQsTWjKM3r7Ve5n8GVbMS4CPgCjZscgzw74+hggelr0fT+8= X-Gm-Gg: ASbGnculMnoVhT3t/NWz1l1509rkrzeTAB6BUHfTZeFoD/+udGT2Y3xxd6nsBFg/H2T 0mUBkG/MBWbX1YfNLkjAVDGsbY67K8sI2xncpEnEpIis2OClBImsd+RQRKKLDhDN/v3d0wwTBaI Em4IcAbkVXJJQy9Wx20ZPfNwueKioHeG8iUtOLYGGx79J8hIEz9iECrUrA2kjEVvZBFkfj5cpFy PNFCrQrEQPtxRdtG/Ogu0lqvqs4HVGZP8rIVoGx760/o9/DEUfTDGczdbKt02nmwBL5qNY1tLui dkmLHH7Y1jsRvQzVvZuojQjk7X+b2tYIy/q4h3EI2mYBlsfRFb1CO1mPufBXIIC1uc08/v5mZpf bsg1Iy2fDXPXSISilp+g6lXCMAzD1Olfelh4ATEfkJ1ZnQ9qxlsQPo/FYPHfhI8p9cCCdRUJtS6 ag7sTpMpcQfS7YtftAxjoGeg== X-Google-Smtp-Source: AGHT+IF4DKpiRzWSCX0rNDuTrRqKdF56LpWr4xVHOhNz6eYaEJ8Bb9XyBCJmGVJ2NHkQ9GmAaWccdA== X-Received: by 2002:a05:600c:548d:b0:46e:49fd:5e30 with SMTP id 5b1f17b1804b1-46fa9a8f4e3mr83469915e9.6.1760100408062; Fri, 10 Oct 2025 05:46:48 -0700 (PDT) Received: from ta2.c.googlers.com (213.53.77.34.bc.googleusercontent.com. [34.77.53.213]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fb484d056sm46376895e9.9.2025.10.10.05.46.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Oct 2025 05:46:47 -0700 (PDT) From: Tudor Ambarus Date: Fri, 10 Oct 2025 12:46:35 +0000 Subject: [PATCH v6 5/6] arm64: defconfig: enable Exynos ACPM clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251010-acpm-clk-v6-5-321ee8826fd4@linaro.org> References: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> In-Reply-To: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , =?utf-8?q?Andr=C3=A9_Draszik?= , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Alim Akhtar , Sylwester Nawrocki , Chanwoo Choi , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760100402; l=946; i=tudor.ambarus@linaro.org; s=20241212; h=from:subject:message-id; bh=g3mKjgBA5eOmM+lFx4cmUAPX+2oV/GnRecyAQho2Lnc=; b=NTVzlJxWw7xyeoGeBBqzM/8gvY/1az1ZXvATM9Z29dX7t5LcuktT1BATpk+ooyP6VGq7mm4+T lssKF7XBzBZC5cew2mcDdiAvlteaBf9sTDx/nJY7jNJXG2Iu7gwaeJ9 X-Developer-Key: i=tudor.ambarus@linaro.org; a=ed25519; pk=uQzE0NXo3dIjeowMTOPCpIiPHEz12IA/MbyzrZVh9WI= Enable the Exynos ACPM clocks driver. Samsung Exynos platforms implement ACPM to provide support for clock configuration, PMIC and temperature sensors. Signed-off-by: Tudor Ambarus Reviewed-by: Peter Griffin Tested-by: Peter Griffin # on gs101-oriole --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e3a2d37bd10423b028f59dc40d6e8ee1c610d6b8..646097e94efe7f1a18fb59d5b6d= fc6268be91383 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1458,6 +1458,7 @@ CONFIG_CLK_GFM_LPASS_SM8250=3Dm CONFIG_SM_VIDEOCC_8450=3Dm CONFIG_CLK_RCAR_USB2_CLOCK_SEL=3Dy CONFIG_CLK_RENESAS_VBATTB=3Dm +CONFIG_EXYNOS_ACPM_CLK=3Dm CONFIG_CLK_SOPHGO_CV1800=3Dy CONFIG_HWSPINLOCK=3Dy CONFIG_HWSPINLOCK_OMAP=3Dm --=20 2.51.0.740.g6adb054d12-goog From nobody Tue Dec 16 05:52:51 2025 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A97D52F2619 for ; Fri, 10 Oct 2025 12:46:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100413; cv=none; b=izFAUzaOhLRH77gNkoWtwyazMFuxBi4rH49yVoO5XeINlvqMR65YIB1+C+lA4shRakR4cpCg8C6fNaspRBp5uR6kb0idIcI/1p1oXX3ejKwl0jnVotgoh51IZvsng5oFWzSBKbc7I6HNg6t6FuYwk0U8Dn8K7UP7l/1Sl+JBGWE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760100413; c=relaxed/simple; bh=hUk7p7wXwxuWON/P6SaBYN67C9x3HyQcVroLLSWoXfk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=F2JpMvIQG1UFQZpc+UTEdMCgyaaIuMAGOPCXNozjcVq26+xR2/uxvBCD6JalHW8g+oRYGXekQkNgHTci5fAyDbGhsdaCvUBf4NopqThRkR5BMRAjEEBXfT4+pyRjkHwWdgJahQzyKoxC//EQr69Mu9stcv61PTbl6FrcTBmHkao= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=i+Q6AJqY; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="i+Q6AJqY" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-46e3cdc1a6aso15687755e9.1 for ; Fri, 10 Oct 2025 05:46:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1760100409; x=1760705209; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=euDBh1JPBik0jtg2IFON/RfdHFmTQnkqEMlQtD5Hj7I=; b=i+Q6AJqYmm8LBYnWZA8kmyEyGoHVTegHASQDDbaz4rGaIbsc/whJJvcu6vrzHNgRVB c9/g5dJlEG2S25+17M1PUWImRVua9g2HNFhsKv94T2aMxZJL1YL2PV6xJZmL86tgQEoc updU1xJHMb+MXNq5INGRue1lYsqWQ+ycmXUxkuN1Ma84PyrujDF8DP5UwjiX+y5yeu8V 3D0QKAShx9+Nsgpo5fFl26AFnmCeuQ0QtAVXOLYN/qZ0WdEASFS8ca4onoPWMl1fu0eU xT7/omWnVlv5KT8YSoDi6AnpTSGwkzODlGfx5GTiwtrl+IaoXO+f3Fxv9wPmVtRrxzGN BPzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760100409; x=1760705209; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=euDBh1JPBik0jtg2IFON/RfdHFmTQnkqEMlQtD5Hj7I=; b=f9fzrLkZyK7I/roGO/VKZ85tGVHoxDJ84puLgiPCJ97wfOMpF8XTa92jcM0Ht73PfB 2Aux37jXSSgbQoift3WJruviAa0ZZDjTSIXeo1fbPoH/GtuRw1USO8kXTfxMFKFGeUXu ELNmN20OomiAi27hxJ5ZSypcaXWkR5LIo5srTtITDIdYvXUCeWqynGqPKERUCSzGO7bB 4FNMWpt3ttbJVu1qli6GEXe/H7MPCOhKRrNGLZblfK5hvqlVNhup/ifpagCkDNOP1BHL r+uKBf2BEOCvT7+Q8cWyFgdJH7z/+Y4YMi/JjMhbPH9wcTkTOMdpOyFi4GOVU20EcSCO 1NuQ== X-Gm-Message-State: AOJu0YwNfOfuBzbz14H0U880FJsD6QN0+/NyKufCYAyzU0qveSqWuTrh zsd6VGR5EaSSPutyU0a0csQreehNPEELJ6mUpAiZk24XCqzV0Xo8na0DQVldYf77cNA= X-Gm-Gg: ASbGncsi4iHJOIWiGeJQVferLBkHVeyMdekb/VWNPhk0W/4Dy2K6e5D8pmKIwFIJAZz CDdP+iVB7R3gjTCqPxKa1K/SUeZRlDeFJcJ97cCmnhXVmRJBwYAYmUEht+ADnBoajjO7zDHJKXO W2Mq8fJ3Gr4kb/XcKE3JiTDYuiwb4HM+cl0zWeZ+eMRVd79SRr6ZczoEUIRKXrL0vNvzGxjC9bK n/W0rIbpPPNTGCbyKET9VgmrSZ7vzgRm7tGN2b2s0SOjAr+gaBeZLpV69sAiWt8Ol+7YBosPkao fOAdXZVvzDZi1GJtkg0XzxMqSMaIh2bsam+8APA/vixx0rhl9QxPuHmnV6rXWmPe7RyEYmydTJZ 0QJdM4dvvcoIJtDkUfefc2CSEQsbOFwQEce01Sis8CQ+BcVBL0RkWZr6M5G0SfEvTmBC8Zp6I6W XigwnlgfxK1dgqrxpPLwbi/A== X-Google-Smtp-Source: AGHT+IH8x0QfTr6wJYCjDE3d42CDoKbarW30rvQ/Cc2ORyEX4B7UUOdkskMSSnIc4XAyGE82hs4N5Q== X-Received: by 2002:a05:600c:6592:b0:46f:a2ba:581f with SMTP id 5b1f17b1804b1-46fa9ec796bmr84534875e9.16.1760100408792; Fri, 10 Oct 2025 05:46:48 -0700 (PDT) Received: from ta2.c.googlers.com (213.53.77.34.bc.googleusercontent.com. [34.77.53.213]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fb484d056sm46376895e9.9.2025.10.10.05.46.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Oct 2025 05:46:48 -0700 (PDT) From: Tudor Ambarus Date: Fri, 10 Oct 2025 12:46:36 +0000 Subject: [PATCH v6 6/6] MAINTAINERS: add ACPM clock bindings and driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251010-acpm-clk-v6-6-321ee8826fd4@linaro.org> References: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> In-Reply-To: <20251010-acpm-clk-v6-0-321ee8826fd4@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , =?utf-8?q?Andr=C3=A9_Draszik?= , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Alim Akhtar , Sylwester Nawrocki , Chanwoo Choi , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760100402; l=1202; i=tudor.ambarus@linaro.org; s=20241212; h=from:subject:message-id; bh=hUk7p7wXwxuWON/P6SaBYN67C9x3HyQcVroLLSWoXfk=; b=Enoypv5lWz1jLL8VOiF8wE4cWDFIyo47tyJbQitxtWSbq+eKO6jjL0y+BmtW8IkT/uywAVSZb namtqWy2kaMATnFmk94Ffxc0XmxkNambqyqvWPYoai4R6uOhoewf3BJ X-Developer-Key: i=tudor.ambarus@linaro.org; a=ed25519; pk=uQzE0NXo3dIjeowMTOPCpIiPHEz12IA/MbyzrZVh9WI= Extend the Google Tensor SoC support list of files to include the GS101 ACPM clock bindings. Add the ACPM clock driver under the Samsung Exynos ACPM Protocol entry. Signed-off-by: Tudor Ambarus --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 3a27901781c2b2589a0f95678cf3df06401cac3c..6a6727ceeef67622e96441165ae= c542a2cb696c4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10599,7 +10599,7 @@ F: Documentation/devicetree/bindings/soc/google/goo= gle,gs101-pmu-intr-gen.yaml F: arch/arm64/boot/dts/exynos/google/ F: drivers/clk/samsung/clk-gs101.c F: drivers/phy/samsung/phy-gs101-ufs.c -F: include/dt-bindings/clock/google,gs101.h +F: include/dt-bindings/clock/google,gs101* K: [gG]oogle.?[tT]ensor =20 GPD FAN DRIVER @@ -22756,6 +22756,7 @@ L: linux-kernel@vger.kernel.org L: linux-samsung-soc@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml +F: drivers/clk/samsung/clk-acpm.c F: drivers/firmware/samsung/exynos-acpm* F: include/linux/firmware/samsung/exynos-acpm-protocol.h =20 --=20 2.51.0.740.g6adb054d12-goog