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Thu, 09 Oct 2025 09:07:39 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Tomi Valkeinen , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Biju Das , Magnus Damm Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Prabhakar , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v10 1/6] clk: renesas: rzv2h-cpg: Add instance field to struct pll Date: Thu, 9 Oct 2025 17:07:27 +0100 Message-ID: <20251009160732.1623262-2-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251009160732.1623262-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20251009160732.1623262-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Add a two-bit "instance" member to struct pll and extend the PLL_PACK() macro to accept an instance parameter. Initialize all existing PLL definitions with instance 0 to preserve legacy behavior. This change enables support for SoCs with multiple PLL instances (for example, RZ/G3E we have two PLL DSIs). Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven --- v9->v10: - No changes. v8->v9: - No changes. v7->v8: - Added reviewed-by tags from Geert and Biju v6->v7: - New patch --- drivers/clk/renesas/rzv2h-cpg.h | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/clk/renesas/rzv2h-cpg.h b/drivers/clk/renesas/rzv2h-cp= g.h index 840eed25aeda..e2053049c299 100644 --- a/drivers/clk/renesas/rzv2h-cpg.h +++ b/drivers/clk/renesas/rzv2h-cpg.h @@ -16,20 +16,23 @@ * * @offset: STBY register offset * @has_clkn: Flag to indicate if CLK1/2 are accessible or not + * @instance: PLL instance number */ struct pll { unsigned int offset:9; unsigned int has_clkn:1; + unsigned int instance:2; }; =20 -#define PLL_PACK(_offset, _has_clkn) \ +#define PLL_PACK(_offset, _has_clkn, _instance) \ ((struct pll){ \ .offset =3D _offset, \ - .has_clkn =3D _has_clkn \ + .has_clkn =3D _has_clkn, \ + .instance =3D _instance \ }) =20 -#define PLLCA55 PLL_PACK(0x60, 1) -#define PLLGPU PLL_PACK(0x120, 1) +#define PLLCA55 PLL_PACK(0x60, 1, 0) +#define PLLGPU PLL_PACK(0x120, 1, 0) =20 /** * struct ddiv - Structure for dynamic switching divider --=20 2.51.0