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Thu, 9 Oct 2025 08:53:28 -0700 From: Balamanikandan Gunasundar To: Mauro Carvalho Chehab CC: Eugen Hristev , Chas Williams <3chas3@gmail.com>, Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Balakrishnan Sambath , Hans Verkuil , "Ricardo Ribalda" , Laurent Pinchart , Jacopo Mondi , Daniel Scally , Tomi Valkeinen , , , , , , Balamanikandan Gunasundar Subject: [PATCH 02/18] media: platform: microchip: Include DPC modules flags in pipeline Date: Thu, 9 Oct 2025 21:22:35 +0530 Message-ID: <20251009155251.102472-3-balamanikandan.gunasundar@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251009155251.102472-1-balamanikandan.gunasundar@microchip.com> References: <20251009155251.102472-1-balamanikandan.gunasundar@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add DPC_DPCENABLE, DPC_GDCENABLE, and DPC_BLCENABLE enable bits to ISC_SAMA7G5_PIPELINE macro to prevent isc_sama7g5_adapt_pipeline() from masking out DPC modules during pipeline configuration Signed-off-by: Balamanikandan Gunasundar --- drivers/media/platform/microchip/microchip-sama7g5-isc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/microchip/microchip-sama7g5-isc.c b/dri= vers/media/platform/microchip/microchip-sama7g5-isc.c index 36c3f4ba1962..03f7a46acd47 100644 --- a/drivers/media/platform/microchip/microchip-sama7g5-isc.c +++ b/drivers/media/platform/microchip/microchip-sama7g5-isc.c @@ -59,7 +59,8 @@ #define ISC_SAM9X7_MAX_SUPPORT_HEIGHT 1920 =20 #define ISC_SAMA7G5_PIPELINE \ - (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \ + (DPC_DPCENABLE | DPC_GDCENABLE | DPC_BLCENABLE | \ + WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \ CBC_ENABLE | SUB422_ENABLE | SUB420_ENABLE) =20 /* This is a list of the formats that the ISC can *output* */ --=20 2.34.1