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[176.247.60.194]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4256866060fsm23607749f8f.14.2025.10.08.03.43.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Oct 2025 03:43:10 -0700 (PDT) From: Francesco Lavra To: Linus Walleij , Bartosz Golaszewski , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] gpio: pca953x: enable latch only on edge-triggered inputs Date: Wed, 8 Oct 2025 12:43:09 +0200 Message-Id: <20251008104309.794273-1-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1959; i=flavra@baylibre.com; h=from:subject; bh=U/u/eowxh8ykqWPluGt9cIUTMqfcuowXol040OAY1I4=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBo5j/w4fHdAUy8GeDL3yYxoY0qDCS6GwYHvmn4v xV33kL9OGKJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaOY/8AAKCRDt8TtzzpQ2 X0K3C/9s3zWhGO4wTbp4h46syZWk1Hv4c5jc4jN7NqZOpE+l7dS+ipawX8ISJixlDP/VpvrivkT 4m7AOaJHmZj29wlcjAL3aA36YEmMq6yPU/+D/Nkx7qR25Yik/Slfa9XSwPHA68Tm4QneY+2oO/y vVcV18/vItdV2GyPtjwoFoJiAk1dp52E0Q1N4klePyasqMzvAVhMnjLUsw9lU15GRWMuL9esmZG OMJ3QsFQdPqUcTOhMMjNETkElZq90elD/idcj6+uC6UKV+tI+WWJW4w53IaEkMGySPs4tMEDprL id2L8+egN7B+1mMJnDNIR1KWc5VwD7IYk/HF5lBD2EaBdH4+f635HnULaQTmxRoFSDx95BBy/5q aS6v41W/BsQZVU4dcRPBliwXE8nGmZdVmE6daPJSytfmxZqIC9niMYnsR8S2aqbM0NapvkEUZrm 1olLMt39IG5XOv4+iD8OGhDtS7yiYww7Z7O/h2sBf76Nb3pkLHwHSvuF1pAj4/YeSUeI4= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The latched input feature of the pca953x GPIO controller is useful when an input is configured to trigger interrupts on rising or falling edges, because it allows retrieving which edge type caused a given interrupt even if the pin state changes again before the interrupt handler has a chance to run. But for level-triggered interrupts, reading the latched input state can cause an active interrupt condition to be missed, e.g. if an active-low signal (for which an IRQ_TYPE_LEVEL_LOW interrupt has been configured) triggers an interrupt when switching to the inactive state, but then becomes active again before the interrupt handler has a chance to run: in this case, if the interrupt handler reads the latched input state, it will wrongly assume that the interrupt is not pending. Fix the above issue by enabling the latch only on edge-triggered inputs, instead of all interrupt-enabled inputs. Signed-off-by: Francesco Lavra Reviewed-by: Ian Ray Reviewed-by: Martyn Welch --- drivers/gpio/gpio-pca953x.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index e80a96f39788..e87ef2c3ff82 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -761,10 +761,13 @@ static void pca953x_irq_bus_sync_unlock(struct irq_da= ta *d) int level; =20 if (chip->driver_data & PCA_PCAL) { + DECLARE_BITMAP(latched_inputs, MAX_LINE); guard(mutex)(&chip->i2c_lock); =20 - /* Enable latch on interrupt-enabled inputs */ - pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); + /* Enable latch on edge-triggered interrupt-enabled inputs */ + bitmap_or(latched_inputs, chip->irq_trig_fall, chip->irq_trig_raise, gc-= >ngpio); + bitmap_and(latched_inputs, latched_inputs, chip->irq_mask, gc->ngpio); + pca953x_write_regs(chip, PCAL953X_IN_LATCH, latched_inputs); =20 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio); =20 --=20 2.39.5