From nobody Tue Feb 10 03:57:37 2026 Received: from mail-lf1-f47.google.com (mail-lf1-f47.google.com [209.85.167.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B86122F28E9 for ; Wed, 8 Oct 2025 07:31:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759908683; cv=none; b=AqLeAAlKMzX0mqvEoNWwGf6oVGB74GL3k7vYq3QUAY4vQSphM50qRaQIHIr/3Zi+XGUps/mC2Ptk9Xo10J+GlreSHhTvfAd+YGFLv6HHNEsmuQTeW8cVH8cbQ95dNNmwDRvE1rc431V956kZqz5bsnwfhz4mgIKrUBVL1ugSZGY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759908683; c=relaxed/simple; bh=7dAHRT2r7ftPVN1rS5b3fLL9XXBwlAPnHlEMfM9TlgA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Nv19CZxeFGZAtBU+v5UoNtFnkQK+4PIrCcVm1yG9p1IJPFsI5ccnKy6YHP4cxwYjZ6t/wbsWOd+cUhQbkBwSauCfeetuNB86cZHZCekjsF//zFNgG/Msv2p6kowKOapjL54N8aYrnin+oHNm5nrpyWD+3vgZVlbkJcgzgzo6nsQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=HC63w0IV; arc=none smtp.client-ip=209.85.167.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="HC63w0IV" Received: by mail-lf1-f47.google.com with SMTP id 2adb3069b0e04-57f1b88354eso7112816e87.1 for ; Wed, 08 Oct 2025 00:31:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1759908679; x=1760513479; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=C/43znEe061f/mLeX5mGh0JaDqN09K9lxSSjlK2dh/Q=; b=HC63w0IVEJO2+Ai2+MASIXbe41FALbGsbXtwYzpJUnPkTN/8g2eo2XBI6cAuDZrSNL y0txA+GPYvQ7IOmHGFicDeHhJEYZHAhWsIpplNM4iwbSI1nYd+UShSk1H9WO2cP4xcAF XI0I6HcCsBa0ekR1JA3lYg8xBfqAtO5wPZJABB89b9NMwnHixRgsDoJlhuz1VSDPnDWZ O5PgD7h0jWjNsDfo0j6AlorU38qVcOovkdXKPgF3ZJx8Ys8TfybM4lOfBYQ+cmlTcf1n tUWXbB/+yVoB8NAis0s74TCL2ASxBorVzbmRgQlW/PfQU4uHZr1UlP1RH4ogxMNxd63f b0PQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759908679; x=1760513479; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=C/43znEe061f/mLeX5mGh0JaDqN09K9lxSSjlK2dh/Q=; b=r/jpQqpoPTE9ZJ7e7ztl/THr5wQTXmNB4AgI92S+8ipM9vn9IOiGxpb7HyAmL8Ftv2 liDIP/9kS8df3BAjizkHmwsfz6K/od2ndVYBcLCSHnO18cPVchfcv//FguRXH+fKvsLZ KmdgTZb4w9V33A8gsZ+34LdKkt9aZqgnT1JohTC34mTcdoYPtMV6NPq2ug4VDb9XUEBl 8PI7TI4VGIugBomm1hKDGyQwjG+6bhbRHPxX/uKjdE6EcXE0rLVzS0BisxKbPr5dx4qM j4BdAb9NRxbtigcqd2F3x9XO7xYp+V2N6TSEIjZnc7dgb5GQnm409h6FmskiZKUNE58W 9xgQ== X-Forwarded-Encrypted: i=1; AJvYcCXzIyqCuSAu/uz8yzvpmNN43Porx72ozYHcJDmJbJHcRAe+PoIFEZRzglrv5Il0xti6WiXDpX+VxCZemDI=@vger.kernel.org X-Gm-Message-State: AOJu0YxLl/IwA4aTCAjndSUcA91OXsiyjic4Cge9AjA7UIbxr0N+5cPn snf/klxid90z7r29oVRL5lx07Ljr8IZ1UmuF5Kmc5Vcz6LQ8RaWjpzRL X-Gm-Gg: ASbGncuOF0Yb/bBQVKOvhvKLPGG81iBuNYEexio4C58fmPB8gQnwDoEYphE4/tALr9E ewpOKNpevNx+9e5sSJUJ02thizHUpmPeeJk5y9E5QMsR5zWhgDjdqiCmUfCoeFp1AJ53WKxtOP9 zpYibNHioQ/P4Z4ftEzKYqukfmyO9r4uwO3a7a4iqI8uyIppdN0fGrFPQeKTK//ws2FxlR7zlAP yVK3Jf4W52lHojnW2yfm9lkfQ0koxP5fa2Y7hvNvFZIVBkg53SnILfeH/4EZU8yo2o0rvTZDMvT CClFQ+99wqWU72X4TptgtN7kYo8w9Ohp1IUGgxDSDXS9hp1drLmnjbnidPh9acwlR0WDsryN9vL Ju6Z2O/xMcClLGf6Mlwr2TYKXae89cgOpvN4WSQ== X-Google-Smtp-Source: AGHT+IH6yVzn596rSyB3yJ9XBLWXz7u+miIMTSdihRGfwsNDTc+rfVY8kk2V15qCy1XHoAjhkBFITg== X-Received: by 2002:a05:6512:3daa:b0:585:c51e:e99d with SMTP id 2adb3069b0e04-5906d896bc4mr657722e87.3.1759908678413; Wed, 08 Oct 2025 00:31:18 -0700 (PDT) Received: from xeon.. ([188.163.112.70]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-58b0118d22bsm6911016e87.85.2025.10.08.00.31.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Oct 2025 00:31:18 -0700 (PDT) From: Svyatoslav Ryhel To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Luca Ceresoli , Prashant Gaikwad , Michael Turquette , Stephen Boyd , Mikko Perttunen , Linus Walleij , Mauro Carvalho Chehab , Greg Kroah-Hartman , Svyatoslav Ryhel , =?UTF-8?q?Jonas=20Schw=C3=B6bel?= , Dmitry Osipenko , Charan Pedumuru , Diogo Ivo , Aaron Kling , Arnd Bergmann Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH v4 03/24] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks Date: Wed, 8 Oct 2025 10:30:25 +0300 Message-ID: <20251008073046.23231-4-clamor95@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20251008073046.23231-1-clamor95@gmail.com> References: <20251008073046.23231-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Tegra30 has CSI pad clock enable bits embedded into PLLD/PLLD2 registers. Add ids for these clocks. Additionally, move TEGRA30_CLK_CLK_MAX into clk-tegra30 source. Signed-off-by: Svyatoslav Ryhel Acked-by: Krzysztof Kozlowski --- drivers/clk/tegra/clk-tegra30.c | 1 + include/dt-bindings/clock/tegra30-car.h | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra3= 0.c index ca367184e185..ca738bc64615 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -53,6 +53,7 @@ #define SYSTEM_CLK_RATE 0x030 =20 #define TEGRA30_CLK_PERIPH_BANKS 5 +#define TEGRA30_CLK_CLK_MAX 311 =20 #define PLLC_BASE 0x80 #define PLLC_MISC 0x8c diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/= clock/tegra30-car.h index f193663e6f28..763b81f80908 100644 --- a/include/dt-bindings/clock/tegra30-car.h +++ b/include/dt-bindings/clock/tegra30-car.h @@ -271,6 +271,7 @@ #define TEGRA30_CLK_AUDIO3_MUX 306 #define TEGRA30_CLK_AUDIO4_MUX 307 #define TEGRA30_CLK_SPDIF_MUX 308 -#define TEGRA30_CLK_CLK_MAX 309 +#define TEGRA30_CLK_CSIA_PAD 309 +#define TEGRA30_CLK_CSIB_PAD 310 =20 #endif /* _DT_BINDINGS_CLOCK_TEGRA30_CAR_H */ --=20 2.48.1