From nobody Mon Dec 8 03:13:18 2025 Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E52792C0F81 for ; Wed, 8 Oct 2025 18:56:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949818; cv=none; b=vBK9sNeLaBmafmDhBuTIdHaX4BAvLNiOmPENbtvXEeXIhQYrlAJx7IobKN89o9huTqwnFayRxoloEdqlwwJty4OBIUlQ5UvEE87ccgdt4YXqb2sVepTwC3YwhG60g8yk+fwUNYYmLZY0cO7fDklK9Ezd9Y4PCMYnLZ8x/yJS0+s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949818; c=relaxed/simple; bh=o2AYik/e+vN8VxsPgeAxxUqzsELYjKj/XmU41yiPdgk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ET9iNXQDSE1H7jAChXjIdT/4jifN2EwPb+D77kcrNNf6hDlFFpku1NeDv7fDWDJ8DtOpa9viZtzl8+0UO8XclHsDZZUg7DCpuBsi9n+4DbTqWnbCZOSmaLbtaChbcGg1OMv66gUCVmA0NNG750NvO++UN/GV1xH3yMf8wBNWWPg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=GGBvR0TW; arc=none smtp.client-ip=209.85.221.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="GGBvR0TW" Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-3ee15505cdeso225042f8f.0 for ; Wed, 08 Oct 2025 11:56:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1759949815; x=1760554615; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=UrhdDIRe1o3+P/UYLupG9vR2K+U9ntmMSAXW1Y8SyYA=; b=GGBvR0TWZ9l/q+mKkzHEaGooP5OTW69al6DF/zF6F8ytFD5RuZeiSQnshwMTlYEqpl sDpSf+kHeiIUH/2lq+lViBOsEbRBw7Y/QC2y4d1ftv5OBDnhQ5AiyqLzYb+RoLNPgv0q Cv5gJy0Xd8qvI1EtjQ182I88XJbDjVTWDv1+P6hJJodEyqIDyfHG6AuEq6CEPtBNTgUQ PW+6kWAa4z3jCqJczxkrU5sLJ936uRNIHMeGzOf/0eqJ5Agt93xlMxmMZcfOLCEuTLYe Wd6COZQApkBo2Uwk+r6ifJXEz97bsfbAOqkwOfSz1AJRv1k/O1O5FkPHu9pC2Bz3xo3A x9hA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759949815; x=1760554615; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UrhdDIRe1o3+P/UYLupG9vR2K+U9ntmMSAXW1Y8SyYA=; b=S1u8zBjBW1W27x5pbW3JestWKTBjNrluTfBlE8nX8Eq876ATSyw7/q0Z0o7+sanvRW G5M5czY0amZl3aMUk0/FB5E8O1zd6jQVlYkMQYmClPEyOI+IZqwF1qi6A2b7EKicJypL /beivpuDBaQnNxTC3550FO73yuwbUL1mdu0z9skQLcAgIFTEu8LzfMx4n1qU/Y2snMQ7 wpo02pFtLJRgW4uvPRg59AyXswHKZadSF8hz84gT85oC7MHI7Ai4egJJV2AeCAM+ut0l DOxuW0+FshoeW2TFvLEF1twcn7OIiTfuIUqgQSC6gsF/HynEGqJNzUhIXdoo4cwF8qJz 0HLA== X-Forwarded-Encrypted: i=1; AJvYcCV4dR4y8WWvBSbRiaoHwzuXLD0AWtpzrGuTb3AiBsEQvUm8t2gaHxP4Uvdv4SGzsVnAlqXpHlpI6rgnOvQ=@vger.kernel.org X-Gm-Message-State: AOJu0YyVJCkdtIEECUlml/LLTp1Un5tI8yHCH1Iss9CB2QS01UekI8yl iCOtz2Z2aopnc7iONWV3l71lTIcuF00sjOa0Ewbxt/XEf2IhtNB3xOpHyjrlF1y/Ao4= X-Gm-Gg: ASbGncskQwBNlxozU8V0UiwPLP4swks/K4T7fFG7tSZDvx2V/Z46LkfCCbzc5x5qrok r5Q1E4Uk56sYNH6ECIKBa/1bI/Crb3jPIEU4HEiMTDJ/av2E7B9kJFBArqBm/8E4bDJO4ZyUsr3 KNcem2OkM2uB5utfdExAS0EJIS1GrbW4NGNKEscvJALr2mG0b2Xn4PKHCe1o8J8gctS9TtC/oIW 1SfePKHjstCez8riSD9rdtg/bqWPQATLDPPLA3vLBpVw9AjxuoOUpfGysR0txN16h9/1a7ekEkE Ph/TjUzyqWv/bWshQAOl8Fn5jVdAwGYZLk+7vcjHx0bZZtmEZTUMlLpPZnI1Wb89iOpwDNLZXI7 bPBSVsNw6rLn8vQ47KJmdok2K5eaTs1dedo6lstH0ptX7g6SjflRg2ta3CKPcsGyAnjoZUFg= X-Google-Smtp-Source: AGHT+IFhL1ZEQ2bwNk3n6zQQaVBtT46suLjh6nupdx+hhvcnLWv911nqilsond0J7QD6wWtn4NSpWg== X-Received: by 2002:a05:6000:2891:b0:403:8633:b7e3 with SMTP id ffacd0b85a97d-4266e7d461emr3174953f8f.30.1759949815020; Wed, 08 Oct 2025 11:56:55 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:3d9:2080:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8e96e0sm31029735f8f.33.2025.10.08.11.56.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Oct 2025 11:56:54 -0700 (PDT) From: Neil Armstrong Date: Wed, 08 Oct 2025 20:56:48 +0200 Subject: [PATCH RFC v2 1/6] ASoC: qcom: qdsp6: q6prm: add the missing MCLK clock IDs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251008-topic-sm8x50-next-hdk-i2s-v2-1-6b7d38d4ad5e@linaro.org> References: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> In-Reply-To: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Neil Armstrong , Srinivas Kandagatla X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2123; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=o2AYik/e+vN8VxsPgeAxxUqzsELYjKj/XmU41yiPdgk=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBo5rPywIdUbOeRJo0FaMm38BDXdkqhYAvW2P3VgCLJ zMdx2CCJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaOaz8gAKCRB33NvayMhJ0ZTtEA CEZknn++6zBfvHda0Mpz9u9YIBluXbjueZX6XarIzYOBvl52JxlMfTv5nfYGQLc8l+h8LFybExrO6Z gcegfFv025V7jepDLrtOL9yt7pQMgHp4ZhsbAch3P7LuMnkd4cbC4lGH1dQhiAIrHfYZdF/590JEM3 Sqt5Xhtc15wd8VtCx5BJVBXKeZCddhh+zW2vWYwhDmnP/C2MeYUnb85C4u85aiGyTRVW8UdVjj1RJa KOIZlAFzj/va0ZDWSxWI4EyWz/Umn5uAYY6nQ8rSOCyM3KXW2VJzRv+ylaXICDdrRzR9k7XRpY8E// ErauRF9mXX5N1ON+HdySo/qIHAdj7ii8r4bFHXw5gROHVBAsX6ZgM/xFYjhEDbyY+fC7cms8ociXOK ZMB1c8F+DeFOFqrxZ611k03fIzCQrJQzFDPyOW9JIzeM6ZwSOzXufd+fwPFU6Mc+wzCT1aEEuFWUh/ r0PfsNPxBMNjC3QY9JH/Ye6dnpXcZcwSWpwqVRlH0Z/l/yu60NUXQhftm7qMHOo5lCwXE5OiQYeIvv G8+LD/2fp38DT/rx10ukwaZeGmRMeII8rbJKs1ICyunVpd3RgkKFR5wvYxr9KJwxhkxaPuoUHGM+jM CZr8dqgNm6n9naoYZkppFR5GzM8HNSTc8uhumNeFCLPh42uzsWii64tTIp+w== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add the missing MCLK ids for the q6prm DSP interface. Reviewed-by: Srinivas Kandagatla Signed-off-by: Neil Armstrong --- sound/soc/qcom/qdsp6/q6prm-clocks.c | 5 +++++ sound/soc/qcom/qdsp6/q6prm.h | 11 +++++++++++ 2 files changed, 16 insertions(+) diff --git a/sound/soc/qcom/qdsp6/q6prm-clocks.c b/sound/soc/qcom/qdsp6/q6p= rm-clocks.c index 4c574b48ab0040bc39ae16ec324b41dfc152b408..51b131fa95316cff50342ff60bf= c9e3608939d6c 100644 --- a/sound/soc/qcom/qdsp6/q6prm-clocks.c +++ b/sound/soc/qcom/qdsp6/q6prm-clocks.c @@ -42,6 +42,11 @@ static const struct q6dsp_clk_init q6prm_clks[] =3D { Q6PRM_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT), Q6PRM_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT), Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_OSR), + Q6PRM_CLK(LPASS_CLK_ID_MCLK_1), + Q6PRM_CLK(LPASS_CLK_ID_MCLK_2), + Q6PRM_CLK(LPASS_CLK_ID_MCLK_3), + Q6PRM_CLK(LPASS_CLK_ID_MCLK_4), + Q6PRM_CLK(LPASS_CLK_ID_MCLK_5), Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_MCLK), Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK), Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_MCLK), diff --git a/sound/soc/qcom/qdsp6/q6prm.h b/sound/soc/qcom/qdsp6/q6prm.h index a988a32086fe105e32c4fd713b8e0a3d17b83bca..6917e70bcb8a5f3a6bc0ce3ace2= fbf42725a3133 100644 --- a/sound/soc/qcom/qdsp6/q6prm.h +++ b/sound/soc/qcom/qdsp6/q6prm.h @@ -52,6 +52,17 @@ /* Clock ID for QUINARY MI2S OSR CLK */ #define Q6PRM_LPASS_CLK_ID_QUI_MI2S_OSR 0x116 =20 +/* Clock ID for MCLK1 */ +#define Q6PRM_LPASS_CLK_ID_MCLK_1 0x300 +/* Clock ID for MCLK2 */ +#define Q6PRM_LPASS_CLK_ID_MCLK_2 0x301 +/* Clock ID for MCLK3 */ +#define Q6PRM_LPASS_CLK_ID_MCLK_3 0x302 +/* Clock ID for MCLK4 */ +#define Q6PRM_LPASS_CLK_ID_MCLK_4 0x303 +/* Clock ID for MCLK5 */ +#define Q6PRM_LPASS_CLK_ID_MCLK_5 0x304 + #define Q6PRM_LPASS_CLK_ID_WSA_CORE_MCLK 0x305 #define Q6PRM_LPASS_CLK_ID_WSA_CORE_NPL_MCLK 0x306 =20 --=20 2.34.1 From nobody Mon Dec 8 03:13:18 2025 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE66C2BF007 for ; Wed, 8 Oct 2025 18:56:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949819; cv=none; b=oNzrrHH7F7HpEeZm8Q9cgCWHTjq2RK9Ag0mAsVyWg/ukqs55mKJbjq1kMl89MAWD+ue5f6vAQtb6ULCqirBA6+nXaiXHsooFC2JlApG/hyA2LSX65BiQ8Kn9Zw6sd6v1gbPo2wi4E3OMwIwI6kgM1BRuzXdnQjWtPv+LLaJfESY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949819; c=relaxed/simple; bh=f+9F2VgDwpt+eIZsiqDos0F36iTHtkLjFiXyBcqS6uM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GmxVDDeuWyV9iWJL0TMIhHTKY+H5ZE5oofxkC6wqM/tNev5l1r5ib+8IHpcQeARIXmch3qc5oHtORm8UnrlfoPGX0jYcpH4iOTL9ufmSw5BCE54y9WDZiDpQMWPQ0YeEh7qP7HSbnOLgHCJRrdjUlJgWiqrVQ669+OpSQpwRDyw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=UyG4K0GJ; arc=none smtp.client-ip=209.85.221.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="UyG4K0GJ" Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-3ee12807d97so281298f8f.0 for ; Wed, 08 Oct 2025 11:56:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1759949816; x=1760554616; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=RP5ag3QpkMJrEI5cmmcvESLNbS46ev4g4xZc39EVqhA=; b=UyG4K0GJCmgWVLlEE3HkE7t7g0GDNfpshKXAL3Y9ok0wVrSxo4KXu0Kq3K//C4CfE0 +KPWqg8qIsKfHHzC2R8RxWhT5NYG78yx+0TyycfYMGvP876VzYKC2CQ3w6clZhondeiM gTa4XscBhHyDWySuFzlDVaaGkqPteclMZPFeccOVKhvh4Nkg6/xCPAIUgxMTIzOTxnms vdCPffaA7XB23cBLMw32RHL2K8WELs+48wZyKG29j5dN63Oin/eXlTky3ja+kC9Nmn9A jJzy798Ook1rFkNgdXHtAoubo0kOZztTJvc62qEgu68+l2kjcHzAh8A+xoGmfnYyvrQs Um+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759949816; x=1760554616; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RP5ag3QpkMJrEI5cmmcvESLNbS46ev4g4xZc39EVqhA=; b=vXsmvHRMJ9SYwfKp+0FZC9xpzFtNwx98DG8LL+eE8NciiK71NUdA5ya3jApjzgiKrU VI/bKrPw7m/8/LLkvDrbvS8LbWF3MBVuS5CDHEwCDUOWd6r6/tjpT/2ykTVBSbNZSbef yWDg6DbtszDyuaWpsDAshpxYxnvq/UII/JgxE+jhU2AI83ox/6aJActPD2Acd/9Y/ywV sN+R97PaFzaLMWukzqe8PaNTguLEYzWLKiHGWmgY+hKefolWhN59qAXXq2IF5EXqhvTp zdUvoDbofEfjFLnOcLNADcAtd8IwPS3UTtQKAwhl8veQyIi1gtwQc3/d4qDC9+MepTiJ AklA== X-Forwarded-Encrypted: i=1; AJvYcCUn3sxAb4AQUnO3Bclw5S5/FwwVNL0Fbnum22qQPVHBOy1j7eG3NK3NrseRqtV879RNWFQtdNfBvqlHANA=@vger.kernel.org X-Gm-Message-State: AOJu0YyMUqe8kH4OZOeG4ANAzIz62nQLLkaJA4MfoRFCH375b/DW8yoo qiPBJRmpwpEo34dPQENKa1b1dwDKAI1Mu5hN56E+KnaOdu31FEQUWWdHgDXClanNeHw= X-Gm-Gg: ASbGncsj7M0wuVCKf9WlukKIO3aG25HHen1GXdONxshqnYGCn43kV2DbPqHh0q4n6LZ 0EVAHGab9bgVNNewAjm9Ot/RRwzoO3jFr02gi5NT+I2bQmsWa3qAE+w6M+/TPqI3sSBXHqAXhEw K1uia5M36MF+BakRrURGkh+ohz0PzcDKVS1pt9GcnA8CPRUHclZfGLjm3zDyo+xXyzTLqhspTph vRzKd1D0hNc1Q3hArTCk1+w2sQziRwW4LXbhM6y/Ii4zTGI/uS938UjmAJ5ou5BJe0NA5ays/hp C5TGEJB5YraX4F0SVLpCUp2hVgRHJzOyB3Iq1mo/ofeHm1eceE0folRvE5eWkXHqyGHLxmUSiq+ QSgi85t0xtgM4ET8nzME7+j6J8RMat91hH9wk966qMqv0Gtb2/fpqEDFle4eR8obIA973e19ORs O/Qt4Wcw== X-Google-Smtp-Source: AGHT+IHWb96t9jX27gWJcDQD4MNIhLEngNzoE/msC+TkOtH0mdcANE6Zxrpt9MlR78ciVFNKsFAmYg== X-Received: by 2002:a05:6000:40df:b0:425:6865:43fe with SMTP id ffacd0b85a97d-4266e7cdc9amr2754132f8f.2.1759949815845; Wed, 08 Oct 2025 11:56:55 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:3d9:2080:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8e96e0sm31029735f8f.33.2025.10.08.11.56.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Oct 2025 11:56:55 -0700 (PDT) From: Neil Armstrong Date: Wed, 08 Oct 2025 20:56:49 +0200 Subject: [PATCH RFC v2 2/6] ASoC: dt-bindings: qcom,sm8250: Add clocks properties for I2S Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251008-topic-sm8x50-next-hdk-i2s-v2-2-6b7d38d4ad5e@linaro.org> References: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> In-Reply-To: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1574; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=f+9F2VgDwpt+eIZsiqDos0F36iTHtkLjFiXyBcqS6uM=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBo5rPz4GLKtV0DtesmpGxsXgECs16ymYSjumw4wgsc vfThG5eJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaOaz8wAKCRB33NvayMhJ0ZLzD/ 0bRSvXEyLLXfAwLKWsNpmQsAaFhX8F8NRrnjNaxk8622UJm71//YRKdU0Es1FP09I/0kVPcR6jTv81 nl8BMIcekWeK5SZAWy0AiANgSiYD0qTpW2C7DEx3wG3Fy1g/eTxwF6a1WRcLRl5rU6jhU90tO3+Ubq 7LHfVwhwjxLYE/H6RsWk3ugmnUOFpnJl4gQ4qalESXD6uinXy3N52kz5afoJ3XN2sl6eKLWcns9w8w ny/8L5QssVB49i4asPTZryswNe2d3brx3tl8gIdEk3TYvwz95sjPBPVBktwYqsRRHj4DF6qS9cgd/w 76j1lgdHXesQvgAu/4N62Al/n5DyxAcYNZmmBmr/aG7/3XZG1tZDIXMTJKO/QEUYZs6nuorSjZ7SHE POdS2lKxmK/MdoK6ki8libopFPRB/Inbp7KxeZZfwrem9edlCEi32Ql5AXivRvcWscTVPRj3oYVvhg qVJrgsB0nRAmM/xTGlgwr6jD/DayS6KKHiHIrryxcKp799jcKnjuY/ZuwWrqLOXAhAY1TS1uevrp3M W+nLyKasqR5+NflkS06dMGpf7ewhKdKIGO0eQJPM/qZrLOGt5Fd5w+3WIpxpu8Qzaf0+6Fngj1ZKg6 xyMGgQg8MyMwWSyo0hQB+GW/Ux0hLX5/V4bWJEFo8bBfNzL0q3P5lckgXslQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE In order to describe the block and master clock of each I2S bus, add the first 5 I2S busses clock entries. The names (primary, secondary, tertiarty, quaternary, quinary, senary) uses the LPASS clock naming which were used for a long time on Qualcomm LPASS firmware interfaces. Signed-off-by: Neil Armstrong --- .../devicetree/bindings/sound/qcom,sm8250.yaml | 21 +++++++++++++++++= ++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Doc= umentation/devicetree/bindings/sound/qcom,sm8250.yaml index 8ac91625dce5ccba5c5f31748c36296b12fac1a6..d1420d138b7ed8152aa53769c4d= 495e1674275e6 100644 --- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml @@ -64,6 +64,27 @@ properties: $ref: /schemas/types.yaml#/definitions/string description: User visible long sound card name =20 + clocks: + minItems: 2 + maxItems: 12 + + clock-names: + minItems: 2 + items: + # mclk is the I2S Master Clock, mi2s the I2S Bit Clock + - const: primary-mi2s + - const: primary-mclk + - const: secondary-mi2s + - const: secondary-mclk + - const: tertiary-mi2s + - const: tertiary-mclk + - const: quaternary-mi2s + - const: quaternary-mclk + - const: quinary-mi2s + - const: quinary-mclk + - const: senary-mi2s + - const: senary-mclk + patternProperties: ".*-dai-link$": description: --=20 2.34.1 From nobody Mon Dec 8 03:13:18 2025 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D175A2C11E6 for ; Wed, 8 Oct 2025 18:56:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949822; cv=none; b=I5si8CQSxe6Pt3nYp5HOEXCTV+OThjUB8W+eqDEpBu3t+8P9mZeiN7hTKX6UHnMxdipLWBo4B1JXxtiV2SCcgh8f0Sv076dWc6PhGxDnwscup7fFG16QAH6YMNLpEGeAfBRs8SboWbxVudmctglnioaCU83F588KvYC+jrvUOjM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949822; c=relaxed/simple; bh=cByQlT3iuF6qwVWiTyCdysRZHmuUR8iTELF05kVhH4g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WkWIhsAS4tKRxquTlLMDO/L98r5nHRi0NSWJJ1gA7IU0pGFnvqsCRLK0E2dzSWshHI5rZpY8almTBzU7HrMOe1QrI0+hjYDjnabO6CStIM+Rd1muBNENOWS8N7Y6bz/QyBMdVORH+xvg9wF+yAFewORPOTithFUI/Qe9DR9FxIQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=HfIJ2IpX; arc=none smtp.client-ip=209.85.221.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="HfIJ2IpX" Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-4256866958bso155449f8f.1 for ; Wed, 08 Oct 2025 11:56:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1759949817; x=1760554617; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=0itgt9GoA3qaJoGcHH9KbPanWl4AsRntW2zkPUp6kYA=; b=HfIJ2IpXncwimR1T006O6kAWxC9IzuSbXQyBgjUQpyhm/1sWWHaTnN/SnVSB1W12ot w0VoBzpmLqa19wkks8WvdTDcoMl6eMb9D7TY1ygMFAtx9Iy76YJIIjGaQPYDPSbMYNqy DnJLooJFDKa2UmLfoGY6t4/CY1wHTo+nxU/Bj05FToJv5k94pz0fNxZiGMGihsSCk16A kFFY2V03uOi5PctQRG7FZQidbZkLiP1MX+IRxUyGwHb8b2NiKrvsev9v9CmQBoK7KMp1 6aDd9tfEMGiv5owzE7QXwWOADKAd6YaNBlgJbzxko5hT8ORMcBezNDp9yVcYziSoI6oo 20/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759949817; x=1760554617; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0itgt9GoA3qaJoGcHH9KbPanWl4AsRntW2zkPUp6kYA=; b=e249sUKrJUSwv9MXcheR1mp6jl/6X98LCXz8bIRna8E88maa1wLLL0CNmN6gCIZvlS G2RC3e+xj/ksVUuU5OmmjNoCX8z3FCxa6q9M83RLXoE7NcCPQFfzm/jvKN0w7enUZ+Pq HlS1KjKyMSuYnW6VKQpFvDJA7tTZ2B0xeONXOY80W0FJAjfC3GZLnSGkJOtpbNmITFkI sTHsECSFFGS/Gkqp/TSLS0TRNXtXyfBVpREexZXvbDq63GeUzJW5wEHIU0NBk/+irM6t bq251eNs0b3gXwr8pzUSMBmklGUbF03T0IyBn9JqPLY2EgUc1G2iiHXpnMDrcRU6fVpR 6x0A== X-Forwarded-Encrypted: i=1; AJvYcCWUZFSSLMpeX4vMkrMKMhxi7MT43nXsOn0+198zq6jujY8cT1D7dv5fWC1xWzMY6BKxA+Z1YQEQeKQz+gk=@vger.kernel.org X-Gm-Message-State: AOJu0Yxj+VjEy7quxS0HAhBDCeYLnE/6MKsK3SwcY/UcDdCveoif6Wxw EannCxWxK4Z+8eZuqi3hPwPQMTjW79PZ3iuhVelogVcw1TCah8gQ9vShlxhc60HP++c= X-Gm-Gg: ASbGncuBsX5/7WZ1DjPvsTCSQ2wFpyHUee7+iv5tuIpSor42+i07d+fO/QcI2JbNfX6 bCWL6AQaqBAjUQ++m2S6WFJU9Kz92GnHziF8/a6FWa73d37VCg0FKX3Kwg2AtfkXuFCsdhrzsmD tl22t9YfFF7/vhLR5kLAqpzC0Ft25ZvDSP+MQljicUlJaozhJ2IX/5FIoSdrb7w1fSDjzD0YDy9 avx/dlZorQlNr8ml0I10gX2qieJ9VZGFaehYnOXnu+KAl5XBA9F0GxlP6HtuKT+XDAAa51Cshs9 YklWA65QvwKfVPa8Rv3YphqzBPEqxGdbXUU+xx7hUx0AIG9RhnKSQBxrcUdlYaIHyc/yzeMzmJG hoEeAf5cQiPl+dBWtMoFuJctfUv+p0u/oQ+Q4qcLvjCIFFQFdWiNlJTymlJ1N8IkWrOgMtis/GQ nJv0M05A== X-Google-Smtp-Source: AGHT+IE8cg6SIT+q7qzMGY3i3e0nRUZSSkizPqDWX4+SgEmTuUU2OeYJeSYBxCj4oE+C6fSiom9+Mg== X-Received: by 2002:a05:6000:2087:b0:425:86f1:5861 with SMTP id ffacd0b85a97d-4266e7dfb44mr2642984f8f.30.1759949816973; Wed, 08 Oct 2025 11:56:56 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:3d9:2080:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8e96e0sm31029735f8f.33.2025.10.08.11.56.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Oct 2025 11:56:56 -0700 (PDT) From: Neil Armstrong Date: Wed, 08 Oct 2025 20:56:50 +0200 Subject: [PATCH RFC v2 3/6] ASoC: soc: qcom: sc8280xp: add support for I2S clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251008-topic-sm8x50-next-hdk-i2s-v2-3-6b7d38d4ad5e@linaro.org> References: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> In-Reply-To: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6868; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=cByQlT3iuF6qwVWiTyCdysRZHmuUR8iTELF05kVhH4g=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBo5rPz0lFUOljOJZuXmrJM1vNjeQQjMEI++pslKGcs P0FjBH+JAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaOaz8wAKCRB33NvayMhJ0URpD/ 41RfpXBNvNIz5LpUgjtUNF52+Y6MHNZfI9PHSmMTnoBZ9e6QPBwNqKJ0J7ZJBv2gRfjq7p3roE4R7h SkNG49Sy4YI0iU2QXd8r/PSoZZWnuWb0lQRS21PR6mpNjMkGP7bhFVL4DFgb6YmNeoClhmeyWc14dl iJbIXt0qYSUmB+i4diAS2va/ysBggYTEVlkGNClLhMwKyQQJ3YPQqGZMaq3xN4ffWmtigfN/pSBEcL yE/W4eWDLaJD1Op+a+T6c5/G5ToJ/BehOrzfa/1DB8GSDkLBNunIBeAwXKSw4fA1GxE8GNrpeQ94Ta Na/qWCYlPcblqiRxRItZ1GMpih1m2b/pNDaHTUvHryztAbOq9QqxHneQNFl6vJUm8hFcghYjTIwDBH BPvoZAd4wJqF6M44G/w7jYwmmHwxz/umcpnd0KF/cUnquFvsCzZeWHMvmsrq9ckJf7t675fzu8QmI/ QJmOJyTcPxi/drY4cpOuSfOsVuRcW2597oRLJ87A9U27pRgQl0uGtjsAUkYj6sluQTUCrcyLoMxbUk gf6CFBGz1HAqf56i58Elddd4Av2fS+kSOdS7GoiS5TnUwIMW/Cq8GUQ9kCfGF16wZ6Nvr62Q7Dwkxo ftX8uz5a2vjkIwPHLWFGeT5FFeHqmIF/5U3CxlcxOSvxRV4+ng2LGDLa3Cww== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add support for getting the I2S clocks used for the MI2S interfaces, and enable/disable the clocks on the PCM startup and shutdown card callbacks. The rate can be easily calculated since the card forces 48Hz, 2 channels at 16bit slot size. Signed-off-by: Neil Armstrong --- sound/soc/qcom/sc8280xp.c | 132 ++++++++++++++++++++++++++++++++++++++++++= +++- 1 file changed, 131 insertions(+), 1 deletion(-) diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c index 78e327bc2f07767b1032f09af7f45b947e7eb67a..82b173c2dabbd1478df49ba9f0c= c53e82bf2f8d2 100644 --- a/sound/soc/qcom/sc8280xp.c +++ b/sound/soc/qcom/sc8280xp.c @@ -4,6 +4,8 @@ #include #include #include +#include +#include #include #include #include @@ -15,15 +17,47 @@ #include "common.h" #include "sdw.h" =20 +#define I2S_MAX_CLKS 5 + +#define I2S_MCLKFS 256 +#define I2S_SLOTSIZE 16 +#define I2S_MCLK_RATE(rate, channels) \ + ((rate) * (channels) * I2S_MCLKFS) +#define I2S_BIT_RATE(rate, channels) \ + ((rate) * (channels) * I2S_SLOTSIZE) + +#define I2S_DEFAULT_RATE 48000 +#define I2S_DEFAULT_CHANNELS 2 + struct sc8280xp_snd_data { bool stream_prepared[AFE_PORT_MAX]; struct snd_soc_card *card; struct sdw_stream_runtime *sruntime[AFE_PORT_MAX]; struct snd_soc_jack jack; struct snd_soc_jack dp_jack[8]; + struct clk *i2s_clk[I2S_MAX_CLKS]; + struct clk *i2s_mclk[I2S_MAX_CLKS]; bool jack_setup; }; =20 +static int sc8280xp_snd_i2s_index(struct snd_soc_dai *dai) +{ + switch (dai->id) { + case PRIMARY_MI2S_RX...PRIMARY_MI2S_TX: + return 0; + case SECONDARY_MI2S_RX...SECONDARY_MI2S_TX: + return 1; + case TERTIARY_MI2S_RX...TERTIARY_MI2S_TX: + return 2; + case QUATERNARY_MI2S_RX...QUATERNARY_MI2S_TX: + return 3; + case QUINARY_MI2S_RX...QUINARY_MI2S_TX: + return 4; + default: + return -1; + } +} + static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd) { struct sc8280xp_snd_data *data =3D snd_soc_card_get_drvdata(rtd->card); @@ -31,10 +65,22 @@ static int sc8280xp_snd_init(struct snd_soc_pcm_runtime= *rtd) struct snd_soc_card *card =3D rtd->card; struct snd_soc_jack *dp_jack =3D NULL; int dp_pcm_id =3D 0; + int index, ret; =20 switch (cpu_dai->id) { case PRIMARY_MI2S_RX...QUATERNARY_MI2S_TX: case QUINARY_MI2S_RX...QUINARY_MI2S_TX: + index =3D sc8280xp_snd_i2s_index(cpu_dai); + ret =3D clk_set_rate(data->i2s_mclk[index], + I2S_MCLK_RATE(I2S_DEFAULT_RATE, + I2S_DEFAULT_CHANNELS)); + if (ret) + dev_err(data->card->dev, "Unable to set mclk rate\n"); + ret =3D clk_set_rate(data->i2s_clk[index], + I2S_BIT_RATE(I2S_DEFAULT_RATE, + I2S_DEFAULT_CHANNELS)); + if (ret) + dev_err(data->card->dev, "Unable to set bit rate\n"); snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_BP_FP); break; case WSA_CODEC_DMA_RX_0: @@ -68,12 +114,54 @@ static int sc8280xp_snd_init(struct snd_soc_pcm_runtim= e *rtd) return qcom_snd_wcd_jack_setup(rtd, &data->jack, &data->jack_setup); } =20 +static int sc8280xp_snd_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd =3D substream->private_data; + struct sc8280xp_snd_data *pdata =3D snd_soc_card_get_drvdata(rtd->card); + struct snd_soc_dai *cpu_dai =3D snd_soc_rtd_to_cpu(rtd, 0); + struct snd_soc_dai *codec_dai =3D snd_soc_rtd_to_codec(rtd, 0); + unsigned int codec_dai_fmt =3D SND_SOC_DAIFMT_BC_FC | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_I2S; + int index, ret; + + switch (cpu_dai->id) { + case PRIMARY_MI2S_RX...QUATERNARY_MI2S_TX: + case QUINARY_MI2S_RX...QUINARY_MI2S_TX: + index =3D sc8280xp_snd_i2s_index(cpu_dai); + ret =3D clk_prepare_enable(pdata->i2s_mclk[index]); + if (ret) + dev_err(pdata->card->dev, "Unable to enable bit clock\n"); + ret =3D clk_prepare_enable(pdata->i2s_clk[index]); + if (ret) + dev_err(pdata->card->dev, "Unable to enable master clock\n"); + snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt); + break; + default: + break; + } + + return qcom_snd_sdw_startup(substream); +} + static void sc8280xp_snd_shutdown(struct snd_pcm_substream *substream) { struct snd_soc_pcm_runtime *rtd =3D snd_soc_substream_to_rtd(substream); struct snd_soc_dai *cpu_dai =3D snd_soc_rtd_to_cpu(rtd, 0); struct sc8280xp_snd_data *pdata =3D snd_soc_card_get_drvdata(rtd->card); struct sdw_stream_runtime *sruntime =3D pdata->sruntime[cpu_dai->id]; + int index; + + switch (cpu_dai->id) { + case PRIMARY_MI2S_RX...TERTIARY_MI2S_RX: + case QUINARY_MI2S_RX...QUINARY_MI2S_TX: + index =3D sc8280xp_snd_i2s_index(cpu_dai); + clk_disable_unprepare(pdata->i2s_clk[index]); + clk_disable_unprepare(pdata->i2s_mclk[index]); + break; + default: + break; + } =20 pdata->sruntime[cpu_dai->id] =3D NULL; sdw_release_stream(sruntime); @@ -141,7 +229,7 @@ static int sc8280xp_snd_hw_free(struct snd_pcm_substrea= m *substream) } =20 static const struct snd_soc_ops sc8280xp_be_ops =3D { - .startup =3D qcom_snd_sdw_startup, + .startup =3D sc8280xp_snd_startup, .shutdown =3D sc8280xp_snd_shutdown, .hw_params =3D sc8280xp_snd_hw_params, .hw_free =3D sc8280xp_snd_hw_free, @@ -162,6 +250,44 @@ static void sc8280xp_add_be_ops(struct snd_soc_card *c= ard) } } =20 +static const char * const i2s_bus_names[I2S_MAX_CLKS] =3D { + "primary", + "secondary", + "tertiary", + "quaternary", + "quinary", +}; + +static int sc8280xp_get_i2s_clocks(struct platform_device *pdev, + struct sc8280xp_snd_data *data) +{ + struct device *dev =3D &pdev->dev; + int i; + + if (!device_property_present(dev, "clocks")) + return 0; + + for (i =3D 0; i < I2S_MAX_CLKS; ++i) { + char name[32]; + + snprintf(name, 32, "%s-mi2s", i2s_bus_names[i]); + data->i2s_clk[i] =3D devm_clk_get_optional(dev, name); + if (IS_ERR(data->i2s_clk[i])) + return dev_err_probe(dev, PTR_ERR(data->i2s_clk[i]), + "unable to get %s clock\n", + name); + + snprintf(name, 32, "%s-mclk", i2s_bus_names[i]); + data->i2s_mclk[i] =3D devm_clk_get_optional(dev, name); + if (IS_ERR(data->i2s_mclk[i])) + return dev_err_probe(dev, PTR_ERR(data->i2s_mclk[i]), + "unable to get %s clock\n", + name); + } + + return 0; +} + static int sc8280xp_platform_probe(struct platform_device *pdev) { struct snd_soc_card *card; @@ -185,6 +311,10 @@ static int sc8280xp_platform_probe(struct platform_dev= ice *pdev) if (ret) return ret; =20 + ret =3D sc8280xp_get_i2s_clocks(pdev, data); + if (ret) + return ret; + card->driver_name =3D of_device_get_match_data(dev); sc8280xp_add_be_ops(card); return devm_snd_soc_register_card(dev, card); --=20 2.34.1 From nobody Mon Dec 8 03:13:18 2025 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 950C02C11DB for ; Wed, 8 Oct 2025 18:56:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949821; cv=none; b=oj0cBJYtyjLn3Um4xWg3Kj17YjxYru8dYAaL918NyldVLRYUp2z/te3AZ6tWXqhk+FwQc6nYZuwvR/c6DiFAdnFQfO+tgtot1rLbu+attzMPNQQkmUlb63fZKVOxHyuwDjuokqn8NvwGWGA38MJddtTfOgNZNTnzCAf3f2S1Qig= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949821; c=relaxed/simple; bh=7XTSD+DcVKhNzFeyRU/magqYZ1NDagGF96Oa/mMURtI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=A5aD2gCfv5o7ho9woPi1/9CnZXevqr6pel6laXy4vXTEIQ1jBf2k7ZAT4tt0Qt5Ah5VDM9ANhK3PMfVztJ3UntNhT3KTLR6tQdbiQKm123EguuETh5QUUUiKEp69G49O8UX93y0i2Vj3lSRwakZhlidUPvPyd1FIgYMmpqtcyfc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=LN6ytmQN; arc=none smtp.client-ip=209.85.221.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="LN6ytmQN" Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-4256866958bso155454f8f.1 for ; Wed, 08 Oct 2025 11:56:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1759949818; x=1760554618; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=QiZQLPIj7oURX/aVK5meVV8q7EcmiHH/q7vr22waMhk=; b=LN6ytmQNJCcgh/JQ6o6j5vmlIE504h/2e2MYtae8BuaVLNZNMqmZS671tFGJYFgrH1 FHt5YDYPwZdNobDw1ohpU1M34FI+/9GeZWGL7G2YkYjXmjux3IcjzJCKIiJUFcqSLktZ nNkOpS1+J75PA5ItuB6d4QfRsWgtDzvgzduZcgFBwAsaYc4r1VovtBGjzalzBqYlISPS 3XkW9petxleMRIt6IFC1QHCNy5an5E0dfEk8hVitRtTlkvPtYEObQdt9mN9IWIdI6YbG pyPSY71eoq09WLZp6FSVkkRT1WiBFiBzjpmGOIGEpRov/+GfIWKfbbXK5RHBfObyWHeJ riIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759949818; x=1760554618; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QiZQLPIj7oURX/aVK5meVV8q7EcmiHH/q7vr22waMhk=; b=abTXZ0Jze0VaRBSeATo5wNwRFP95Ajkm5O2sgIhYAhcsnq3fa1aVlKNkskcmPET4Wt CsgrKww5ybkXSo7can9vP0Ps8atNAEk9HQ4PdHIo7k02riJiaxf7pcpA+lMMa4YavsAL wL8Gj1ebIKMvDwCtR3aMf5hAmEtT5w9NAymXV2H/LRmRuJMDFMZAg9KYbwxk75WXMVXC 6QqU2aGtk9Ps1j9chjeICGAs0J+kCDnduQKyk9R/svBwnGRoXcBfCViCRRBykaZ4aZbW Nb4A59apW6iZPzLXxAvyO/1oOtLE1Z16tQ2et20Bk34X1dFnPwZSeXNCfNNmu6QqWVoV OcTw== X-Forwarded-Encrypted: i=1; AJvYcCXHC1Ir0CJHzmRax5glqh1zsZQf33Ul1+3tzmJf3L8lt+On0eYSyjioOjHIExpvkz2K1dampugObQ/GIoE=@vger.kernel.org X-Gm-Message-State: AOJu0YybT3lKZjT0HtZhs2ZdovKKFHagQCamhHTxrQJQB4RuJOUfrzdj KmqcYftuDcRrigFeKhqltw2uhf0pHZJbb5Lnpq5sXvyONLo7LqzS45BsOsAJkMo1BhQ= X-Gm-Gg: ASbGncvy+GXgI7Su9yJ/yF1YaknRxbHaI0gtvWitMCk48kGemBrxFC67ybSzncG0xsn 1Xolmwd9DGZj5LWXlGYwVUAshEinMHh/4cz3YNBDO53fDoSQHtFEkgF+h6X1A4A7Wry/GCta4sr pjuFOfOlw2fWVQyo8YZL1zqcr4+06nItVnO4DSBoNrBDD+wFPeR1Mm8BDreZs7H2yxFoRaPvnPw Ki3ADq4Yk7g1BZWi93FaHATu+FfTqahDE9WqTsCuUWeliccALrgBKSu+ndfc8MwaXweK9h2OGB0 OYGfoQnZRScj6jgjMhr/pVu2NAbJkxwP+L8X05rmjDLRd7VC5WJStUfEXdMiXxY7NkfwgyZZn7E 9hCIQwaL8MzAB4O4SToyMHSU1Q0YHpLzDa2Me9Tq9PM5B9KKCNlsejuqo1jETHjslsNy3S1k= X-Google-Smtp-Source: AGHT+IGN0ymspSlj1adZv2o4cYIlgAjhVVoZnt4eImM2+z4+3AO2JGuQPOMQrlG8FXjJkjiKbxwEYw== X-Received: by 2002:a05:6000:2410:b0:3ec:a019:3944 with SMTP id ffacd0b85a97d-4266e8db288mr2637577f8f.43.1759949817855; Wed, 08 Oct 2025 11:56:57 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:3d9:2080:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8e96e0sm31029735f8f.33.2025.10.08.11.56.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Oct 2025 11:56:57 -0700 (PDT) From: Neil Armstrong Date: Wed, 08 Oct 2025 20:56:51 +0200 Subject: [PATCH RFC v2 4/6] arm64: dts: qcom: sm8450-hdk: Enable I2S for HDMI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251008-topic-sm8x50-next-hdk-i2s-v2-4-6b7d38d4ad5e@linaro.org> References: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> In-Reply-To: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3019; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=7XTSD+DcVKhNzFeyRU/magqYZ1NDagGF96Oa/mMURtI=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBo5rP0h3qoC1w/mpnCdDfVslxccXRPm/l+l8E0MoQ7 XNzCMPeJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaOaz9AAKCRB33NvayMhJ0Ya1D/ 9yaZBIXg5qgeYfS2tk2gjyt8jzfkse0r4vXhR160ECEF9JKZcND6lxhebNGfSu2ZfOF0hwYUKeoolf K+d1tcb1x+4h+q7W6/oCLpK6u4MSUEjJn/0R2dSVkras7Qj8NPJDTVYXeNmqeq4HqxlN5rHrYNmw0n DeXvbr4km67vWWp9uN6SRNTKvqmzLj7KwLgTrH/hicl7QS1jwvv3mCne3f7NGc+kWRO730tJTNvYb4 1ST/HDcnxJNJOliX86g+LADg6y4Ls2vdzo6oJFzqzm1ISCVce4ErcwLAD/wKiIXb70J589qaLK0kUn 7JqRus7V1/QAuogpu/3qswPSmjqnEZEEMlokx3UPKhq4/DWfCnzJ0QqC3R0+BZUKOhOZHa6Xq2RcJy 3IQTHZqpv73QSGZt+voHueHpf7ZrknL3MNRbzcveKxu3/DNycALVxbOVJx/HYe5iCPifZeB4Drgn8G yYcwVFxh/yWkL99bwO8MRwhK6zEv5LCR8XKdXgTDKjhf3XLD9Q9AZkGMEeYaoJnDEzEUkw4xU40x68 VldKPL57XRvrXnvXq91oF0+8tqjPlOBquFRnrnqO7wZBtw4iyfTm2qAntWSL7y6i5dwt1NrXY4fS7G 6vlFr8cEbLyJ46U6SidYKaUZYpHBi+Kh4SLAUSN9gaeTI0Oi9xCRYj32isBQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add the necessary nodes to configure the right I2S interface to output audio via the DSI HDMI bridge. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 26 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8450.dtsi | 40 +++++++++++++++++++++++++++++= ++++ 2 files changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/= qcom/sm8450-hdk.dts index 0c6aa7ddf43263f30595b3f0733ec3e126e38608..7b822086a57c600ae9b5668d6d7= a375d0ec55fa7 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -667,6 +667,8 @@ lt9611_codec: hdmi-bridge@2b { pinctrl-names =3D "default"; pinctrl-0 =3D <<9611_irq_pin <9611_rst_pin>; =20 + #sound-dai-cells =3D <1>; + ports { #address-cells =3D <1>; #size-cells =3D <0>; @@ -1016,6 +1018,14 @@ &sound { "TX SWR_INPUT0", "ADC3_OUTPUT", "TX SWR_INPUT1", "ADC4_OUTPUT"; =20 + pinctrl-0 =3D <&i2s0_default_state>, <&audio_mclk0_default_state>; + pinctrl-names =3D "default"; + + clocks =3D <&q6prmcc LPASS_CLK_ID_PRI_MI2S_IBIT LPASS_CLK_ATTRIBUTE_COUPL= E_NO>, + <&q6prmcc LPASS_CLK_ID_MCLK_1 LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "primart-mi2s", + "primary-mclk"; + wcd-playback-dai-link { link-name =3D "WCD Playback"; =20 @@ -1079,6 +1089,22 @@ platform { sound-dai =3D <&q6apm>; }; }; + + prim-mi2s-dai-link { + link-name =3D "HDMI Playback"; + + cpu { + sound-dai =3D <&q6apmbedai PRIMARY_MI2S_RX>; + }; + + codec { + sound-dai =3D <<9611_codec 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; }; =20 &swr0 { diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 23420e6924728cb80fc9e44fb4d7e01fbffae21f..5ddc1169e8c23327261820f7baa= 31983a3eb0bf8 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -4288,6 +4288,46 @@ qup_uart20_default: qup-uart20-default-state { pins =3D "gpio76", "gpio77", "gpio78", "gpio79"; function =3D "qup20"; }; + + audio_mclk0_default_state: audio-mclk0-default-state { + pins =3D "gpio125"; + function =3D "pri_mi2s"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + i2s0_default_state: i2s0-default-state { + sck-pins { + pins =3D "gpio126"; + function =3D "mi2s0_sck"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + data0-pins { + pins =3D "gpio127"; + function =3D "mi2s0_data0"; + drive-strength =3D <8>; + bias-disable; + }; + + data1-pins { + pins =3D "gpio128"; + function =3D "mi2s0_data1"; + drive-strength =3D <8>; + bias-disable; + }; + + ws-pins { + pins =3D "gpio129"; + function =3D "mi2s0_ws"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + }; }; =20 lpass_tlmm: pinctrl@3440000 { --=20 2.34.1 From nobody Mon Dec 8 03:13:18 2025 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 796C42C15AF for ; Wed, 8 Oct 2025 18:57:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949822; cv=none; b=h9WbNAPaFKFI71EpCIn2ldrvTZejDOPKeKMv6uTCO3PEzxzV3nSV92BpA1vjPFmmeOdw7Z+j651vNYtL9BkGdI/XO9ndgTfQkVpB6Kd5Umi5DzrmYjXG599XtsIHe0VHq91Qq76NI9jZJpsgnM/ovtSBGvS3P2OFEi3Pu5Fgs2U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949822; c=relaxed/simple; bh=tvBiI4KGZnSVqvWgipWohnIUVWQ3E10+ZkZngbZnKyM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PCifLR8CBlfqDI0QPVgMBYNuN00gWGxljiivnSRPm6H3zdUuvlgi6iIeWyKLJWSco86a8ubMPYeR9Xrrhr0JNObwCBHRVKv/vTQdr8R81KbAREhBRCsXwCjHHLUFe73YGVO7Pu961Anj3Kc1NdiYJOMgdbrVleNwR+hT/ralo2s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=I5XtIMr6; arc=none smtp.client-ip=209.85.221.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="I5XtIMr6" Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-421851bcb25so125122f8f.2 for ; Wed, 08 Oct 2025 11:57:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1759949819; x=1760554619; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=RAg7jbdZTsaB93akt9iaNf7f80J8J4gg3pMCVwLhH8g=; b=I5XtIMr6621gnuU9Cbz+NWnLkXYqsXUBT8+WI7CJ2gC9URztSxkkEZ4rS+ZPmvDKgy y34E72cGoXTD3skjpVVyU9D/lmXdZzABAG5U6cFc8kehT5IXmm49jneStGcIdbJP+xus JmKTY/1Yc+0ZYQKd9HEu8k1Tn4FmdBfXrITX2eLVvtGpkZ9HVsuLg+TAqk/f6K7Wce1/ L4hrLAdC2W8tsihycHmLDX0aavHC3kkQBYaxMioMNNN9r8oItc8l53vKlD6fwH2o0J0V sS1P5iD7hMqRY+LJ9dB1+WWqovv0mvxBdUQ2KOZDvo7N197mp7C3XxQpwbAm5TlOI20U hpjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759949819; x=1760554619; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RAg7jbdZTsaB93akt9iaNf7f80J8J4gg3pMCVwLhH8g=; b=ds90Hsb+luaqMdfrBFBfuofjmxYwtKMfgXQTzxMUnJLZxM4gqMuBQVce12+ft1k8P2 5GFaXn7KIW3ZT7mIttBwtBbVwzr3nnksLZkg4wYC170wcTE2quSipgzElGtRx6LNixEO terh/d+4mvB7o5mLFQQF/H8t/sQ7je3DjhfSgBXJlDO5tFfiFgMV8VvL+oe7ceUi3bH5 oI6ap0eTHxuBFv/Dz4+c3fKnm5alBSb4hwnIUdecdhfT0dqkbMyLo7b4b4PAdG2cenHm prk25Gk1SrNKwm7g8pTiduXg7WpArgAEewg0B5gcRc9OYMoPp/ctY2sE8W5XdYhXYyIP VAEg== X-Forwarded-Encrypted: i=1; AJvYcCVsRuw/gWifBnEqYlRd4tAAbRSclWm5KcMz+IoQcje5IwNw75Yxeu84n31sm6zs4ARw2jY1kgy/QN1It2w=@vger.kernel.org X-Gm-Message-State: AOJu0YyvJNK+maoAO+wVh8v++fwL48SNucK1aNRwgbYaPHUi8DzIYhxz 18he98Cx2x1zSSkMevdIAVoi4uo3eHu1F4nBgqBgMKPRCBc+KRYRGNweWxzdFgOaKUtYlzEHvYg 3u+Ed X-Gm-Gg: ASbGncuxEwB4z7OBaJ97wDXYF1Ba7QmAVVpsEwDdySOyL1oEfaQr9wBoShwy3wljEuP cwCs8JGFvtQC4g+Xu4cg3YGiY1BmzmhfWrC6Hh7Yp5hAij1UPus3J1x4tfUFd6cKV4DSuwnR9OG 5zs1yvxWa+I5s3fVFo5Ns7fl+Ptvx1HdxsWu+INJYTzt/HXWciYviSPlxnZE0x/4CmkAzT4frQT sOA+DiATeEwpJfBMAlfPQWY8JH7kHkYgrZCjMJjblGjgkL8oNwzhZAYhT+QRMH4LLidTGZI/djz WJgfOP66uy9yaDJl8Fly1ZrRxzJKL4f45K6FXXbnOzcrDj9H2Axu4cIAOIweOj3B57xXB9B95EQ nVORZkyWuMYpbb9L5qufWTZfkfTq4vs3vGglZTh8bkupfIhYu4BMh3+gEP4kIHspkM1Ag/CaF9i jV+BlxMQ== X-Google-Smtp-Source: AGHT+IHwndQ1C2/jkJD2qahEjeWCgmIKvvmNvN1dz35gSiOO9G9p2R3CpqECjJ4wTaRvhf2VmiLc1Q== X-Received: by 2002:a05:6000:3101:b0:3ff:d5c5:6b01 with SMTP id ffacd0b85a97d-4266e7bf0c2mr3077869f8f.19.1759949818600; Wed, 08 Oct 2025 11:56:58 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:3d9:2080:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8e96e0sm31029735f8f.33.2025.10.08.11.56.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Oct 2025 11:56:58 -0700 (PDT) From: Neil Armstrong Date: Wed, 08 Oct 2025 20:56:52 +0200 Subject: [PATCH RFC v2 5/6] arm64: dts: qcom: sm8550-hdk: Enable I2S for HDMI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251008-topic-sm8x50-next-hdk-i2s-v2-5-6b7d38d4ad5e@linaro.org> References: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> In-Reply-To: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3663; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=tvBiI4KGZnSVqvWgipWohnIUVWQ3E10+ZkZngbZnKyM=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBo5rP04q+9CfiVZfIElVyL2ST9o/5uK5RYY5LcMdaa W2IyS5iJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaOaz9AAKCRB33NvayMhJ0Q+wEA CTs8GwBp4IWTA8WOsrDNCjSehm+m7hmdYQmSv17rQenMoHbfORJ/Z8d+Av9FVxIqcJpwMbkgQTgd9D dua8t4ErxhkNccFhpDV0QCKByZiZdfkQoqE7Abt2LQ9dSE+iowZK9oaVszlvof0EDVPxA7MCG9n89n /fGA4rVGfQ05PfgZQU0RERbJOYS0YrEU5QD4O/54W7N/kHT8QMR1TeYj8mBApn0kyyzCi81nWL91WH RQTa4A6aZQhT09ohSoLWd/pP8oCVKDFPrz79gVNZEuwieFYQ6xPNdSHmbQj8C8BNXMeQNt4z6OXYcs L9dnvTp8G7K/yHXQh8EDnx75Iiauj2aGcVRtIXJR9bj0hZ6xZ45kxhEK7XU9EAF0y0vb8p3sYAcRS1 UMZy8iFJK+gFBE5Ia6xdU6ryoXBEkLuAGpp4pF19OL/IfIQfnsAr5EuVBeJjPAmldfOXI7Id72Fy/N rhjCTA7Mqj74fr7sFTx1GYcOW7WGK5AlakShaFG39yS3ZeSB7fzJfFpgYQ/bujOJcKUOiZXRB/dko6 +3OtVEWRmUa8xghlg1duWarUPSXDTCEIeQkE/T2onwwg2s21sYcYLeIBtuaRoy//8bsu2mxtbkfkMX SPEe4EzHQB9hYFl1TLDtYQos3T+PmqhmMB1LYGiOMLHO27gaNCQ4FOLEaprg== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add the necessary nodes to configure the right I2S interface to output audio via the DSI HDMI bridge. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 26 ++++++++++++ arch/arm64/boot/dts/qcom/sm8550.dtsi | 73 +++++++++++++++++++++++++++++= ++++ 2 files changed, 99 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/= qcom/sm8550-hdk.dts index b5d7f0cd443a18b167c94e450b5b9412897b2ba2..7c163344b064a90bfa4f9629e2a= af409cbe81965 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts @@ -215,6 +215,14 @@ sound { "TX SWR_INPUT1", "ADC2_OUTPUT", "TX SWR_INPUT1", "ADC4_OUTPUT"; =20 + pinctrl-0 =3D <&i2s0_default_state>, <&audio_mclk0_default_state>; + pinctrl-names =3D "default"; + + clocks =3D <&q6prmcc LPASS_CLK_ID_PRI_MI2S_IBIT LPASS_CLK_ATTRIBUTE_COUP= LE_NO>, + <&q6prmcc LPASS_CLK_ID_MCLK_1 LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "primary-mi2s", + "primary-mclk"; + wcd-playback-dai-link { link-name =3D "WCD Playback"; =20 @@ -278,6 +286,22 @@ platform { sound-dai =3D <&q6apm>; }; }; + + prim-mi2s-dai-link { + link-name =3D "HDMI Playback"; + + cpu { + sound-dai =3D <&q6apmbedai PRIMARY_MI2S_RX>; + }; + + codec { + sound-dai =3D <<9611_codec 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; }; =20 wcn7850-pmu { @@ -891,6 +915,8 @@ lt9611_codec: hdmi-bridge@2b { pinctrl-0 =3D <<9611_irq_pin>, <<9611_rst_pin>; pinctrl-names =3D "default"; =20 + #sound-dai-cells =3D <1>; + ports { #address-cells =3D <1>; #size-cells =3D <0>; diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 7724dba75db79a9e66a2c61e1ea3607bacfdf5bb..73df93288f6e0ed71ec1e7f5ae0= 9276e7593fd60 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -4956,6 +4956,79 @@ data-pins { drive-strength =3D <10>; }; }; + + audio_mclk0_default_state: audio-mclk0-default-state { + pins =3D "gpio125"; + function =3D "audio_ext_mclk0"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + i2s0_default_state: i2s0-default-state { + sck-pins { + pins =3D "gpio126"; + function =3D "i2s0_sck"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + data0-pins { + pins =3D "gpio127"; + function =3D "i2s0_data0"; + drive-strength =3D <8>; + bias-disable; + }; + + data1-pins { + pins =3D "gpio128"; + function =3D "i2s0_data1"; + drive-strength =3D <8>; + bias-disable; + }; + + ws-pins { + pins =3D "gpio129"; + function =3D "i2s0_ws"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + }; + + audio_mclk1_default_state: audio-mclk1-default-state { + pins =3D "gpio124"; + function =3D "audio_ext_mclk1"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + i2s1_default_state: i2s1-default-state { + sck-pins { + pins =3D "gpio121"; + function =3D "i2s1_sck"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + data0-pins { + pins =3D "gpio122"; + function =3D "i2s1_data0"; + drive-strength =3D <8>; + bias-disable; + }; + + ws-pins { + pins =3D "gpio123"; + function =3D "i2s1_ws"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + }; }; =20 apps_smmu: iommu@15000000 { --=20 2.34.1 From nobody Mon Dec 8 03:13:18 2025 Received: from mail-wr1-f49.google.com (mail-wr1-f49.google.com [209.85.221.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5297E2C21D3 for ; Wed, 8 Oct 2025 18:57:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949823; cv=none; b=NChD9sJv16mj5w9ADKlRBuWuzu6AbqmXCaCbb0XOf/nG3tijGuK7tWVvh1uvEiDTox+auoTiZNTy4g1sReZ3RuGtGktV+X1EGytzXGPUH9my9OndPAUzMHgX/dMJEfdleH0XnVvu7KOcjMxCpqagTBBh9802Jw8dBqJw2dqpiaQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759949823; c=relaxed/simple; bh=VR6dMtQFlUqyXkTOBw7VzCqTi7iU47yIJOHH/q6KrsM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CmxtQNvnBFIrWZ8JoAGlMMqrMz8xYR3STRr4TT5S1IVubWEWzaY5asWMXusDqWra9/LbSgk4HW9jxIgj/q8Rz6lrBjzvU9/Vlfnwo4+svvdYdyMToyUXQtpDZp6tJIijuNtWJEM9VQC3tjT/AILzcJpLSF7X7u0X2Pqp1NMh+e0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ewp6Faod; arc=none smtp.client-ip=209.85.221.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ewp6Faod" Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-3ee15b5435bso142738f8f.0 for ; Wed, 08 Oct 2025 11:57:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1759949819; x=1760554619; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=EOOFxG03P7yB1Cqo1iuCOyE1bExy3dGIUFcsRsyL8QM=; b=ewp6FaodzZTU1dGRIB6KsDoB3mqOEwTIsVR15SAfzV8nU0C2ftTJ6V5QPSovg2/0F/ mhdg0EFmE4/CBJpNcT16VSk0HWqRp09W8hRvX13jm19d5VVNBIXyqqut4xDM1wCyA5Z0 LHPCry0SKZ6YwYsCY+yR5INFzsYmXkZC/opjlJkceWWAVucIadhn/iQeON8GA0xUR3Cs 9ucfwOtVshvc1b0muCx3YEZevS1RkfH9NttYC2YP8NlU1SlMsU6cl+UpTlvx7ZEja3RC KL29GsVFDZns11dP+HTeCY9qVU8/NjgxMNj8wopgJVsT3hl89CTYnoxED2fXAS5pEgkx Q1Cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759949819; x=1760554619; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EOOFxG03P7yB1Cqo1iuCOyE1bExy3dGIUFcsRsyL8QM=; b=bT2ciezbVWsGz4lD6dS6d8di+74x1gNJp4y+Y0G4+zXfGQBOGTGtrdUveMoRzqPG7s XmyG1aCiBYjzp5J+u0Whsx+5xn4ZkXoFKFOc+PLZR5vF+yjdKfPh58pHg0QTw6ElIseE YbT6S5GeejxvFSWhRoPE79bCfGmAn4zCg158s7uDjkXk0dzsJj5aQ1/NGts2SzG4O7lG EKutML0N11MqwbYarYhZe6vINFbMpos3KaA8u1oNbRHaxIMH4wCzHvFhPq9We+MT5m5C lSwJnR+Keo0K4QXkxS14udo2Z8A1e/GUU+TzetVOtAZRxWvXexbdFea5IV7nnl03DkWS R15g== X-Forwarded-Encrypted: i=1; AJvYcCWY5/SKKHd0sL/dE+Vk/NqwcaXtr1jhxynCEC7Z7JykPNBwcoR1Hz3rCi0Dbt7i1qcZjQwBPW134+96y2w=@vger.kernel.org X-Gm-Message-State: AOJu0YwsrL6WlfJxFPmMEikBUn7vJY9ZfKokch2PWpSZ85VJTYdTsuY1 nw9J9+9dWo14QCgKRqUU1DOqDmjsDqZaxvXH5flYXd1KuRtIXnY33q/ZaAxHeVxivvI= X-Gm-Gg: ASbGncsqWRDcnXH5Yj/tRBDu/D3+/qVEnS/2oVDo3NEaP5AF+vkPPVc4F6vpgUG3r4r yWWHpkIBB0w6SB3XnK2+R3MHUjbvDOJkQ1pn0de3/3Am/bZDJe5GWg0ParM+cIQk/LWGCILvWZz W7wPRttLkwLiHZQoHCnSdq91Kd+HV4NJFeNE4dOsr/Ky2US2K86PeSfxYxAmTD+/3cJrAXuPlWq o6d3eSQA8G7X+z9EwSUVEQla5Dt6KaMVB+Mc83nUmdgJGecJ5yqqLPAqw5Y7k+GPUWZANwSv2Tt Rz4jCFxaKtZChmC8rRLJ2us2RmNSYX110vnh4ccuIHXtxsci2ZFGmn2M158Z7L0sW21zwt3UZSJ o+Htr/iAz+V12UVv6plCGqdSZt5zctEeLSsS5dubgzeygH9WyInTT+PaNDq9z6CRMCOeU9PE= X-Google-Smtp-Source: AGHT+IFOkWhGQGiT0dp4ICTg0TkIvfUECbXMM42t3JWFvFwW+rK+Qaq/PoOe/vkJ/UbLJqvfCqQJhw== X-Received: by 2002:a05:6000:2891:b0:3ee:1523:2310 with SMTP id ffacd0b85a97d-4266e7c203emr3004379f8f.27.1759949819408; Wed, 08 Oct 2025 11:56:59 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:3d9:2080:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8e96e0sm31029735f8f.33.2025.10.08.11.56.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Oct 2025 11:56:59 -0700 (PDT) From: Neil Armstrong Date: Wed, 08 Oct 2025 20:56:53 +0200 Subject: [PATCH RFC v2 6/6] arm64: dts: qcom: sm8650-hdk: Enable I2S for HDMI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251008-topic-sm8x50-next-hdk-i2s-v2-6-6b7d38d4ad5e@linaro.org> References: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> In-Reply-To: <20251008-topic-sm8x50-next-hdk-i2s-v2-0-6b7d38d4ad5e@linaro.org> To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3004; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=VR6dMtQFlUqyXkTOBw7VzCqTi7iU47yIJOHH/q6KrsM=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBo5rP1+tIgy4FjsDv+XzF0CRGQkmcxZ19RMb4SDpBX GYRYgOiJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaOaz9QAKCRB33NvayMhJ0ewzD/ 0ejNqlhTL6mP2lJTJALO8t+ttwRC9ygs5IKzlWocOuwtxD3qj26o0S/KLmJ/7vYKuuwzWwDegMog0V SwXf/KsNjP97GTbNK0BBwP0toC5HMve61/Vq/W5clhMszjSCZ56G8L+M2/Q2hfOOwCuWOTaDEHit2S r15aNEVLiJcyijq3Rl1gNhTrI3l3eLOeZhmshgIf5AaRjy41b2rv7cRTd/dpgNWum62gW6Bs2gDpsJ j/GRVecN2XKlapFntnGu9GONhjoRIt4r1B+iiH3RmsRXqn0JfzXkyc5Rz/RxQbLWBcJSxrMuztbxuL KbVhDt61kzy9MFlTZPCCx9sAVQdeWNGVC3jzWIR1hhErRGZYDfo2ZQNXGUBwOPXkj4w/MzAKPvEhOf Uc2b0zzMnsbLpJIFx0LUgxaX3Sh95UWhhKTWEOJ0Po+21oRaQHuSGfax59wOfkgVcpF5gkwuwSYTjD cLKlj8rCklMkFdFfDiYv8imwEWUkRMlvmoG68/UaVyofMzEGqJ5BBcmfVPpoC/7FrU1QPJ1q29yEL+ WS8y33WiAJC6KJJFimF4ab79rnk3Ghj1EnVp5iJu5TaTdtWFMx8+hviX17i3QRrBckgm7af5qAHGVw 5EN/W1QZgbaw+i9lx7/UnfvoDgxQnNxZ41f6FNzDqxKpEMamwhSIHe+cczEw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add the necessary nodes to configure the right I2S interface to output audio via the DSI HDMI bridge. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 25 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8650.dtsi | 40 +++++++++++++++++++++++++++++= ++++ 2 files changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/= qcom/sm8650-hdk.dts index 87d7190dc991b11f5d1162aabb693dcadd198c51..e15c65a97852f2e27d1c1d28294= 5feeddec20f6f 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts @@ -171,6 +171,14 @@ sound { "TX SWR_INPUT1", "ADC2_OUTPUT", "TX SWR_INPUT3", "ADC4_OUTPUT"; =20 + pinctrl-0 =3D <&i2s0_default_state>, <&audio_mclk0_default_state>; + pinctrl-names =3D "default"; + + clocks =3D <&q6prmcc LPASS_CLK_ID_PRI_MI2S_IBIT LPASS_CLK_ATTRIBUTE_COUP= LE_NO>, + <&q6prmcc LPASS_CLK_ID_MCLK_1 LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "primary-mi2s", + "primary-mclk"; + wcd-playback-dai-link { link-name =3D "WCD Playback"; =20 @@ -218,6 +226,22 @@ platform { sound-dai =3D <&q6apm>; }; }; + + pri-mi2s-dai-link { + link-name =3D "HDMI Playback"; + + cpu { + sound-dai =3D <&q6apmbedai PRIMARY_MI2S_RX>; + }; + + codec { + sound-dai =3D <<9611_codec 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; }; =20 vph_pwr: regulator-vph-pwr { @@ -853,6 +877,7 @@ &i2c6 { lt9611_codec: hdmi-bridge@2b { compatible =3D "lontium,lt9611uxc"; reg =3D <0x2b>; + #sound-dai-cells =3D <1>; =20 interrupts-extended =3D <&tlmm 85 IRQ_TYPE_EDGE_FALLING>; =20 diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qco= m/sm8650.dtsi index ebf1971b1bfbebf4df5a80247a6682ac8e413e3b..7cf5073a29ed4aaf72662a4e05b= a1c6bfb118a3f 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -6203,6 +6203,46 @@ wake-pins { }; }; =20 + audio_mclk0_default_state: audio-mclk0-default-state { + pins =3D "gpio125"; + function =3D "audio_ext_mclk0"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + i2s0_default_state: i2s0-default-state { + sck-pins { + pins =3D "gpio126"; + function =3D "i2s0_sck"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + data0-pins { + pins =3D "gpio127"; + function =3D "i2s0_data0"; + drive-strength =3D <8>; + bias-disable; + }; + + data1-pins { + pins =3D "gpio128"; + function =3D "i2s0_data1"; + drive-strength =3D <8>; + bias-disable; + }; + + ws-pins { + pins =3D "gpio129"; + function =3D "i2s0_ws"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + }; + qup_i2c0_data_clk: qup-i2c0-data-clk-state { /* SDA, SCL */ pins =3D "gpio32", "gpio33"; --=20 2.34.1