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[2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-58b0119f461sm6751107e87.107.2025.10.07.21.33.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 21:33:15 -0700 (PDT) From: Dmitry Baryshkov Date: Wed, 08 Oct 2025 07:33:01 +0300 Subject: [PATCH 3/8] media: iris: stop copying r/o data Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251008-iris-sc7280-v1-3-def050ba5e1f@oss.qualcomm.com> References: <20251008-iris-sc7280-v1-0-def050ba5e1f@oss.qualcomm.com> In-Reply-To: <20251008-iris-sc7280-v1-0-def050ba5e1f@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=30662; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=13yHIjLh29KGfZ+Ofsn3MMCLFzteITvD2BK3DooJbi4=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ8bTl02Hq1deLUk17IpXD/P6FfPiSl55ceeeE406i2olW ZwFL6R2MhqzMDByMciKKbL4FLRMjdmUHPZhx9R6mEGsTCBTGLg4BWAiTRLs/xMiOgXONXm81HjR u4clrGCuMvO2qbGvr3XsFOe9aGDpcNfOlieCtUlwRUX4HbHDhY+EXX7+KMzc3BG2N8aHRY1jZxb P7Sbd2Nwdk3XvqG2Q/+rEc8b6YFll762ghaf/r1uYJZp7ai6T+fYHi31ZV9b+nfNGnTPts8KTV/ X1bbZ/hGPUin7/X3U6Ytq+SQd8uOcu+vHUq3zVtnUCl17FM56OntwckPTu39+7un85P0W9FIz7V SA+SZUz/EGlTJZOjcGjzvDHnheuGbi+engjhLGa5e761D8JHxPuluXZlt3VnxUbzHFa8mkMP98E l570yLYGg654eeNC12XLIlvX/zbeY75oo2GChL7ixmcqAA== X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: V4lMrxvGjJfwcFlr2z0r7041swWKQbni X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA0MDAyNyBTYWx0ZWRfX7ANUE2Fe4Ahp m3ZNsBddBd6qqW4/kecNCvcf/AN8/+1yDQKe9bFpeaTrhgVKTbp3sZ1hWaBAIu1JQbmEZHbJfvZ s6phdzUgzIYfMMBIa1fBDXc/l8Zhkno+FNxpoksr8vMk3uMqe4ahHLO3EXblhV7xiyRpZQJsM1b 26MYzTYaQdbgiBMf7eTDh6gI54F5ehqkkukAAMvtMGw8B65TlmQiP976ltv/gsXuiHOEcMCFJwF mvLweLkq414yFjBOA1OwTQiG2oQxO7YUzYq2t7y5/0ppOhsWHYe43BH7+6w27JpUoKtkHIaat7Q v77lLaC5HPv90W2kj6X9EFoN8JrCwymEhMRxFkqKU9TfqmzMlCdOj0BB0kf6jwAjYZM5FiDCMNO zcqqtzROo4opGwHlTnqGYJqMqERTUQ== X-Authority-Analysis: v=2.4 cv=Vqcuwu2n c=1 sm=1 tr=0 ts=68e5e990 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=EUspDBNiAAAA:8 a=U-_e3lbwN0bxlbdfrR0A:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-ORIG-GUID: V4lMrxvGjJfwcFlr2z0r7041swWKQbni X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-07_02,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 malwarescore=0 spamscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 clxscore=1015 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2510040027 Most of the platform_inst_caps data is read-only. In order to lower the amount of memory consumed by the driver, store the value and the corresponding indice in the read-write data and use the rest via the pointer to r/o capability data. Signed-off-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_core.h | 4 +- drivers/media/platform/qcom/iris/iris_ctrls.c | 238 ++++++++++-------= ---- drivers/media/platform/qcom/iris/iris_instance.h | 3 +- .../platform/qcom/iris/iris_platform_common.h | 8 +- drivers/media/platform/qcom/iris/iris_vdec.c | 5 +- drivers/media/platform/qcom/iris/iris_venc.c | 5 +- 6 files changed, 135 insertions(+), 128 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_core.h b/drivers/media/p= latform/qcom/iris/iris_core.h index fb194c967ad4f9b5e00cd74f0d41e0b827ef14db..b5037ae8c71921753c165a86a27= 7a4a4b5083b30 100644 --- a/drivers/media/platform/qcom/iris/iris_core.h +++ b/drivers/media/platform/qcom/iris/iris_core.h @@ -115,8 +115,8 @@ struct iris_core { struct delayed_work sys_error_handler; struct list_head instances; /* encoder and decoder have overlapping caps, so two different arrays are= required */ - struct platform_inst_fw_cap inst_fw_caps_dec[INST_FW_CAP_MAX]; - struct platform_inst_fw_cap inst_fw_caps_enc[INST_FW_CAP_MAX]; + struct platform_inst_fw_cap_value inst_fw_caps_dec[INST_FW_CAP_MAX]; + struct platform_inst_fw_cap_value inst_fw_caps_enc[INST_FW_CAP_MAX]; }; =20 int iris_core_init(struct iris_core *core); diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index 9da050aa1f7ce8152dfa46a706e2c27adfb5d6ce..0e9adb3982a49cfd7cbe5110cfd= 5f573f0f7bb38 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -194,26 +194,28 @@ static int iris_op_s_ctrl(struct v4l2_ctrl *ctrl) { struct iris_inst *inst =3D container_of(ctrl->handler, struct iris_inst, = ctrl_handler); enum platform_inst_fw_cap_type cap_id; - struct platform_inst_fw_cap *cap; + unsigned int cap_idx; struct vb2_queue *q; =20 - cap =3D &inst->fw_caps[0]; cap_id =3D iris_get_cap_id(ctrl->id); if (!iris_valid_cap_id(cap_id)) return -EINVAL; =20 + cap_idx =3D inst->fw_caps[cap_id].idx; + q =3D v4l2_m2m_get_src_vq(inst->m2m_ctx); if (vb2_is_streaming(q) && - (!(inst->fw_caps[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED))) + (!(inst->inst_fw_caps[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED))) return -EINVAL; =20 - cap[cap_id].flags |=3D CAP_FLAG_CLIENT_SET; + inst->fw_caps[cap_id].client_set =3D true; =20 inst->fw_caps[cap_id].value =3D ctrl->val; =20 if (vb2_is_streaming(q)) { - if (cap[cap_id].set) - cap[cap_id].set(inst, cap_id); + + if (inst->inst_fw_caps[cap_idx].set) + inst->inst_fw_caps[cap_idx].set(inst, cap_id); } =20 return 0; @@ -225,13 +227,14 @@ static const struct v4l2_ctrl_ops iris_ctrl_ops =3D { =20 int iris_ctrls_init(struct iris_inst *inst) { - struct platform_inst_fw_cap *cap =3D &inst->fw_caps[0]; u32 num_ctrls =3D 0, ctrl_idx =3D 0, idx =3D 0; u32 v4l2_id; int ret; =20 for (idx =3D 1; idx < INST_FW_CAP_MAX; idx++) { - if (iris_get_v4l2_id(cap[idx].cap_id)) + unsigned int cap_idx =3D inst->fw_caps[idx].idx; + + if (iris_get_v4l2_id(inst->inst_fw_caps[cap_idx].cap_id)) num_ctrls++; } =20 @@ -245,9 +248,11 @@ int iris_ctrls_init(struct iris_inst *inst) return ret; =20 for (idx =3D 1; idx < INST_FW_CAP_MAX; idx++) { + unsigned int cap_idx =3D inst->fw_caps[idx].idx; + const struct platform_inst_fw_cap *cap =3D &inst->inst_fw_caps[cap_idx]; struct v4l2_ctrl *ctrl; =20 - v4l2_id =3D iris_get_v4l2_id(cap[idx].cap_id); + v4l2_id =3D iris_get_v4l2_id(cap->cap_id); if (!v4l2_id) continue; =20 @@ -256,21 +261,21 @@ int iris_ctrls_init(struct iris_inst *inst) goto error; } =20 - if (cap[idx].flags & CAP_FLAG_MENU) { + if (inst->inst_fw_caps[cap_idx].flags & CAP_FLAG_MENU) { ctrl =3D v4l2_ctrl_new_std_menu(&inst->ctrl_handler, &iris_ctrl_ops, v4l2_id, - cap[idx].max, - ~(cap[idx].step_or_mask), - cap[idx].value); + cap[cap_idx].max, + ~(cap[cap_idx].step_or_mask), + inst->fw_caps[idx].value); } else { ctrl =3D v4l2_ctrl_new_std(&inst->ctrl_handler, &iris_ctrl_ops, v4l2_id, - cap[idx].min, - cap[idx].max, - cap[idx].step_or_mask, - cap[idx].value); + cap[cap_idx].min, + cap[cap_idx].max, + cap[cap_idx].step_or_mask, + inst->fw_caps[idx].value); } if (!ctrl) { ret =3D -EINVAL; @@ -312,14 +317,8 @@ void iris_session_init_caps(struct iris_core *core) if (!iris_valid_cap_id(cap_id)) continue; =20 - core->inst_fw_caps_dec[cap_id].cap_id =3D caps[i].cap_id; - core->inst_fw_caps_dec[cap_id].min =3D caps[i].min; - core->inst_fw_caps_dec[cap_id].max =3D caps[i].max; - core->inst_fw_caps_dec[cap_id].step_or_mask =3D caps[i].step_or_mask; + core->inst_fw_caps_dec[cap_id].idx =3D i; core->inst_fw_caps_dec[cap_id].value =3D caps[i].value; - core->inst_fw_caps_dec[cap_id].flags =3D caps[i].flags; - core->inst_fw_caps_dec[cap_id].hfi_id =3D caps[i].hfi_id; - core->inst_fw_caps_dec[cap_id].set =3D caps[i].set; } =20 caps =3D core->iris_platform_data->inst_fw_caps_enc; @@ -330,29 +329,23 @@ void iris_session_init_caps(struct iris_core *core) if (!iris_valid_cap_id(cap_id)) continue; =20 - core->inst_fw_caps_enc[cap_id].cap_id =3D caps[i].cap_id; - core->inst_fw_caps_enc[cap_id].min =3D caps[i].min; - core->inst_fw_caps_enc[cap_id].max =3D caps[i].max; - core->inst_fw_caps_enc[cap_id].step_or_mask =3D caps[i].step_or_mask; + core->inst_fw_caps_enc[cap_id].idx =3D i; core->inst_fw_caps_enc[cap_id].value =3D caps[i].value; - core->inst_fw_caps_enc[cap_id].flags =3D caps[i].flags; - core->inst_fw_caps_enc[cap_id].hfi_id =3D caps[i].hfi_id; - core->inst_fw_caps_enc[cap_id].set =3D caps[i].set; } } =20 static u32 iris_get_port_info(struct iris_inst *inst, - enum platform_inst_fw_cap_type cap_id) + unsigned int cap_idx) { if (inst->domain =3D=3D DECODER) { - if (inst->fw_caps[cap_id].flags & CAP_FLAG_INPUT_PORT) + if (inst->inst_fw_caps[cap_idx].flags & CAP_FLAG_INPUT_PORT) return HFI_PORT_BITSTREAM; - else if (inst->fw_caps[cap_id].flags & CAP_FLAG_OUTPUT_PORT) + else if (inst->inst_fw_caps[cap_idx].flags & CAP_FLAG_OUTPUT_PORT) return HFI_PORT_RAW; } else { - if (inst->fw_caps[cap_id].flags & CAP_FLAG_INPUT_PORT) + if (inst->inst_fw_caps[cap_idx].flags & CAP_FLAG_INPUT_PORT) return HFI_PORT_RAW; - else if (inst->fw_caps[cap_id].flags & CAP_FLAG_OUTPUT_PORT) + else if (inst->inst_fw_caps[cap_idx].flags & CAP_FLAG_OUTPUT_PORT) return HFI_PORT_BITSTREAM; } =20 @@ -362,12 +355,13 @@ static u32 iris_get_port_info(struct iris_inst *inst, int iris_set_u32_enum(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; u32 hfi_value =3D inst->fw_caps[cap_id].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32)); } @@ -375,12 +369,13 @@ int iris_set_u32_enum(struct iris_inst *inst, enum pl= atform_inst_fw_cap_type cap int iris_set_u32(struct iris_inst *inst, enum platform_inst_fw_cap_type ca= p_id) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; u32 hfi_value =3D inst->fw_caps[cap_id].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32, &hfi_value, sizeof(u32)); } @@ -389,7 +384,8 @@ int iris_set_stage(struct iris_inst *inst, enum platfor= m_inst_fw_cap_type cap_id { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; struct v4l2_format *inp_f =3D inst->fmt_src; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 height =3D inp_f->fmt.pix_mp.height; u32 width =3D inp_f->fmt.pix_mp.width; u32 work_mode =3D STAGE_2; @@ -401,7 +397,7 @@ int iris_set_stage(struct iris_inst *inst, enum platfor= m_inst_fw_cap_type cap_id =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32, &work_mode, sizeof(u32)); } @@ -409,12 +405,13 @@ int iris_set_stage(struct iris_inst *inst, enum platf= orm_inst_fw_cap_type cap_id int iris_set_pipe(struct iris_inst *inst, enum platform_inst_fw_cap_type c= ap_id) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 work_route =3D inst->fw_caps[PIPE].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32, &work_route, sizeof(u32)); } @@ -422,19 +419,13 @@ int iris_set_pipe(struct iris_inst *inst, enum platfo= rm_inst_fw_cap_type cap_id) int iris_set_profile(struct iris_inst *inst, enum platform_inst_fw_cap_typ= e cap_id) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; - u32 hfi_id, hfi_value; - - if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { - hfi_id =3D inst->fw_caps[PROFILE_H264].hfi_id; - hfi_value =3D inst->fw_caps[PROFILE_H264].value; - } else { - hfi_id =3D inst->fw_caps[PROFILE_HEVC].hfi_id; - hfi_value =3D inst->fw_caps[PROFILE_HEVC].value; - } + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; + u32 hfi_value =3D inst->fw_caps[cap_id].value; =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32)); } @@ -442,19 +433,13 @@ int iris_set_profile(struct iris_inst *inst, enum pla= tform_inst_fw_cap_type cap_ int iris_set_level(struct iris_inst *inst, enum platform_inst_fw_cap_type = cap_id) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; - u32 hfi_id, hfi_value; - - if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { - hfi_id =3D inst->fw_caps[LEVEL_H264].hfi_id; - hfi_value =3D inst->fw_caps[LEVEL_H264].value; - } else { - hfi_id =3D inst->fw_caps[LEVEL_HEVC].hfi_id; - hfi_value =3D inst->fw_caps[LEVEL_HEVC].value; - } + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; + u32 hfi_value =3D inst->fw_caps[cap_id].value; =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32)); } @@ -462,20 +447,19 @@ int iris_set_level(struct iris_inst *inst, enum platf= orm_inst_fw_cap_type cap_id int iris_set_profile_level_gen1(struct iris_inst *inst, enum platform_inst= _fw_cap_type cap_id) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; struct hfi_profile_level pl; =20 - if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { - pl.profile =3D inst->fw_caps[PROFILE_H264].value; + pl.profile =3D inst->fw_caps[cap_id].value; + if (inst->codec =3D=3D V4L2_PIX_FMT_H264) pl.level =3D inst->fw_caps[LEVEL_H264].value; - } else { - pl.profile =3D inst->fw_caps[PROFILE_HEVC].value; + else pl.level =3D inst->fw_caps[LEVEL_HEVC].value; - } =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32_ENUM, &pl, sizeof(u32)); } @@ -484,7 +468,8 @@ int iris_set_header_mode_gen1(struct iris_inst *inst, e= num platform_inst_fw_cap_ { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; u32 header_mode =3D inst->fw_caps[cap_id].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 hfi_val; =20 if (header_mode =3D=3D V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) @@ -494,7 +479,7 @@ int iris_set_header_mode_gen1(struct iris_inst *inst, e= num platform_inst_fw_cap_ =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32, &hfi_val, sizeof(u32)); } @@ -504,7 +489,8 @@ int iris_set_header_mode_gen2(struct iris_inst *inst, e= num platform_inst_fw_cap_ const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; u32 prepend_sps_pps =3D inst->fw_caps[PREPEND_SPSPPS_TO_IDR].value; u32 header_mode =3D inst->fw_caps[cap_id].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 hfi_val; =20 if (prepend_sps_pps) @@ -516,7 +502,7 @@ int iris_set_header_mode_gen2(struct iris_inst *inst, e= num platform_inst_fw_cap_ =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32_ENUM, &hfi_val, sizeof(u32)); } @@ -526,7 +512,8 @@ int iris_set_bitrate(struct iris_inst *inst, enum platf= orm_inst_fw_cap_type cap_ const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; u32 entropy_mode =3D inst->fw_caps[ENTROPY_MODE].value; u32 bitrate =3D inst->fw_caps[cap_id].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 max_bitrate; =20 if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) @@ -541,7 +528,7 @@ int iris_set_bitrate(struct iris_inst *inst, enum platf= orm_inst_fw_cap_type cap_ =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32, &bitrate, sizeof(u32)); } @@ -552,12 +539,13 @@ int iris_set_peak_bitrate(struct iris_inst *inst, enu= m platform_inst_fw_cap_type u32 rc_mode =3D inst->fw_caps[BITRATE_MODE].value; u32 peak_bitrate =3D inst->fw_caps[cap_id].value; u32 bitrate =3D inst->fw_caps[BITRATE].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; =20 if (rc_mode !=3D V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) return 0; =20 - if (inst->fw_caps[cap_id].flags & CAP_FLAG_CLIENT_SET) { + if (inst->fw_caps[cap_id].client_set) { if (peak_bitrate < bitrate) peak_bitrate =3D bitrate; } else { @@ -568,7 +556,7 @@ int iris_set_peak_bitrate(struct iris_inst *inst, enum = platform_inst_fw_cap_type =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32, &peak_bitrate, sizeof(u32)); } @@ -579,7 +567,8 @@ int iris_set_bitrate_mode_gen1(struct iris_inst *inst, = enum platform_inst_fw_cap u32 bitrate_mode =3D inst->fw_caps[BITRATE_MODE].value; u32 frame_rc =3D inst->fw_caps[FRAME_RC_ENABLE].value; u32 frame_skip =3D inst->fw_caps[FRAME_SKIP_MODE].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 rc_mode =3D 0; =20 if (!frame_rc) @@ -595,7 +584,7 @@ int iris_set_bitrate_mode_gen1(struct iris_inst *inst, = enum platform_inst_fw_cap =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32_ENUM, &rc_mode, sizeof(u32)); } @@ -606,7 +595,8 @@ int iris_set_bitrate_mode_gen2(struct iris_inst *inst, = enum platform_inst_fw_cap u32 bitrate_mode =3D inst->fw_caps[BITRATE_MODE].value; u32 frame_rc =3D inst->fw_caps[FRAME_RC_ENABLE].value; u32 frame_skip =3D inst->fw_caps[FRAME_SKIP_MODE].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 rc_mode =3D 0; =20 if (!frame_rc) @@ -622,7 +612,7 @@ int iris_set_bitrate_mode_gen2(struct iris_inst *inst, = enum platform_inst_fw_cap =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32_ENUM, &rc_mode, sizeof(u32)); } @@ -631,7 +621,8 @@ int iris_set_entropy_mode_gen1(struct iris_inst *inst, = enum platform_inst_fw_cap { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; u32 entropy_mode =3D inst->fw_caps[cap_id].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 hfi_val; =20 if (inst->codec !=3D V4L2_PIX_FMT_H264) @@ -642,7 +633,7 @@ int iris_set_entropy_mode_gen1(struct iris_inst *inst, = enum platform_inst_fw_cap =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32, &hfi_val, sizeof(u32)); } @@ -651,7 +642,8 @@ int iris_set_entropy_mode_gen2(struct iris_inst *inst, = enum platform_inst_fw_cap { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; u32 entropy_mode =3D inst->fw_caps[cap_id].value; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 profile; =20 if (inst->codec !=3D V4L2_PIX_FMT_H264) @@ -667,7 +659,7 @@ int iris_set_entropy_mode_gen2(struct iris_inst *inst, = enum platform_inst_fw_cap =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_U32, &entropy_mode, sizeof(u32)); } @@ -678,32 +670,33 @@ int iris_set_min_qp(struct iris_inst *inst, enum plat= form_inst_fw_cap_type cap_i u32 i_qp_enable =3D 0, p_qp_enable =3D 0, b_qp_enable =3D 0; u32 i_frame_qp =3D 0, p_frame_qp =3D 0, b_frame_qp =3D 0; u32 min_qp_enable =3D 0, client_qp_enable =3D 0; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 hfi_val; =20 if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { - if (inst->fw_caps[MIN_FRAME_QP_H264].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[MIN_FRAME_QP_H264].client_set) min_qp_enable =3D 1; if (min_qp_enable || - (inst->fw_caps[I_FRAME_MIN_QP_H264].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[I_FRAME_MIN_QP_H264].client_set)) i_qp_enable =3D 1; if (min_qp_enable || - (inst->fw_caps[P_FRAME_MIN_QP_H264].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[P_FRAME_MIN_QP_H264].client_set)) p_qp_enable =3D 1; if (min_qp_enable || - (inst->fw_caps[B_FRAME_MIN_QP_H264].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[B_FRAME_MIN_QP_H264].client_set)) b_qp_enable =3D 1; } else { - if (inst->fw_caps[MIN_FRAME_QP_HEVC].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[MIN_FRAME_QP_HEVC].client_set) min_qp_enable =3D 1; if (min_qp_enable || - (inst->fw_caps[I_FRAME_MIN_QP_HEVC].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[I_FRAME_MIN_QP_HEVC].client_set)) i_qp_enable =3D 1; if (min_qp_enable || - (inst->fw_caps[P_FRAME_MIN_QP_HEVC].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[P_FRAME_MIN_QP_HEVC].client_set)) p_qp_enable =3D 1; if (min_qp_enable || - (inst->fw_caps[B_FRAME_MIN_QP_HEVC].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[B_FRAME_MIN_QP_HEVC].client_set)) b_qp_enable =3D 1; } =20 @@ -731,7 +724,7 @@ int iris_set_min_qp(struct iris_inst *inst, enum platfo= rm_inst_fw_cap_type cap_i =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_32_PACKED, &hfi_val, sizeof(u32)); } @@ -742,32 +735,33 @@ int iris_set_max_qp(struct iris_inst *inst, enum plat= form_inst_fw_cap_type cap_i u32 i_qp_enable =3D 0, p_qp_enable =3D 0, b_qp_enable =3D 0; u32 max_qp_enable =3D 0, client_qp_enable; u32 i_frame_qp, p_frame_qp, b_frame_qp; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; u32 hfi_val; =20 if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { - if (inst->fw_caps[MAX_FRAME_QP_H264].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[MAX_FRAME_QP_H264].client_set) max_qp_enable =3D 1; if (max_qp_enable || - (inst->fw_caps[I_FRAME_MAX_QP_H264].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[I_FRAME_MAX_QP_H264].client_set)) i_qp_enable =3D 1; if (max_qp_enable || - (inst->fw_caps[P_FRAME_MAX_QP_H264].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[P_FRAME_MAX_QP_H264].client_set)) p_qp_enable =3D 1; if (max_qp_enable || - (inst->fw_caps[B_FRAME_MAX_QP_H264].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[B_FRAME_MAX_QP_H264].client_set)) b_qp_enable =3D 1; } else { - if (inst->fw_caps[MAX_FRAME_QP_HEVC].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[MAX_FRAME_QP_HEVC].client_set) max_qp_enable =3D 1; if (max_qp_enable || - (inst->fw_caps[I_FRAME_MAX_QP_HEVC].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[I_FRAME_MAX_QP_HEVC].client_set)) i_qp_enable =3D 1; if (max_qp_enable || - (inst->fw_caps[P_FRAME_MAX_QP_HEVC].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[P_FRAME_MAX_QP_HEVC].client_set)) p_qp_enable =3D 1; if (max_qp_enable || - (inst->fw_caps[B_FRAME_MAX_QP_HEVC].flags & CAP_FLAG_CLIENT_SET)) + (inst->fw_caps[B_FRAME_MAX_QP_HEVC].client_set)) b_qp_enable =3D 1; } =20 @@ -796,7 +790,7 @@ int iris_set_max_qp(struct iris_inst *inst, enum platfo= rm_inst_fw_cap_type cap_i =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_32_PACKED, &hfi_val, sizeof(u32)); } @@ -806,7 +800,8 @@ int iris_set_frame_qp(struct iris_inst *inst, enum plat= form_inst_fw_cap_type cap const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; u32 i_qp_enable =3D 0, p_qp_enable =3D 0, b_qp_enable =3D 0, client_qp_en= able; u32 i_frame_qp, p_frame_qp, b_frame_qp; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; struct vb2_queue *q; u32 hfi_val; =20 @@ -822,18 +817,18 @@ int iris_set_frame_qp(struct iris_inst *inst, enum pl= atform_inst_fw_cap_type cap b_qp_enable =3D 1; } else { if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { - if (inst->fw_caps[I_FRAME_QP_H264].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[I_FRAME_QP_H264].client_set) i_qp_enable =3D 1; - if (inst->fw_caps[P_FRAME_QP_H264].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[P_FRAME_QP_H264].client_set) p_qp_enable =3D 1; - if (inst->fw_caps[B_FRAME_QP_H264].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[B_FRAME_QP_H264].client_set) b_qp_enable =3D 1; } else { - if (inst->fw_caps[I_FRAME_QP_HEVC].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[I_FRAME_QP_HEVC].client_set) i_qp_enable =3D 1; - if (inst->fw_caps[P_FRAME_QP_HEVC].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[P_FRAME_QP_HEVC].client_set) p_qp_enable =3D 1; - if (inst->fw_caps[B_FRAME_QP_HEVC].flags & CAP_FLAG_CLIENT_SET) + if (inst->fw_caps[B_FRAME_QP_HEVC].client_set) b_qp_enable =3D 1; } } @@ -857,7 +852,7 @@ int iris_set_frame_qp(struct iris_inst *inst, enum plat= form_inst_fw_cap_type cap =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_32_PACKED, &hfi_val, sizeof(u32)); } @@ -866,7 +861,8 @@ int iris_set_qp_range(struct iris_inst *inst, enum plat= form_inst_fw_cap_type cap { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; struct hfi_quantization_range_v2 range; - u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + unsigned int cap_idx =3D inst->fw_caps[cap_id].idx; + u32 hfi_id =3D inst->inst_fw_caps[cap_idx].hfi_id; =20 if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) { range.min_qp.qp_packed =3D inst->fw_caps[MIN_FRAME_QP_HEVC].value; @@ -878,7 +874,7 @@ int iris_set_qp_range(struct iris_inst *inst, enum plat= form_inst_fw_cap_type cap =20 return hfi_ops->session_set_property(inst, hfi_id, HFI_HOST_FLAGS_NONE, - iris_get_port_info(inst, cap_id), + iris_get_port_info(inst, cap_idx), HFI_PAYLOAD_32_PACKED, &range, sizeof(range)); } @@ -886,7 +882,7 @@ int iris_set_qp_range(struct iris_inst *inst, enum plat= form_inst_fw_cap_type cap int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; - struct platform_inst_fw_cap *cap; + const struct platform_inst_fw_cap *cap; int ret; u32 i; =20 @@ -895,7 +891,9 @@ int iris_set_properties(struct iris_inst *inst, u32 pla= ne) return ret; =20 for (i =3D 1; i < INST_FW_CAP_MAX; i++) { - cap =3D &inst->fw_caps[i]; + unsigned int cap_idx =3D inst->fw_caps[i].idx; + + cap =3D &inst->inst_fw_caps[cap_idx]; if (!iris_valid_cap_id(cap->cap_id)) continue; =20 diff --git a/drivers/media/platform/qcom/iris/iris_instance.h b/drivers/med= ia/platform/qcom/iris/iris_instance.h index 5982d7adefeab80905478b32cddba7bd4651a691..39d74bef4d188abb919c372b752= 9d1d0773bd96a 100644 --- a/drivers/media/platform/qcom/iris/iris_instance.h +++ b/drivers/media/platform/qcom/iris/iris_instance.h @@ -82,7 +82,8 @@ struct iris_inst { struct completion completion; struct completion flush_completion; u32 flush_responses_pending; - struct platform_inst_fw_cap fw_caps[INST_FW_CAP_MAX]; + struct platform_inst_fw_cap_value fw_caps[INST_FW_CAP_MAX]; + const struct platform_inst_fw_cap *inst_fw_caps; struct iris_buffers buffers[BUF_TYPE_MAX]; u32 fw_min_count; enum iris_inst_state state; diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 5ffc1874e8c6362b1c650e912c230e9c4e3bd160..104ff38219e30e6d52476d44b54= 338c55ef2ca7b 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -148,7 +148,7 @@ enum platform_inst_fw_cap_flags { CAP_FLAG_MENU =3D BIT(1), CAP_FLAG_INPUT_PORT =3D BIT(2), CAP_FLAG_OUTPUT_PORT =3D BIT(3), - CAP_FLAG_CLIENT_SET =3D BIT(4), + // BIT(4) CAP_FLAG_BITMASK =3D BIT(5), CAP_FLAG_VOLATILE =3D BIT(6), }; @@ -165,6 +165,12 @@ struct platform_inst_fw_cap { enum platform_inst_fw_cap_type cap_id); }; =20 +struct platform_inst_fw_cap_value { + unsigned int idx; + s64 value; + bool client_set; +}; + struct bw_info { u32 mbs_per_sec; u32 bw_ddr; diff --git a/drivers/media/platform/qcom/iris/iris_vdec.c b/drivers/media/p= latform/qcom/iris/iris_vdec.c index ae13c3e1b426bfd81a7b46dc6c3ff5eb5c4860cb..72559497e81c30373711e9b1135= 82039f1fb5153 100644 --- a/drivers/media/platform/qcom/iris/iris_vdec.c +++ b/drivers/media/platform/qcom/iris/iris_vdec.c @@ -55,8 +55,9 @@ int iris_vdec_inst_init(struct iris_inst *inst) inst->buffers[BUF_OUTPUT].min_count =3D iris_vpu_buf_count(inst, BUF_OUTP= UT); inst->buffers[BUF_OUTPUT].size =3D f->fmt.pix_mp.plane_fmt[0].sizeimage; =20 - memcpy(&inst->fw_caps[0], &core->inst_fw_caps_dec[0], - INST_FW_CAP_MAX * sizeof(struct platform_inst_fw_cap)); + memcpy(inst->fw_caps, core->inst_fw_caps_dec, + sizeof(inst->fw_caps)); + inst->inst_fw_caps =3D core->iris_platform_data->inst_fw_caps_dec; =20 return iris_ctrls_init(inst); } diff --git a/drivers/media/platform/qcom/iris/iris_venc.c b/drivers/media/p= latform/qcom/iris/iris_venc.c index 099bd5ed4ae0294725860305254c4cad1ec88d7e..3d1d481f8048305ef9a9bf0cb43= 5ebca68563105 100644 --- a/drivers/media/platform/qcom/iris/iris_venc.c +++ b/drivers/media/platform/qcom/iris/iris_venc.c @@ -68,8 +68,9 @@ int iris_venc_inst_init(struct iris_inst *inst) inst->operating_rate =3D DEFAULT_FPS; inst->frame_rate =3D DEFAULT_FPS; =20 - memcpy(&inst->fw_caps[0], &core->inst_fw_caps_enc[0], - INST_FW_CAP_MAX * sizeof(struct platform_inst_fw_cap)); + memcpy(inst->fw_caps, core->inst_fw_caps_enc, + sizeof(inst->fw_caps)); + inst->inst_fw_caps =3D core->iris_platform_data->inst_fw_caps_enc; =20 return iris_ctrls_init(inst); } --=20 2.47.3