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[122.26.198.181]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-78b01f99acesm15123273b3a.5.2025.10.07.02.23.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 02:23:34 -0700 (PDT) From: Daniel Palmer To: linux-m68k@lists.linux-m68k.org, linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Daniel Palmer Subject: [RFC PATCH 1/5] m68k: Adjust the pci io range Date: Tue, 7 Oct 2025 18:23:09 +0900 Message-ID: <20251007092313.755856-2-daniel@thingy.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251007092313.755856-1-daniel@thingy.jp> References: <20251007092313.755856-1-daniel@thingy.jp> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For the Amiga at least the zorro->PCI bridges are in the zorro address space so currently the PCI IO range is not big enough for something in the zorro area to be in there. Signed-off-by: Daniel Palmer --- arch/m68k/include/asm/io_mm.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/m68k/include/asm/io_mm.h b/arch/m68k/include/asm/io_mm.h index 090aec54b8fa..47aff2ba75f6 100644 --- a/arch/m68k/include/asm/io_mm.h +++ b/arch/m68k/include/asm/io_mm.h @@ -379,10 +379,13 @@ static inline void isa_delay(void) #define writesw(port, buf, nr) raw_outsw((port), (u16 *)(buf), (nr)) #define writesl(port, buf, nr) raw_outsl((port), (u32 *)(buf), (nr)) =20 -#ifndef CONFIG_SUN3 -#define IO_SPACE_LIMIT 0xffff -#else +#if defined(CONFIG_SUN3) #define IO_SPACE_LIMIT 0x0fffffff +/* For the mediator we have io space somewhere in the Zorro 3 space */ +#elif defined(CONFIG_PCI_MEDIATOR4000) +#define IO_SPACE_LIMIT 0x7fffffff +#else +#define IO_SPACE_LIMIT 0xffff #endif =20 #endif /* __KERNEL__ */ --=20 2.51.0 From nobody Sat Feb 7 18:20:39 2026 Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 045362D7DC8 for ; Tue, 7 Oct 2025 09:23:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759829019; cv=none; b=R8+PfXxAcjvPgGU8MDOQXd1IGRO5zVTLwQfIZaT7buKHsTHB3aUQEE/6zfzGkMxmBJOC5q2VbYCoXohLo1fUTFvq3PJxjfl8xPXCnFzyXt8Y6wdJAm3MnKzbaaa5wVpQe6eHgYqe8YmYRYL9pwJikV4O3AKB3Tsj9R0OpN5OkSE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759829019; c=relaxed/simple; bh=U4GkNtp5nOav2nmyt8vVluDERiX84m/g+t6fg257pzk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hQqOqPS7Y9xpeyGyqkJz/LdPuYsKqb7jCvC6sbnsULbtp8NiZzg69xZKGjboCyEvcBtXCLsiddXq6kqnbVc+DwIJtFfWPcc3uWm3prfP8sZw0RH6wNRhR8/slFduDhfGzkFJmn928C2KAFxFhM/Lo7bn6Q3H7FadmWORAiJ5Nlw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=thingy.jp; spf=pass smtp.mailfrom=0x0f.com; dkim=pass (1024-bit key) header.d=thingy.jp header.i=@thingy.jp header.b=hEtcKJjD; arc=none smtp.client-ip=209.85.210.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=thingy.jp Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0x0f.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=thingy.jp header.i=@thingy.jp header.b="hEtcKJjD" Received: by mail-pf1-f180.google.com with SMTP id d2e1a72fcca58-781206cce18so5074831b3a.0 for ; Tue, 07 Oct 2025 02:23:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=thingy.jp; s=google; t=1759829017; x=1760433817; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=F9DzUNgYrybOaCJXzvxFTfL7BnySvd74Sjls907O7gc=; b=hEtcKJjDf9vw4WN4ebFEKxEDRjTEh+g9eQLRDU8K3LIp6gfMRhoyamZOhFVozZCMDM wDCw5U2e/nFRkiqgM52mnFU0aH3Yy/sxv4rWvPF6D6+q3fFpDm1F9evs6ao87cJHJRJg 6XWW1UzDKPNZo3VbuEV4NKg/gQfJJyztZWA7M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759829017; x=1760433817; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=F9DzUNgYrybOaCJXzvxFTfL7BnySvd74Sjls907O7gc=; b=fnYJMbmgFfL6k2tnhVMKSfhZAFCWYRBI9zg0hosUiAFzcIBH4vsGnlGfrvrXjV/nxQ fMROFyiuUarGQjZEJEcnUinAXEaEM59/v/M3vbVUPksUpyrdxhFnNWdXcCPTntV3HY9o fixV+x92rcMQOVlC7cD7JXWcAOkmfPt1os9Am2CD1GaGYS95zTxjhWtR5DSuDdmTksJ1 1zswnPO775FkUNKMnpVITdWIFYayn5i/XDrCUVsK2EvfkTU/R+NUouPZTKXkA/BzLYLq ebao+8fBiuGz08wIJPJm/ZWhZ/u7XGB0w45NUj0BGCp4+X0iUK6CoQYERUkPsCtOjBnE fwZA== X-Gm-Message-State: AOJu0YxEpqgsoIG0kN4aP61PPrjs1WuYtmw7O9+0NAcNdOKEnr8xAWvA Ox4tBUMoG/QXOpIUjaYnQ4ux9uLhl9ysfGKTHGeLSI8Rhmrt/DNbBeCCVqPk4Junvoel9M9h6GR 4TymCI7g= X-Gm-Gg: ASbGncsrZzpTwePd8Fm6QOw8UndpP4ZsdZXlgzBWJRZ9F20KnBOHP8jOGjY6CFdGpN6 pse7bvlS77r2kHAHVFbyySan/OenBZmz4VQCYzq6ep78fcuM36j2fCAL7YZNpwk+ZIVz968H0GN QpjLE6Y7Kw7Q8MnwkIfnYlToiJIzcmIM1I7kD7K27NqU+p/PZqogPoYi0vd7UjtDFvaPVmBu4/v TGrahpaTn8O59HLqcDufPwMjs/YHEpDCX3dIaslVc2rTHodBD21qUEasyeIiYKiMKd5UO6AsyiI sK3564ZR95KsJnrsgGLRlJuUhOccQnGXVN06q1cCItacRNdtkPJrgMulHMjcRo9t6dqxIkAmYS8 pMFW9hHw1YXg5JdcaU/1jFtvWuCO4REgnfpJUY5oMLnHMdNPrBJeX/MO3E/pz4xbZgHLAeluPYC +MXROa+CvD5igyL/tvVDi5ICRQW6uBBAkEtbM= X-Google-Smtp-Source: AGHT+IEwApYE4bcVoj0TdA/p3fC9MzhC83ylm4Bt3jZjLY09+Fp8yf60U6Us/aOsm75FFyq+QvCLWA== X-Received: by 2002:a05:6a20:e30b:b0:2ce:67b2:3c41 with SMTP id adf61e73a8af0-32d96db80dfmr3802640637.5.1759829017271; Tue, 07 Oct 2025 02:23:37 -0700 (PDT) Received: from kinako.work.home.arpa (p1522181-ipxg00c01sizuokaden.shizuoka.ocn.ne.jp. [122.26.198.181]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-78b01f99acesm15123273b3a.5.2025.10.07.02.23.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 02:23:36 -0700 (PDT) From: Daniel Palmer To: linux-m68k@lists.linux-m68k.org, linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Daniel Palmer Subject: [RFC PATCH 2/5] m68k: Increase number of IRQs for Amiga to allow for PCI Date: Tue, 7 Oct 2025 18:23:10 +0900 Message-ID: <20251007092313.755856-3-daniel@thingy.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251007092313.755856-1-daniel@thingy.jp> References: <20251007092313.755856-1-daniel@thingy.jp> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" According to the comment the Amiga has 24 interrupts but I needed 4 more to allocate irqs for the 4 PCI interrupts. Signed-off-by: Daniel Palmer --- arch/m68k/include/asm/irq.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h index 2263e92d418a..ec944dc27710 100644 --- a/arch/m68k/include/asm/irq.h +++ b/arch/m68k/include/asm/irq.h @@ -24,7 +24,9 @@ #define NR_IRQS 72 #elif defined(CONFIG_Q40) #define NR_IRQS 43 -#elif defined(CONFIG_AMIGA) || !defined(CONFIG_MMU) +#elif defined(CONFIG_AMIGA) +#define NR_IRQS (32 + 4) +#elif !defined(CONFIG_MMU) #define NR_IRQS 32 #elif defined(CONFIG_APOLLO) #define NR_IRQS 24 --=20 2.51.0 From nobody Sat Feb 7 18:20:39 2026 Received: from mail-pf1-f174.google.com (mail-pf1-f174.google.com [209.85.210.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA7C32D7DD3 for ; Tue, 7 Oct 2025 09:23:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759829021; cv=none; b=tAMWOdnjCZPISd4v85JsARYmU3GrQoDpW/1ga9J5UNDeLPLPAXEh+1+oDF4Cd7O48xE0gizZRru0NWjDlWFPdB2WkwdVq1G1VVbUQ3EVI4TPEY5w1WXHoAULraIemzx/fLAKPx0UtS4P4FOjBBZMuS+a2mXtmcZCbO0nW+90j58= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759829021; c=relaxed/simple; bh=vOEMENaovdm9ccCHM/8VsN0k/NdulbFSwwEhhfsljgU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=igo4rsdLhVQnF8k60h74zjnyS4zx5gs+3gUe3ChmbDeUVLgCAapCu8COff5o+C9vEGvCn9J8RWcrpSnyW84BJdGyro37sCv8ddXcptKH7ym8WdzFqatO8GrKrpsAvdRxI4jbn9yidyCbfbByPBKHMiiXOh9+CIgqrx7ZtS4TOTA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=thingy.jp; spf=pass smtp.mailfrom=0x0f.com; dkim=pass (1024-bit key) header.d=thingy.jp header.i=@thingy.jp header.b=Ogs+k34i; arc=none smtp.client-ip=209.85.210.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=thingy.jp Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0x0f.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=thingy.jp header.i=@thingy.jp header.b="Ogs+k34i" Received: by mail-pf1-f174.google.com with SMTP id d2e1a72fcca58-77f67ba775aso7936873b3a.3 for ; Tue, 07 Oct 2025 02:23:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=thingy.jp; s=google; t=1759829019; x=1760433819; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HkgHB/Rx6YD5mkkjItctKin/3uCiIG1rZ2SooPNG71I=; b=Ogs+k34iQj80mUBqXe/0tEw2JB1j4Ufz02d0zKGt+PIdWtEPkKi4iJ3qMBzwWzdvLR D8xkrYNWu3eUWW9IkZwn7V6oZIZ8s9h/fu4kJc3AgajMwvQR4gfv0hjyoWcFcEPE3B2Z AG5MHusaaPkoyNrjupGrso0hC0sAryHpT5M1E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759829019; x=1760433819; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HkgHB/Rx6YD5mkkjItctKin/3uCiIG1rZ2SooPNG71I=; b=r9rrgyq54N3YmHYj9yHvSpN7YcjHss3El8JjXqMxaCfPYPAShV779z5SWtTaXm1eyE L1VtUXUaiJsYyOC7Cp9nITNiOzKYhLPfhHo2BvRy/+2eg820zEWwDLv+5ylCHuWQKdXJ wn07v92J+8KqaAAs7KH+oeufvMzvO173GMoo/1ezCuzjb2JU/HgILSA8mNpBGKUGgRGx Ogzm39RDHTjR/qEA3NxzkXJyqzSOokGVrc0+fVtxCWgNCXHCKkwAryKem0yZycl113lg pHxcKqNYi4bFN2C3grea4PD99aqkYdjTns9Nt/UPI7Izv7ctTitQWM1/Uyde1ryotWYc nRGA== X-Gm-Message-State: AOJu0Yz5c4c5T7ehbj587VncGy9l3k9Kb/+Og4M5nRONcLzWuB6tAxFu gGps/kwbWhRXZU2+sho8ysTSP2uNsFcjSv9VO8sMFQ7dksHEI8MtJmxEK3cWQnABc4l4xBXu/q7 fgtBliBI= X-Gm-Gg: ASbGncvAs7Dcc6r2+6zlBh6Wrkh3idbiw494FkXstnv9DuArTL9sRlJVfdjZF9Ah7mW QkfDY9whjx4Gs15FvTmu8Mi1ksBpxMk8xxR2qszKSDkHu1eoQejUWvg1Q13MkCeOhBw3lOi4+jI Dz7QNeZks8Zn5uSpw3MXwXbQmXluJDU0ARjFu5XFOIZlILqicPi9VLczIuLQWVX0YbZSnt2gRm7 CntD7VdT86P0eBakJV0Lot2FIkPLq+hrZSQoRA5NjSm7lac7kAH2zV4F5zPTFdGhhFdxVWsbQpD vvrAOS7laAyRI2VX4Lb248ESdRusFOg+YHHGneunWfsdQzIkmJl/hpLO+/UBbRAaRIjUJI4H+Vu ywLhU+5+9uZ6wzrw4WXy4OpQRXArniI98LRoiN2FKz3Fmwysr0AK+vdmbx9ZRDfdhip2x6IjkyN vLjAwbSYTI1u7s1WUkEdi2V+JMPagzF3PBnZE= X-Google-Smtp-Source: AGHT+IEkoZ49NHDSFtXnBk2cm2DDRooGytgcNKyAOw5DMVDLSoZWdRSYe50TuAE1idLzf3WVMAfdyQ== X-Received: by 2002:a05:6a20:958f:b0:24e:e270:2f64 with SMTP id adf61e73a8af0-32b61b30302mr20565633637.0.1759829019271; Tue, 07 Oct 2025 02:23:39 -0700 (PDT) Received: from kinako.work.home.arpa (p1522181-ipxg00c01sizuokaden.shizuoka.ocn.ne.jp. [122.26.198.181]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-78b01f99acesm15123273b3a.5.2025.10.07.02.23.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 02:23:38 -0700 (PDT) From: Daniel Palmer To: linux-m68k@lists.linux-m68k.org, linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Daniel Palmer Subject: [RFC PATCH 3/5] m68k: amiga: Allow PCI Date: Tue, 7 Oct 2025 18:23:11 +0900 Message-ID: <20251007092313.755856-4-daniel@thingy.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251007092313.755856-1-daniel@thingy.jp> References: <20251007092313.755856-1-daniel@thingy.jp> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Amiga has various options for adding a PCI bus so select HAVE_PCI. Signed-off-by: Daniel Palmer --- arch/m68k/Kconfig.machine | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/m68k/Kconfig.machine b/arch/m68k/Kconfig.machine index de39f23b180e..b170ebf39273 100644 --- a/arch/m68k/Kconfig.machine +++ b/arch/m68k/Kconfig.machine @@ -7,6 +7,7 @@ config AMIGA bool "Amiga support" depends on MMU select LEGACY_TIMER_TICK + select HAVE_PCI help This option enables support for the Amiga series of computers. If you plan to use this kernel on an Amiga, say Y here and browse the --=20 2.51.0 From nobody Sat Feb 7 18:20:39 2026 Received: from mail-pf1-f181.google.com (mail-pf1-f181.google.com [209.85.210.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B7D42D8DBD for ; Tue, 7 Oct 2025 09:23:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759829023; cv=none; b=kDAqGKKusaGQqYFc65jgER5Q6pS8K6iJZZTl9llPrz6aXrqr1VMNs3feD+Vlpc9xzlR6tgfQTK9VQkOhxZZI/tpltakKQmkQsLL8PgHjvfDZ3XVlnK0MqQ26IwbuclJphCFiaUQ/mpXHw5soQplkK5no9QXOPTy2MLJcVwrvSxs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759829023; c=relaxed/simple; bh=DCke+Rgyj5qSCGTteE3WiBXknhrXT31kjNGo+dEDh6c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kWutt0t7gqFRoH9MMCTqP/w/BbG2dNOzVkQQWHcz9PGidDlebxqJK9vqdEKY3/v35snAiakohcvk519qzxFee2UEmdVcACBfZMCS2cU/zuVlvxWfy14wgV4Ni+bjVVB6i35Zcqeb6UcutKqRrHLM1cqWwmChd1OxfEhTedJtW9Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=thingy.jp; spf=pass smtp.mailfrom=0x0f.com; dkim=pass (1024-bit key) header.d=thingy.jp header.i=@thingy.jp header.b=Rl4lxyHt; arc=none smtp.client-ip=209.85.210.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=thingy.jp Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0x0f.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=thingy.jp header.i=@thingy.jp header.b="Rl4lxyHt" Received: by mail-pf1-f181.google.com with SMTP id d2e1a72fcca58-78f3bfe3f69so2256195b3a.2 for ; Tue, 07 Oct 2025 02:23:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=thingy.jp; s=google; t=1759829021; x=1760433821; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SYIeDOuQqkaMDFPi5xbBNKu5rw0w8hiBYlZqsaimji0=; b=Rl4lxyHtufz3VMla7gym9bOVGf4ti9qoez2QPJcdrzIS7dX+rMJBW0d9mx6iirsKK1 SnrJ2+cnQ0/9vVz5AVVXuKhQZ3FxS8S8bap6mbM6OC5pL+r0Au9wiVrb7SO1/o+DCR/d X2YvA00r+F7RqHJOQtebPO2tNYQqs78MBadRY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759829021; x=1760433821; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SYIeDOuQqkaMDFPi5xbBNKu5rw0w8hiBYlZqsaimji0=; b=oSZ5RP9nmdhiLC5CUnsUfpLWITbogsh8xgolhDjvfMAtqkvsrq8kWl+Ns3KuvUirqM LOtbtoAvVRrcJyuMUqNBpvLsI3Y0ISJc2+QdG5JFMd01k3bqhVYz/RlJtLBkqJTfzkcc 5DcG5qzXgcvGpH1s0BmRas8xnqD+xqvDh0gEYZXTu4skTFWxAW2CoJA+tDgfKfBrY4Zj tn9rleGO7AkP1sw1Bt6pAfitP9+3j9xaXHrV9yWnxLSqo7L4MWcliZRYBJmLrGayoT/p LmH3k0sYtkjmLjuFzyDagd0nu3WDbc4Xb+izYVPxtZ4EYwj7dzNqSieqTMvr+zHkdnoZ BiIQ== X-Gm-Message-State: AOJu0YxIe7hm3keMR/JTudQHlk/m/zf7fOShp/PkS/w4VEUbyg+jT4ON eIE6WM+Y6Sdo4pwQURjTkM3EVAHe4uiXQIfkCb/PfLG13ZUnDRrX3yXLyHJP8i01+3A= X-Gm-Gg: ASbGncu3t61ICILxYh1cZ6VbVQ6dcmPXSjoV2xvr+hsn3Fwj55Ntmy9wzelJV8OnzIg ebKj3aRV6ioRvJGCHfxGoxLhlu+j54AQlb2OMYx7A1lmf2fXuQVKFkZG/8zcesk0C+L99Yto6ZP oT2XxV8EL2hxP6M2G7wmr/zzLaR8P13Fi9p+6N+y3AA4bQ3mVkIu0iN75FDCPG+pDXBmPtWZSXC lGTrGRUcgInzxsP4tQrSgur4igG13NO4XmKkF64MRAPVwZDxyXYP3dGslq2iV97/VoAej6Fdqjk vkn5YZZvaT21fuevdTg0iCUvR2j1v2NbVMqMMEGRMgM4XnJ7RF04LjguoU07VBLrxMleNmvucgN BfElDIa1e4ceLTP1F2vzrq312VF0u1joJnMnCwalfxaSBp6UxTESlR+S5y7mlksOb7Q7O/HIdHO NpzDYNyKjravtpztWVhfsoXEXHmJ3UenxOH3E= X-Google-Smtp-Source: AGHT+IGnvuQXkfGwuAEx+Yb7NtSe2KQaKWhVmybTLT2ISlnYdo/gl3gHqlFXl6t/Wt6B4xnc3vLRCQ== X-Received: by 2002:a05:6a00:988:b0:781:d163:ce41 with SMTP id d2e1a72fcca58-78c98d5cc70mr15969410b3a.11.1759829021537; Tue, 07 Oct 2025 02:23:41 -0700 (PDT) Received: from kinako.work.home.arpa (p1522181-ipxg00c01sizuokaden.shizuoka.ocn.ne.jp. [122.26.198.181]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-78b01f99acesm15123273b3a.5.2025.10.07.02.23.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 02:23:40 -0700 (PDT) From: Daniel Palmer To: linux-m68k@lists.linux-m68k.org, linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Daniel Palmer Subject: [RFC PATCH 4/5] zorro: Add ids for Elbox Mediator 4000 Date: Tue, 7 Oct 2025 18:23:12 +0900 Message-ID: <20251007092313.755856-5-daniel@thingy.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251007092313.755856-1-daniel@thingy.jp> References: <20251007092313.755856-1-daniel@thingy.jp> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the two ids for the Elbox Mediator 4000. There are two because it presents as two boards: - One that contains the control registers, PCI config + io space - Another that contains a window that contains the PCI memory space Signed-off-by: Daniel Palmer --- drivers/zorro/zorro.ids | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/zorro/zorro.ids b/drivers/zorro/zorro.ids index 119abea8c6cb..fda1db905412 100644 --- a/drivers/zorro/zorro.ids +++ b/drivers/zorro/zorro.ids @@ -369,6 +369,8 @@ 1900 FastATA 4000 [IDE Interface] 1d00 FastATA 4000 [IDE Interface] 1e00 FastATA ZIV [IDE Interface] + 2100 Mediator 4000 (Control) [PCI bridge] + a100 Mediator 4000 (Window) [PCI bridge] 0a00 Harms Professional 1000 030 Plus [Accelerator] d000 3500 Professional [Accelerator and RAM Expansion] --=20 2.51.0 From nobody Sat Feb 7 18:20:39 2026 Received: from mail-pf1-f173.google.com (mail-pf1-f173.google.com [209.85.210.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 987FB2D8DC4 for ; Tue, 7 Oct 2025 09:23:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759829026; cv=none; b=MbzE/LUl4o2rZCQlWzzXWFwEmbE+S7BgV+jcMRyERv5FMlXrGDQZehA/inK6ocnDl9s+6tNZeiEBazlpkBEpSFUkiNxgHvhAGmkdp0EMa/UuadENkntIcFgUWGQj/ub+JJ3mxfRNE1zckSlAxV1UmUmXFFoH34PvAcDb6zggVlM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759829026; c=relaxed/simple; bh=1OeXF7gTwGHtpMbzV5wweaCOtSArrdR207QvrmykQiw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FCatw3Bm3FEgAteOdMMMJBVSeWclwrwuIksJmWBQB2a77HC5xLL08BlelJ/uatBR7C0xfycPmszCiCUGxe92MkrKMT3b/22Y4yevg8KLmbqkI52+6ZozelA9zcacp3kIn+MkGY8EblKGIKlTh2NuCTECZkuH4eZK178nDaBdzWQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=thingy.jp; spf=pass smtp.mailfrom=0x0f.com; dkim=pass (1024-bit key) header.d=thingy.jp header.i=@thingy.jp header.b=WuXxAT3I; arc=none smtp.client-ip=209.85.210.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=thingy.jp Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0x0f.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=thingy.jp header.i=@thingy.jp header.b="WuXxAT3I" Received: by mail-pf1-f173.google.com with SMTP id d2e1a72fcca58-791c287c10dso1416223b3a.1 for ; Tue, 07 Oct 2025 02:23:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=thingy.jp; s=google; t=1759829024; x=1760433824; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=T+CusO7hLt+9Y9wt+DVMqJ4BTyt8WBGC9ci0HN6flQk=; b=WuXxAT3IkSHBWcfiXz14YNhEnCrv03rJozQ9zKpR+oAg0zws47D7K/ol5hXoNYmg+Y FuFkd3hwN1mpuvsGCuyeSDkOldRpv0sCPjLoG4gA1sFEJnISOUlLTo79SxVmyBqDHVAj Zb2jU0CktKI0OA6QRtxxmPyjClcNbHJugukRU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759829024; x=1760433824; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=T+CusO7hLt+9Y9wt+DVMqJ4BTyt8WBGC9ci0HN6flQk=; b=V2hV9xs8fAsjQCEVg8UmO4qSaCTSuCYxzZemy5hrSSuPx1ui3QIfvIZSLAF37WUlj8 Z0I5vEiCZxvm6czZP2lLPU5g3r22iurvFDEXCQeUf5HnbS1a/IwOGxtLzr9xSu9Gb4ab Qxbt2KOpw5BB51FNtFdbUc+UBKsbt8viSuyuIul1gv0WoC2p8m8tPR7PpTX19AtviFoa NLHnzKQ+mgTIBZlYeWGPCL7t3xybBlv9cquFn6RNKANyhPcpqB9VkXzZQTLHoJ8J0dDc aLRJMO031qMypwgjYqBo2nhRKG91ATRfoQX6BE+NNd+oB3ISggAuFtJGv6jN0Nk0dcp4 hMIQ== X-Gm-Message-State: AOJu0YxOuEI47zwNzEeEVB1uHsMDE2koYcO4rg9Z5oQ54Bz/a38AYkVq yhSZ/U3yJJ2PQ968xrqCBAsW6JAWPcdEsLfzQcpK+okj4aeq0tUDsMnSfoQmwCvMMto= X-Gm-Gg: ASbGncuFHRbcoB2xcQuNfxowF3YdZlckMJDT6iHLxgtWjfpaDzEoZBFcyvbmxT1QNFl G/J6nIYMOCqopq6M5ZBn1rhfZW7OVpFjC6iJni8JZYgHm/92OZUOUnpnk2yoblqo0Zjwu209Ope 5exuktZBtAIepkbc5tQEvCBS3XOVhtJTAhFIcBX0rqs63l4C1RwxK4ACTjthpoE579+yWGFWSwV QLF0wEP5QT3OvhH26DvYnVtiraNaCB3T14Nq9+pfZJKwPqogZOxO0FQw2MrbmOgfYDOWOnmmePU gRHxkBOXOoOzuVZRrinD2GLZw3INS6fFraN4B+fuzXgTgSKbZhKXjRyzMR8MW4pflzpz6JD4qaf Gf3SAkiVNt62HsBa/lECw8Nkt9AJN6R/i/+OldSEfr4cve4ouieDdG5RXkHQaaBx5GB/yGlO4GU Scp/fbGxJp/kfLedgJHze/BJWKmHE832kqwnY= X-Google-Smtp-Source: AGHT+IF4MSf04NQohlmDVk/NVGrQyb6JbvrOwZqAVxAqJ3miglfPpesBhHPBayxboRAG5nUUyIX4Ow== X-Received: by 2002:a05:6a00:3d51:b0:772:4319:e7df with SMTP id d2e1a72fcca58-78c98df9feemr14525251b3a.30.1759829023784; Tue, 07 Oct 2025 02:23:43 -0700 (PDT) Received: from kinako.work.home.arpa (p1522181-ipxg00c01sizuokaden.shizuoka.ocn.ne.jp. [122.26.198.181]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-78b01f99acesm15123273b3a.5.2025.10.07.02.23.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 02:23:43 -0700 (PDT) From: Daniel Palmer To: linux-m68k@lists.linux-m68k.org, linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Daniel Palmer Subject: [RFC PATCH 5/5] PCI: Add driver for Elbox Mediator 4000 Zorro->PCI bridge Date: Tue, 7 Oct 2025 18:23:13 +0900 Message-ID: <20251007092313.755856-6-daniel@thingy.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251007092313.755856-1-daniel@thingy.jp> References: <20251007092313.755856-1-daniel@thingy.jp> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Mediator 4000 is pretty simple: - There is one "board" in the zorro space that has 2 registers to set the base address of the PCI memory address space in the machine address space and handle interrupts, and then windows to address the PCI config space and PCI IO space. - Another board that contains the PCI memory address space inside of a window of 256MB or 512MB (configured by a jumper). Since the hardware has no official documentation I cooked this up using the WinUAE emulated version to work out how it mostly works then confirmed it still worked on my real Amiga 4000. Signed-off-by: Daniel Palmer --- drivers/pci/controller/Kconfig | 11 + drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pci-mediator4000.c | 314 ++++++++++++++++++++++ 3 files changed, 326 insertions(+) create mode 100644 drivers/pci/controller/pci-mediator4000.c diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 41748d083b93..3fb977318123 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -215,6 +215,17 @@ config PCIE_MEDIATEK_GEN3 Say Y here if you want to enable Gen3 PCIe controller support on MediaTek SoCs. =20 +config PCI_MEDIATOR4000 + tristate "Elbox Mediator 4000 Zorro->PCI bridge" + depends on AMIGA + select IRQ_DOMAIN + help + Adds support for the Elbox Mediator 4000 Zorro->PCI bridge for + the Amiga 4000. + + Say Y here if you are one of the few people that has this hardware + and run Linux on it. + config PCIE_MT7621 tristate "MediaTek MT7621 PCIe controller" depends on SOC_MT7621 || COMPILE_TEST diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makef= ile index 038ccbd9e3ba..03cd529716ec 100644 --- a/drivers/pci/controller/Makefile +++ b/drivers/pci/controller/Makefile @@ -39,6 +39,7 @@ obj-$(CONFIG_PCI_LOONGSON) +=3D pci-loongson.o obj-$(CONFIG_PCIE_HISI_ERR) +=3D pcie-hisi-error.o obj-$(CONFIG_PCIE_APPLE) +=3D pcie-apple.o obj-$(CONFIG_PCIE_MT7621) +=3D pcie-mt7621.o +obj-$(CONFIG_PCI_MEDIATOR4000) +=3D pci-mediator4000.o =20 # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW obj-y +=3D dwc/ diff --git a/drivers/pci/controller/pci-mediator4000.c b/drivers/pci/contro= ller/pci-mediator4000.c new file mode 100644 index 000000000000..106cde263e2c --- /dev/null +++ b/drivers/pci/controller/pci-mediator4000.c @@ -0,0 +1,314 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 Daniel Palmer + */ + +#include +#include +#include +#include +#include + +/* Offsets etc */ +#define MEDIATOR4000_CONTROL 0x0 +#define MEDIATOR4000_CONTROL_SIZE 0x4 +#define MEDIATOR4000_CONTROL_WINDOW 0x0 +#define MEDIATOR4000_CONTROL_WINDOW_SHIFT 0x18 +#define MEDIATOR4000_CONTROL_IRQ 0x4 +#define MEDIATOR4000_CONTROL_IRQ_MASK_SHIFT 0x4 +#define MEDIATOR4000_PCICONF 0x800000 +#define MEDIATOR4000_PCICONF_SIZE 0x400000 +#define MEDIATOR4000_PCICONF_DEV_STRIDE 0x800 +#define MEDIATOR4000_PCICONF_FUNC_STRIDE 0x100 +#define MEDIATOR4000_PCIIO 0xc00000 +#define MEDIATOR4000_PCIIO_SIZE 0x100000 + +/* How the Amiga sees the mediator 4000 */ +#define MEDIATOR4000_IRQ IRQ_AMIGA_PORTS +#define MEDIATOR4000_ID_CONTROL ZORRO_ID(ELBOX_COMPUTER, 0x21, 0) +#define MEDIATOR4000_ID_WINDOW ZORRO_ID(ELBOX_COMPUTER, 0x21 | 0x80, 0) + +/* + * There are a few versions of the PCI backplane board, + * at most there are 6 slots it seems. + */ +#define MEDIATOR4000_MAX_SLOTS 6 + +#define MEDIATOR4000_PCICONF_DEVFUNC_OFF(priv, devfn) \ + (priv->config_base + \ + (MEDIATOR4000_PCICONF_DEV_STRIDE * PCI_SLOT(devfn)) + \ + (MEDIATOR4000_PCICONF_FUNC_STRIDE * PCI_FUNC(devfn))) + +struct pci_mediator4000_priv { + struct resource pciio_res; + unsigned long config_base; + unsigned long setup_base; + struct irq_domain *irqdomain; + int irqmap[PCI_NUM_INTX]; +}; + +static int pci_mediator4000_readconfig(struct pci_bus *bus, unsigned int d= evfn, + int where, int size, u32 *value) +{ + struct pci_mediator4000_priv *priv =3D bus->sysdata; + unsigned long addr =3D MEDIATOR4000_PCICONF_DEVFUNC_OFF(priv, devfn) + wh= ere; + u32 v; + + if (PCI_SLOT(devfn) >=3D MEDIATOR4000_MAX_SLOTS) + return PCIBIOS_FUNC_NOT_SUPPORTED; + + /* Apparently only reading longs works */ + v =3D z_readl(addr & ~0x3); + + switch (size) { + case 4: + v =3D le32_to_cpu(v); + break; + case 2: + v =3D le16_to_cpu(((u16 *)(&v))[(addr & 0x3) >> 1]); + break; + case 1: + v =3D ((u8 *)&v)[addr & 0x3]; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + *value =3D v; + + return PCIBIOS_SUCCESSFUL; +} + +static int pci_mediator4000_writeconfig(struct pci_bus *bus, unsigned int = devfn, + int where, int size, u32 value) +{ + struct pci_mediator4000_priv *priv =3D bus->sysdata; + unsigned long addr =3D MEDIATOR4000_PCICONF_DEVFUNC_OFF(priv, devfn) + wh= ere; + u32 v; + + if (PCI_SLOT(devfn) >=3D MEDIATOR4000_MAX_SLOTS) + return PCIBIOS_FUNC_NOT_SUPPORTED; + + /* If its a long just write it */ + if (size =3D=3D 4) { + v =3D cpu_to_le32(value); + z_writel(v, addr); + return PCIBIOS_SUCCESSFUL; + } + + /* Not a long, do RMW */ + v =3D z_readl(addr & ~0x3); + + switch (size) { + case 2: + ((u16 *)(&v))[(addr & 0x3) >> 1] =3D cpu_to_le16((u16)value); + break; + case 1: + ((u8 *)(&v))[addr & 0x3] =3D value; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + z_writel(v, addr & ~0x3); + + return PCIBIOS_SUCCESSFUL; +} + +static irqreturn_t pci_mediator4000_irq(int irq, void *dev_id) +{ + struct pci_mediator4000_priv *priv =3D dev_id; + u8 v =3D z_readb(priv->setup_base + MEDIATOR4000_CONTROL_IRQ); + unsigned long mask =3D v & 0xf; + int i; + + for_each_set_bit(i, &mask, PCI_NUM_INTX) + generic_handle_domain_irq(priv->irqdomain, i); + + return IRQ_HANDLED; +} + +static int pci_mediator4000_map_irq(const struct pci_dev *dev, u8 slot, u8= pin) +{ + struct pci_mediator4000_priv *priv =3D dev->bus->sysdata; + + /* + * I'm not actually sure how the lines are wired on + * mediators with more than 4 slots. My 4 slot board seems to just + * have slot number =3D=3D irq. + */ + return priv->irqmap[slot % PCI_NUM_INTX]; +} + +static struct pci_ops pci_mediator4000_ops =3D { + .read =3D pci_mediator4000_readconfig, + .write =3D pci_mediator4000_writeconfig, +}; + +static struct resource mediator4000_busn =3D { + .name =3D "mediator4000 busn", + .start =3D 0, + .end =3D 0, + .flags =3D IORESOURCE_BUS, +}; + +static void pci_mediator4000_mask_irq(struct irq_data *d) +{ + struct pci_mediator4000_priv *priv =3D irq_data_get_irq_chip_data(d); + u8 v =3D z_readb(priv->setup_base + MEDIATOR4000_CONTROL_IRQ); + + v &=3D ~(BIT(irqd_to_hwirq(d)) << MEDIATOR4000_CONTROL_IRQ_MASK_SHIFT); + z_writeb(v, priv->setup_base + MEDIATOR4000_CONTROL_IRQ); +} + +static void pci_mediator4000_unmask_irq(struct irq_data *d) +{ + struct pci_mediator4000_priv *priv =3D irq_data_get_irq_chip_data(d); + u8 v =3D z_readb(priv->setup_base + MEDIATOR4000_CONTROL_IRQ); + + v |=3D (BIT(irqd_to_hwirq(d)) << MEDIATOR4000_CONTROL_IRQ_MASK_SHIFT); + z_writeb(v, priv->setup_base + MEDIATOR4000_CONTROL_IRQ); +} + +static struct irq_chip pci_mediator4000_irq_chip =3D { + .name =3D "mediator4000", + .irq_mask =3D pci_mediator4000_mask_irq, + .irq_unmask =3D pci_mediator4000_unmask_irq, +}; + +static int pci_mediator4000_irq_map(struct irq_domain *domain, unsigned in= t irq, + irq_hw_number_t hwirq) +{ + irq_set_chip_and_handler(irq, &pci_mediator4000_irq_chip, handle_level_ir= q); + irq_set_chip_data(irq, domain->host_data); + + return 0; +} + +static const struct irq_domain_ops pci_mediator4000_irqdomain_ops =3D { + .map =3D pci_mediator4000_irq_map, +}; + +static int mediator4000_setup(struct device *dev, + struct zorro_dev *m4k_control, + struct zorro_dev *m4k_window) +{ + unsigned long control_base =3D m4k_control->resource.start; + struct pci_mediator4000_priv *priv; + struct pci_host_bridge *bridge; + struct fwnode_handle *fwnode; + struct resource *res; + int i, ret; + + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + ret =3D devm_request_irq(dev, MEDIATOR4000_IRQ, pci_mediator4000_irq, + IRQF_SHARED, "mediator4000", priv); + if (ret) + return -ENODEV; + + bridge =3D devm_pci_alloc_host_bridge(dev, 0); + if (!bridge) + return -ENOMEM; + + res =3D devm_request_mem_region(dev, control_base + MEDIATOR4000_CONTROL, + MEDIATOR4000_CONTROL_SIZE, "mediator4000-registers"); + if (!res) + return -ENOMEM; + + priv->setup_base =3D res->start; + + /* Setup the window base */ + z_writeb((m4k_window->resource.start >> MEDIATOR4000_CONTROL_WINDOW_SHIFT= ) & 0xf0, + priv->setup_base + MEDIATOR4000_CONTROL_WINDOW); + + res =3D devm_request_mem_region(dev, control_base + MEDIATOR4000_PCICONF, + MEDIATOR4000_PCICONF_SIZE, "mediator4000-pci-config"); + if (!res) + return -ENOMEM; + + priv->config_base =3D res->start; + + res =3D devm_request_mem_region(dev, control_base + MEDIATOR4000_PCIIO, + MEDIATOR4000_PCIIO_SIZE, "mediator4000-pci-io"); + if (!res) + return -ENOMEM; + + priv->pciio_res.name =3D "mediator4000-pci-io", + priv->pciio_res.flags =3D IORESOURCE_IO, + priv->pciio_res.start =3D res->start; + priv->pciio_res.end =3D res->end; + res =3D insert_resource_conflict(&ioport_resource, &priv->pciio_res); + if (res) + return -ENOMEM; + + pci_add_resource_offset(&bridge->windows, &priv->pciio_res, priv->pciio_r= es.start); + pci_add_resource(&bridge->windows, &m4k_window->resource); + pci_add_resource(&bridge->windows, &mediator4000_busn); + + /* fixme: PCI DMA can only happen inside the window? How to enforce that?= */ + + bridge->sysdata =3D priv; + bridge->ops =3D &pci_mediator4000_ops; + bridge->swizzle_irq =3D pci_common_swizzle; + bridge->map_irq =3D pci_mediator4000_map_irq; + + fwnode =3D irq_domain_alloc_named_fwnode("mediator4000"); + if (!fwnode) + return -ENOMEM; + + priv->irqdomain =3D irq_domain_create_linear(fwnode, + PCI_NUM_INTX, + &pci_mediator4000_irqdomain_ops, + priv); + if (!priv->irqdomain) { + ret =3D -ENOMEM; + goto err; + } + + for (i =3D 0; i < PCI_NUM_INTX; i++) + priv->irqmap[i] =3D irq_create_mapping(priv->irqdomain, i); + + ret =3D pci_host_probe(bridge); + if (!ret) + return 0; + +err: + irq_domain_free_fwnode(fwnode); + return ret; +} + +static int pci_mediator4000_probe(struct zorro_dev *m4k_control, + const struct zorro_device_id *ent) +{ + struct device *dev =3D &m4k_control->dev; + struct zorro_dev *m4k_window; + + m4k_window =3D zorro_find_device(MEDIATOR4000_ID_WINDOW, m4k_control); + if (!m4k_window) { + dev_err(&m4k_control->dev, "Could not find window board\n"); + return -ENODEV; + } + + return mediator4000_setup(dev, m4k_control, m4k_window); +} + +static const struct zorro_device_id pci_mediator4000_zorro_tbl[] =3D { + { + .id =3D MEDIATOR4000_ID_CONTROL, + }, + { 0 } +}; +MODULE_DEVICE_TABLE(zorro, pci_mediator4000_zorro_tbl); + +static struct zorro_driver pci_mediator4000_driver =3D { + .name =3D "pci_mediator4000", + .id_table =3D pci_mediator4000_zorro_tbl, + .probe =3D pci_mediator4000_probe, +}; + +module_driver(pci_mediator4000_driver, + zorro_register_driver, + zorro_unregister_driver); --=20 2.51.0