From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E1A62D593D for ; Tue, 7 Oct 2025 08:32:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825973; cv=none; b=XzdqdCYmHyMSprq9jmeSG33ty0Zgw32d8yytX5A+gG0RsgwIIJWcrJ9wpzZPGwoxY0XL5OlmmNfPZpsIMafykK7D2FqqsZwveCnnMYz4m+SE+HSfpbOfUF1JuhF6+g87z6UcUuclmdG5qWquoPCcxONxkB2C/X+AWBCWi1oIfMY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825973; c=relaxed/simple; bh=AVBfmsk8JAu4BzoU++vEPTxRzQ+o+Bv6YjgzmWEgqjY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HYT9aVxk3HFYOD9b6v8bihhjbTOcSWDemqFa1O3IlAeCBv2dSfK1vi6C3G1VhBCshlzvtARW4iqQdE1F/5nOctH7ix/c9a6v20IYqNafsp6K1eqnvxqf7tT0YzO/pFh1RHYkDywamyx8UFnKzSRMDX/H2+hCORqL3SCZf0hV/Xk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637o-0002Hb-R4; Tue, 07 Oct 2025 10:32:48 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:31:54 +0200 Subject: [PATCH 01/16] media: rockchip: rga: use clk_bulk api Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-1-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Use the clk_bulk API to avoid code duplication for each of the three clocks. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga.c | 64 ++++-----------------------= ---- drivers/media/platform/rockchip/rga/rga.h | 5 +-- 2 files changed, 9 insertions(+), 60 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index 776046de979aa0ded6734216bf179c32ae8fe5a9..6438119a6c7aeff1e89e7aa95dc= d5d2921fefa08 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -702,48 +702,10 @@ static const struct video_device rga_videodev =3D { .device_caps =3D V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING, }; =20 -static int rga_enable_clocks(struct rockchip_rga *rga) -{ - int ret; - - ret =3D clk_prepare_enable(rga->sclk); - if (ret) { - dev_err(rga->dev, "Cannot enable rga sclk: %d\n", ret); - return ret; - } - - ret =3D clk_prepare_enable(rga->aclk); - if (ret) { - dev_err(rga->dev, "Cannot enable rga aclk: %d\n", ret); - goto err_disable_sclk; - } - - ret =3D clk_prepare_enable(rga->hclk); - if (ret) { - dev_err(rga->dev, "Cannot enable rga hclk: %d\n", ret); - goto err_disable_aclk; - } - - return 0; - -err_disable_aclk: - clk_disable_unprepare(rga->aclk); -err_disable_sclk: - clk_disable_unprepare(rga->sclk); - - return ret; -} - -static void rga_disable_clocks(struct rockchip_rga *rga) -{ - clk_disable_unprepare(rga->sclk); - clk_disable_unprepare(rga->hclk); - clk_disable_unprepare(rga->aclk); -} - static int rga_parse_dt(struct rockchip_rga *rga) { struct reset_control *core_rst, *axi_rst, *ahb_rst; + int ret; =20 core_rst =3D devm_reset_control_get(rga->dev, "core"); if (IS_ERR(core_rst)) { @@ -775,22 +737,10 @@ static int rga_parse_dt(struct rockchip_rga *rga) udelay(1); reset_control_deassert(ahb_rst); =20 - rga->sclk =3D devm_clk_get(rga->dev, "sclk"); - if (IS_ERR(rga->sclk)) { - dev_err(rga->dev, "failed to get sclk clock\n"); - return PTR_ERR(rga->sclk); - } - - rga->aclk =3D devm_clk_get(rga->dev, "aclk"); - if (IS_ERR(rga->aclk)) { - dev_err(rga->dev, "failed to get aclk clock\n"); - return PTR_ERR(rga->aclk); - } - - rga->hclk =3D devm_clk_get(rga->dev, "hclk"); - if (IS_ERR(rga->hclk)) { - dev_err(rga->dev, "failed to get hclk clock\n"); - return PTR_ERR(rga->hclk); + ret =3D devm_clk_bulk_get(rga->dev, ARRAY_SIZE(rga->clks), rga->clks); + if (ret) { + dev_err(rga->dev, "failed to get clocks\n"); + return ret; } =20 return 0; @@ -939,7 +889,7 @@ static int __maybe_unused rga_runtime_suspend(struct de= vice *dev) { struct rockchip_rga *rga =3D dev_get_drvdata(dev); =20 - rga_disable_clocks(rga); + clk_bulk_disable_unprepare(ARRAY_SIZE(rga->clks), rga->clks); =20 return 0; } @@ -948,7 +898,7 @@ static int __maybe_unused rga_runtime_resume(struct dev= ice *dev) { struct rockchip_rga *rga =3D dev_get_drvdata(dev); =20 - return rga_enable_clocks(rga); + return clk_bulk_prepare_enable(ARRAY_SIZE(rga->clks), rga->clks); } =20 static const struct dev_pm_ops rga_pm =3D { diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index 72a28b120fabfdce39e7773358d0c9528019e882..a922fac0c01a3627f5149c78a15= 60341428a4fc1 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -6,6 +6,7 @@ #ifndef __RGA_H__ #define __RGA_H__ =20 +#include #include #include #include @@ -81,9 +82,7 @@ struct rockchip_rga { struct device *dev; struct regmap *grf; void __iomem *regs; - struct clk *sclk; - struct clk *aclk; - struct clk *hclk; + struct clk_bulk_data clks[3]; struct rockchip_rga_version version; =20 /* vfd lock */ --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E1292D5408 for ; Tue, 7 Oct 2025 08:32:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825974; cv=none; b=r/IRotMWWRMrgJWVOBtvHKk0eaQO5Jlbp3hIVog63y5C0+zi21trjMPO78HJp4Yh1F0+1gYMEtkTmA3maPOvWBTGAmJXqd/U6tjtzEF11yarNog96L7x5dPqSYDW5JUwll7nHHDX3gdTXoN0PurtA/ujihBHbnX/qTe11AfvJp4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825974; c=relaxed/simple; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-2-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Use the stride instead of the width for the offset calculation. This ensures that the bytesperline value doesn't need to match the width value of the image. Furthermore this patch removes the dependency on the uv_factor property and instead reuses the v4l2_format_info to determine the correct division factor. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-buf.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga-buf.c b/drivers/media/= platform/rockchip/rga/rga-buf.c index 730bdf98565a55704cef92345ccf9f486b99b06e..b5e6b1b527ca81721c64d96d984= d5e981449c237 100644 --- a/drivers/media/platform/rockchip/rga/rga-buf.c +++ b/drivers/media/platform/rockchip/rga/rga-buf.c @@ -14,7 +14,6 @@ #include #include =20 -#include "rga-hw.h" #include "rga.h" =20 static ssize_t fill_descriptors(struct rga_dma_desc *desc, size_t max_desc, @@ -92,14 +91,19 @@ static int rga_buf_init(struct vb2_buffer *vb) return 0; } =20 -static int get_plane_offset(struct rga_frame *f, int plane) +static int get_plane_offset(struct rga_frame *f, + const struct v4l2_format_info *info, + int plane) { + u32 stride =3D f->pix.plane_fmt[0].bytesperline; + if (plane =3D=3D 0) return 0; if (plane =3D=3D 1) - return f->width * f->height; + return stride * f->height; if (plane =3D=3D 2) - return f->width * f->height + (f->width * f->height / f->fmt->uv_factor); + return stride * f->height + + (stride * f->height / info->hdiv / info->vdiv); =20 return -EINVAL; } @@ -145,7 +149,7 @@ static int rga_buf_prepare(struct vb2_buffer *vb) /* Fill the remaining planes */ info =3D v4l2_format_info(f->fmt->fourcc); for (i =3D info->mem_planes; i < info->comp_planes; i++) - offsets[i] =3D get_plane_offset(f, i); + offsets[i] =3D get_plane_offset(f, info, i); =20 rbuf->offset.y_off =3D offsets[0]; rbuf->offset.u_off =3D offsets[1]; --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A76922D5944 for ; Tue, 7 Oct 2025 08:32:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825975; cv=none; b=N2J6Na8VzbE8rujILVz7IhY9uuIn/FxCvsiF/BHYIHIF1AMepmxOgbTCERyXvi41V2hiEgJnAIAfVpd9t7/pT7RPsMdBhN7Mm/xXzvkj65PtMojPBKUmJKz1NN5qJxr0HoJtUWoy8zCFiiSBUIIj8/qQHwVA7Mp3zMhBSbWWLDw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825975; c=relaxed/simple; bh=KVsgiZyiRmT5EtwxVArjMCYkxEe7fYqEDI4m3XHEGAU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mo64W+s6z8BtJe+adGiEWr6WCp6ObinRYNW6YkmmJRr/4HbnI1E4weH0X0G8v5o6YKfDL7KT/mCMS1e0Gs0vBYyKU2SypGfzMq64pcC2Sv2FugMStErhr4iDGHi8exsZxDrOAbLmNbYoOMlzJgYZb9c7Kgv0yBCPxnEHtQITn8Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637q-0002Hb-C9; Tue, 07 Oct 2025 10:32:50 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:31:56 +0200 Subject: [PATCH 03/16] media: rockchip: rga: align stride to 16 bytes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-3-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Align the stride to a multiple of 16 according to the RGA3 requirements mentioned in the datasheet. This also ensures that the stride of the RGA2 is aligned to 4 bytes, as it needs to divide the value by 4 (one word) before storing it in the register. Increasing the stride for the alignment also requires to increase the sizeimage value. This is usually handled by v4l2_fill_pixfmt_mp, but it doesn't allow to set a stride alignment. Therefore use the generated values to calculate the total number of lines to properly update the sizeimage value after the bytesperline has been aligned. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index 6438119a6c7aeff1e89e7aa95dcd5d2921fefa08..3cb7ce470c47e39d694e8176875= a75fad2717f96 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -459,6 +459,25 @@ static int vidioc_enum_fmt(struct file *file, void *pr= iv, struct v4l2_fmtdesc *f return 0; } =20 +static void align_pixfmt(struct v4l2_pix_format_mplane *pix_fmt) +{ + int lines; + struct v4l2_plane_pix_format *fmt; + + /* + * Align stride to 16 for the RGA3 (based on the datasheet) + * To not dismiss the v4l2_fill_pixfmt_mp helper + * (and manually write it again), we're approximating the new sizeimage + */ + for (fmt =3D pix_fmt->plane_fmt; + fmt < pix_fmt->plane_fmt + pix_fmt->num_planes; + fmt++) { + lines =3D DIV_ROUND_UP(fmt->sizeimage, fmt->bytesperline); + fmt->bytesperline =3D (fmt->bytesperline + 0xf) & ~0xf; + fmt->sizeimage =3D fmt->bytesperline * lines; + } +} + static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format = *f) { struct v4l2_pix_format_mplane *pix_fmt =3D &f->fmt.pix_mp; @@ -474,6 +493,7 @@ static int vidioc_g_fmt(struct file *file, void *priv, = struct v4l2_format *f) return PTR_ERR(frm); =20 v4l2_fill_pixfmt_mp(pix_fmt, frm->fmt->fourcc, frm->width, frm->height); + align_pixfmt(pix_fmt); =20 pix_fmt->field =3D V4L2_FIELD_NONE; pix_fmt->colorspace =3D frm->colorspace; @@ -496,6 +516,7 @@ static int vidioc_try_fmt(struct file *file, void *priv= , struct v4l2_format *f) (u32)MIN_HEIGHT, (u32)MAX_HEIGHT); =20 v4l2_fill_pixfmt_mp(pix_fmt, fmt->fourcc, pix_fmt->width, pix_fmt->height= ); + align_pixfmt(pix_fmt); pix_fmt->field =3D V4L2_FIELD_NONE; =20 return 0; --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7833A2D5959 for ; Tue, 7 Oct 2025 08:32:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825975; cv=none; b=a1zl+5vLFHI/MXVYicKgNcOGZMNyXllj84urvtFA2dc9s8S7RlHyqu7UOht4Wjm3Qw576q4ybg6fGNxVYhMsgJ/XvU99r5ge6FtqAfnmPgPm+AqCEa6q2a2mxB62gX34tHp9g1Kx/FTGz6/4WPCxE7tKXiJ7zCmQpbrKpdm4b/I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825975; c=relaxed/simple; bh=mUjvpAeTpGJyMFVZT/pxpk0GgjIRq8H8Be86vHY4bXQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=d/AVgl8l4KbCIaJpaDwbgxN9aQ8qTvfPzg8w97FPdiFD35PyxQT+RUOfU6/rYBWjFPQNg1MNDjKx1AgAL+ZduyW+oVULdMbWPIULdDsMLHW6j08VZxkX6puDZzlDb1eWBLTa8QF7+jSP5j/zzlnysYL5a2r/uozuu1gzPquajJA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637r-0002Hb-4d; Tue, 07 Oct 2025 10:32:51 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:31:57 +0200 Subject: [PATCH 04/16] media: rockchip: rga: move hw specific parts to a dedicated struct Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-4-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org In preparation for the RGA3 unit, move RGA2 specific parts from rga.c to rga-hw.c and create a struct to reference the RGA2 specific functions and formats. This also allows to remove the rga-hw.h reference from the include list of the rga driver. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-hw.c | 183 ++++++++++++++++++++- drivers/media/platform/rockchip/rga/rga-hw.h | 3 - drivers/media/platform/rockchip/rga/rga.c | 228 +++++------------------= ---- drivers/media/platform/rockchip/rga/rga.h | 23 ++- 4 files changed, 242 insertions(+), 195 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/p= latform/rockchip/rga/rga-hw.c index 43ed742a164929927001ef8e8925a29eb93615b2..871fe8c787c8d8dbd55c111c3fb= a3953d4debf02 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.c +++ b/drivers/media/platform/rockchip/rga/rga-hw.c @@ -437,8 +437,8 @@ static void rga_cmd_set(struct rga_ctx *ctx, PAGE_SIZE, DMA_BIDIRECTIONAL); } =20 -void rga_hw_start(struct rockchip_rga *rga, - struct rga_vb_buffer *src, struct rga_vb_buffer *dst) +static void rga_hw_start(struct rockchip_rga *rga, + struct rga_vb_buffer *src, struct rga_vb_buffer *dst) { struct rga_ctx *ctx =3D rga->curr; =20 @@ -452,3 +452,182 @@ void rga_hw_start(struct rockchip_rga *rga, =20 rga_write(rga, RGA_CMD_CTRL, 0x1); } + +static bool rga_handle_irq(struct rockchip_rga *rga) +{ + int intr; + + intr =3D rga_read(rga, RGA_INT) & 0xf; + + rga_mod(rga, RGA_INT, intr << 4, 0xf << 4); + + return intr & 0x04; +} + +static void rga_get_version(struct rockchip_rga *rga) +{ + rga->version.major =3D (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF; + rga->version.minor =3D (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F; +} + +static struct rga_fmt formats[] =3D { + { + .fourcc =3D V4L2_PIX_FMT_ARGB32, + .color_swap =3D RGA_COLOR_ALPHA_SWAP, + .hw_format =3D RGA_COLOR_FMT_ABGR8888, + .depth =3D 32, + .uv_factor =3D 1, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_ABGR32, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_ABGR8888, + .depth =3D 32, + .uv_factor =3D 1, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_XBGR32, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_XBGR8888, + .depth =3D 32, + .uv_factor =3D 1, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_RGB24, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_RGB888, + .depth =3D 24, + .uv_factor =3D 1, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_BGR24, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_RGB888, + .depth =3D 24, + .uv_factor =3D 1, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_ARGB444, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_ABGR4444, + .depth =3D 16, + .uv_factor =3D 1, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_ARGB555, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_ABGR1555, + .depth =3D 16, + .uv_factor =3D 1, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_RGB565, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_BGR565, + .depth =3D 16, + .uv_factor =3D 1, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV21, + .color_swap =3D RGA_COLOR_UV_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420SP, + .depth =3D 12, + .uv_factor =3D 4, + .y_div =3D 2, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV61, + .color_swap =3D RGA_COLOR_UV_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV422SP, + .depth =3D 16, + .uv_factor =3D 2, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV12, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420SP, + .depth =3D 12, + .uv_factor =3D 4, + .y_div =3D 2, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV12M, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420SP, + .depth =3D 12, + .uv_factor =3D 4, + .y_div =3D 2, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV16, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV422SP, + .depth =3D 16, + .uv_factor =3D 2, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_YUV420, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420P, + .depth =3D 12, + .uv_factor =3D 4, + .y_div =3D 2, + .x_div =3D 2, + }, + { + .fourcc =3D V4L2_PIX_FMT_YUV422P, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV422P, + + .depth =3D 16, + .uv_factor =3D 2, + .y_div =3D 1, + .x_div =3D 2, + }, + { + .fourcc =3D V4L2_PIX_FMT_YVU420, + .color_swap =3D RGA_COLOR_UV_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420P, + .depth =3D 12, + .uv_factor =3D 4, + .y_div =3D 2, + .x_div =3D 2, + }, +}; + +const struct rga_hw rga2_hw =3D { + .formats =3D formats, + .num_formats =3D ARRAY_SIZE(formats), + .cmdbuf_size =3D RGA_CMDBUF_SIZE, + .min_width =3D MIN_WIDTH, + .max_width =3D MAX_WIDTH, + .min_height =3D MIN_HEIGHT, + .max_height =3D MAX_HEIGHT, + + .start =3D rga_hw_start, + .handle_irq =3D rga_handle_irq, + .get_version =3D rga_get_version, +}; diff --git a/drivers/media/platform/rockchip/rga/rga-hw.h b/drivers/media/p= latform/rockchip/rga/rga-hw.h index cc6bd7f5b0300364948fd15109c643199d94e5de..1f52fbfad5fb3b8b773f7f03be0= 603170c5189f6 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.h +++ b/drivers/media/platform/rockchip/rga/rga-hw.h @@ -15,9 +15,6 @@ #define MIN_WIDTH 34 #define MIN_HEIGHT 34 =20 -#define DEFAULT_WIDTH 100 -#define DEFAULT_HEIGHT 100 - #define RGA_TIMEOUT 500 =20 /* Registers address */ diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index 3cb7ce470c47e39d694e8176875a75fad2717f96..32d24cdf17e9db38541d2b1615c= 6337def9362c6 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -25,7 +25,6 @@ #include #include =20 -#include "rga-hw.h" #include "rga.h" =20 static int debug; @@ -47,7 +46,7 @@ static void device_run(void *prv) =20 dst =3D v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); =20 - rga_hw_start(rga, vb_to_rga(src), vb_to_rga(dst)); + rga->hw->start(rga, vb_to_rga(src), vb_to_rga(dst)); =20 spin_unlock_irqrestore(&rga->ctrl_lock, flags); } @@ -55,13 +54,8 @@ static void device_run(void *prv) static irqreturn_t rga_isr(int irq, void *prv) { struct rockchip_rga *rga =3D prv; - int intr; =20 - intr =3D rga_read(rga, RGA_INT) & 0xf; - - rga_mod(rga, RGA_INT, intr << 4, 0xf << 4); - - if (intr & 0x04) { + if (rga->hw->handle_irq(rga)) { struct vb2_v4l2_buffer *src, *dst; struct rga_ctx *ctx =3D rga->curr; =20 @@ -184,177 +178,17 @@ static int rga_setup_ctrls(struct rga_ctx *ctx) return 0; } =20 -static struct rga_fmt formats[] =3D { - { - .fourcc =3D V4L2_PIX_FMT_ARGB32, - .color_swap =3D RGA_COLOR_ALPHA_SWAP, - .hw_format =3D RGA_COLOR_FMT_ABGR8888, - .depth =3D 32, - .uv_factor =3D 1, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_ABGR32, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_ABGR8888, - .depth =3D 32, - .uv_factor =3D 1, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_XBGR32, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_XBGR8888, - .depth =3D 32, - .uv_factor =3D 1, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_RGB24, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_RGB888, - .depth =3D 24, - .uv_factor =3D 1, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_BGR24, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_RGB888, - .depth =3D 24, - .uv_factor =3D 1, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_ARGB444, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_ABGR4444, - .depth =3D 16, - .uv_factor =3D 1, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_ARGB555, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_ABGR1555, - .depth =3D 16, - .uv_factor =3D 1, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_RGB565, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_BGR565, - .depth =3D 16, - .uv_factor =3D 1, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV21, - .color_swap =3D RGA_COLOR_UV_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420SP, - .depth =3D 12, - .uv_factor =3D 4, - .y_div =3D 2, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV61, - .color_swap =3D RGA_COLOR_UV_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV422SP, - .depth =3D 16, - .uv_factor =3D 2, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV12, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420SP, - .depth =3D 12, - .uv_factor =3D 4, - .y_div =3D 2, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV12M, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420SP, - .depth =3D 12, - .uv_factor =3D 4, - .y_div =3D 2, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV16, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV422SP, - .depth =3D 16, - .uv_factor =3D 2, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_YUV420, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420P, - .depth =3D 12, - .uv_factor =3D 4, - .y_div =3D 2, - .x_div =3D 2, - }, - { - .fourcc =3D V4L2_PIX_FMT_YUV422P, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV422P, - .depth =3D 16, - .uv_factor =3D 2, - .y_div =3D 1, - .x_div =3D 2, - }, - { - .fourcc =3D V4L2_PIX_FMT_YVU420, - .color_swap =3D RGA_COLOR_UV_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420P, - .depth =3D 12, - .uv_factor =3D 4, - .y_div =3D 2, - .x_div =3D 2, - }, -}; - -#define NUM_FORMATS ARRAY_SIZE(formats) - -static struct rga_fmt *rga_fmt_find(u32 pixelformat) +static struct rga_fmt *rga_fmt_find(struct rockchip_rga *rga, u32 pixelfor= mat) { unsigned int i; =20 - for (i =3D 0; i < NUM_FORMATS; i++) { - if (formats[i].fourcc =3D=3D pixelformat) - return &formats[i]; + for (i =3D 0; i < rga->hw->num_formats; i++) { + if (rga->hw->formats[i].fourcc =3D=3D pixelformat) + return &rga->hw->formats[i]; } return NULL; } =20 -static struct rga_frame def_frame =3D { - .width =3D DEFAULT_WIDTH, - .height =3D DEFAULT_HEIGHT, - .colorspace =3D V4L2_COLORSPACE_DEFAULT, - .crop.left =3D 0, - .crop.top =3D 0, - .crop.width =3D DEFAULT_WIDTH, - .crop.height =3D DEFAULT_HEIGHT, - .fmt =3D &formats[0], -}; - struct rga_frame *rga_get_frame(struct rga_ctx *ctx, enum v4l2_buf_type ty= pe) { if (V4L2_TYPE_IS_OUTPUT(type)) @@ -369,6 +203,19 @@ static int rga_open(struct file *file) struct rockchip_rga *rga =3D video_drvdata(file); struct rga_ctx *ctx =3D NULL; int ret =3D 0; + struct rga_frame def_frame =3D { + .width =3D clamp(DEFAULT_WIDTH, rga->hw->min_width, rga->hw->max_width), + .height =3D clamp(DEFAULT_HEIGHT, rga->hw->min_height, rga->hw->max_heig= ht), + .colorspace =3D V4L2_COLORSPACE_DEFAULT, + .crop.left =3D 0, + .crop.top =3D 0, + .crop.width =3D clamp(DEFAULT_WIDTH, rga->hw->min_width, rga->hw->max_wi= dth), + .crop.height =3D clamp(DEFAULT_HEIGHT, rga->hw->min_height, rga->hw->max= _height), + .fmt =3D &rga->hw->formats[0], + }; + + def_frame.stride =3D (def_frame.width * def_frame.fmt->depth) >> 3; + def_frame.size =3D def_frame.stride * def_frame.height; =20 ctx =3D kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -448,12 +295,13 @@ vidioc_querycap(struct file *file, void *priv, struct= v4l2_capability *cap) =20 static int vidioc_enum_fmt(struct file *file, void *priv, struct v4l2_fmtd= esc *f) { + struct rockchip_rga *rga =3D video_drvdata(file); struct rga_fmt *fmt; =20 - if (f->index >=3D NUM_FORMATS) + if (f->index >=3D rga->hw->num_formats) return -EINVAL; =20 - fmt =3D &formats[f->index]; + fmt =3D &rga->hw->formats[f->index]; f->pixelformat =3D fmt->fourcc; =20 return 0; @@ -504,16 +352,18 @@ static int vidioc_g_fmt(struct file *file, void *priv= , struct v4l2_format *f) static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_forma= t *f) { struct v4l2_pix_format_mplane *pix_fmt =3D &f->fmt.pix_mp; + struct rockchip_rga *rga =3D video_drvdata(file); + const struct rga_hw *hw =3D rga->hw; struct rga_fmt *fmt; =20 - fmt =3D rga_fmt_find(pix_fmt->pixelformat); + fmt =3D rga_fmt_find(rga, pix_fmt->pixelformat); if (!fmt) - fmt =3D &formats[0]; + fmt =3D &hw->formats[0]; =20 pix_fmt->width =3D clamp(pix_fmt->width, - (u32)MIN_WIDTH, (u32)MAX_WIDTH); + hw->min_width, hw->max_width); pix_fmt->height =3D clamp(pix_fmt->height, - (u32)MIN_HEIGHT, (u32)MAX_HEIGHT); + hw->min_height, hw->max_height); =20 v4l2_fill_pixfmt_mp(pix_fmt, fmt->fourcc, pix_fmt->width, pix_fmt->height= ); align_pixfmt(pix_fmt); @@ -551,7 +401,7 @@ static int vidioc_s_fmt(struct file *file, void *priv, = struct v4l2_format *f) frm->size =3D 0; for (i =3D 0; i < pix_fmt->num_planes; i++) frm->size +=3D pix_fmt->plane_fmt[i].sizeimage; - frm->fmt =3D rga_fmt_find(pix_fmt->pixelformat); + frm->fmt =3D rga_fmt_find(rga, pix_fmt->pixelformat); frm->stride =3D pix_fmt->plane_fmt[0].bytesperline; frm->colorspace =3D pix_fmt->colorspace; =20 @@ -672,7 +522,7 @@ static int vidioc_s_selection(struct file *file, void *= priv, =20 if (s->r.left + s->r.width > f->width || s->r.top + s->r.height > f->height || - s->r.width < MIN_WIDTH || s->r.height < MIN_HEIGHT) { + s->r.width < rga->hw->min_width || s->r.height < rga->hw->min_height)= { v4l2_dbg(debug, 1, &rga->v4l2_dev, "unsupported crop value.\n"); return -EINVAL; } @@ -781,6 +631,10 @@ static int rga_probe(struct platform_device *pdev) if (!rga) return -ENOMEM; =20 + rga->hw =3D of_device_get_match_data(&pdev->dev); + if (!rga->hw) + return dev_err_probe(&pdev->dev, -ENODEV, "failed to get match data\n"); + rga->dev =3D &pdev->dev; spin_lock_init(&rga->ctrl_lock); mutex_init(&rga->mutex); @@ -844,8 +698,7 @@ static int rga_probe(struct platform_device *pdev) if (ret < 0) goto rel_m2m; =20 - rga->version.major =3D (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF; - rga->version.minor =3D (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F; + rga->hw->get_version(rga); =20 v4l2_info(&rga->v4l2_dev, "HW Version: 0x%02x.%02x\n", rga->version.major, rga->version.minor); @@ -853,7 +706,7 @@ static int rga_probe(struct platform_device *pdev) pm_runtime_put(rga->dev); =20 /* Create CMD buffer */ - rga->cmdbuf_virt =3D dma_alloc_attrs(rga->dev, RGA_CMDBUF_SIZE, + rga->cmdbuf_virt =3D dma_alloc_attrs(rga->dev, rga->hw->cmdbuf_size, &rga->cmdbuf_phy, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!rga->cmdbuf_virt) { @@ -861,9 +714,6 @@ static int rga_probe(struct platform_device *pdev) goto rel_m2m; } =20 - def_frame.stride =3D (def_frame.width * def_frame.fmt->depth) >> 3; - def_frame.size =3D def_frame.stride * def_frame.height; - ret =3D video_register_device(vfd, VFL_TYPE_VIDEO, -1); if (ret) { v4l2_err(&rga->v4l2_dev, "Failed to register video device\n"); @@ -876,7 +726,7 @@ static int rga_probe(struct platform_device *pdev) return 0; =20 free_dma: - dma_free_attrs(rga->dev, RGA_CMDBUF_SIZE, rga->cmdbuf_virt, + dma_free_attrs(rga->dev, rga->hw->cmdbuf_size, rga->cmdbuf_virt, rga->cmdbuf_phy, DMA_ATTR_WRITE_COMBINE); rel_m2m: v4l2_m2m_release(rga->m2m_dev); @@ -894,7 +744,7 @@ static void rga_remove(struct platform_device *pdev) { struct rockchip_rga *rga =3D platform_get_drvdata(pdev); =20 - dma_free_attrs(rga->dev, RGA_CMDBUF_SIZE, rga->cmdbuf_virt, + dma_free_attrs(rga->dev, rga->hw->cmdbuf_size, rga->cmdbuf_virt, rga->cmdbuf_phy, DMA_ATTR_WRITE_COMBINE); =20 v4l2_info(&rga->v4l2_dev, "Removing\n"); @@ -930,9 +780,11 @@ static const struct dev_pm_ops rga_pm =3D { static const struct of_device_id rockchip_rga_match[] =3D { { .compatible =3D "rockchip,rk3288-rga", + .data =3D &rga2_hw, }, { .compatible =3D "rockchip,rk3399-rga", + .data =3D &rga2_hw, }, {}, }; diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index a922fac0c01a3627f5149c78a1560341428a4fc1..61a00f56ce9b31968881e22bef8= 73612b62e21d9 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -14,6 +14,9 @@ =20 #define RGA_NAME "rockchip-rga" =20 +#define DEFAULT_WIDTH 100 +#define DEFAULT_HEIGHT 100 + struct rga_fmt { u32 fourcc; int depth; @@ -74,6 +77,8 @@ static inline struct rga_ctx *file_to_rga_ctx(struct file= *filp) return container_of(file_to_v4l2_fh(filp), struct rga_ctx, fh); } =20 +struct rga_hw; + struct rockchip_rga { struct v4l2_device v4l2_dev; struct v4l2_m2m_dev *m2m_dev; @@ -93,6 +98,8 @@ struct rockchip_rga { struct rga_ctx *curr; dma_addr_t cmdbuf_phy; void *cmdbuf_virt; + + const struct rga_hw *hw; }; =20 struct rga_addr_offset { @@ -143,7 +150,19 @@ static inline void rga_mod(struct rockchip_rga *rga, u= 32 reg, u32 val, u32 mask) rga_write(rga, reg, temp); }; =20 -void rga_hw_start(struct rockchip_rga *rga, - struct rga_vb_buffer *src, struct rga_vb_buffer *dst); +struct rga_hw { + struct rga_fmt *formats; + u32 num_formats; + size_t cmdbuf_size; + u32 min_width, min_height; + u32 max_width, max_height; + + void (*start)(struct rockchip_rga *rga, + struct rga_vb_buffer *src, struct rga_vb_buffer *dst); + bool (*handle_irq)(struct rockchip_rga *rga); + void (*get_version)(struct rockchip_rga *rga); +}; + +extern const struct rga_hw rga2_hw; =20 #endif --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A79B2D5A0C for ; Tue, 7 Oct 2025 08:32:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825976; cv=none; b=Y0TiaXW5Fmzb8G4wM0HwqJLmw+KBny8YAOWSKhro3DYdO1yvGCZ18uUEZEOhlznkj1QvlYWF2ztmFiLNvZBXnvaW0jOMKTBXeLd+ZUj+1aDHqxxloRbL0aGtFrbdhsT48OGSUKlkbHAm/nfmtb491ZKShN68dMOjkkThEnUofKs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825976; c=relaxed/simple; bh=FE/v7WPfFFkRfOu5bkbgFlAf0Iqzl95j48vKzQ3Ftvw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-5-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org In preparation of the RGA3 support add a filed to the rga_hw struct to specify the desired card type value. This allows the user to differentiate the RGA2 and RGA3 video device nodes. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-hw.c | 1 + drivers/media/platform/rockchip/rga/rga.c | 4 +++- drivers/media/platform/rockchip/rga/rga.h | 1 + 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/p= latform/rockchip/rga/rga-hw.c index 871fe8c787c8d8dbd55c111c3fba3953d4debf02..a44befe4054d19e3b921c0827af= 4d36cf077e61f 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.c +++ b/drivers/media/platform/rockchip/rga/rga-hw.c @@ -619,6 +619,7 @@ static struct rga_fmt formats[] =3D { }; =20 const struct rga_hw rga2_hw =3D { + .card_type =3D "rga2", .formats =3D formats, .num_formats =3D ARRAY_SIZE(formats), .cmdbuf_size =3D RGA_CMDBUF_SIZE, diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index 32d24cdf17e9db38541d2b1615c6337def9362c6..ce55b48ef9fa8fbb2b265455cc5= 59a4216609d4f 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -286,8 +286,10 @@ static const struct v4l2_file_operations rga_fops =3D { static int vidioc_querycap(struct file *file, void *priv, struct v4l2_capability *cap) { + struct rockchip_rga *rga =3D video_drvdata(file); + strscpy(cap->driver, RGA_NAME, sizeof(cap->driver)); - strscpy(cap->card, "rockchip-rga", sizeof(cap->card)); + strscpy(cap->card, rga->hw->card_type, sizeof(cap->card)); strscpy(cap->bus_info, "platform:rga", sizeof(cap->bus_info)); =20 return 0; diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index 61a00f56ce9b31968881e22bef873612b62e21d9..257267738d5d179d9ec4fcb5c87= 29783c9b713de 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -151,6 +151,7 @@ static inline void rga_mod(struct rockchip_rga *rga, u3= 2 reg, u32 val, u32 mask) }; =20 struct rga_hw { + const char *card_type; struct rga_fmt *formats; u32 num_formats; size_t cmdbuf_size; --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BEB962D641A for ; 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dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637s-0002Hb-Oh; Tue, 07 Oct 2025 10:32:52 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:31:59 +0200 Subject: [PATCH 06/16] media: rockchip: rga: change offset to dma_addresses Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-6-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Change the offset to dma_addresses, as the current naming is misleading. The offset naming comes from the fact that it references the offset in the mapped iommu address space. But from the hardware point of view this is an address, as also pointed out by the register naming (e.g. RGA_DST_Y_RGB_BASE_ADDR). Therefore also change the type to dma_addr_t, as with an external iommu driver this would also be the correct type. This change is a preparation for the RGA3 support, which uses an external iommu and therefore just gets an dma_addr_t for each buffer. The field renaming allows to reuse the existing fields of rga_vb_buffer to store these values. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-buf.c | 12 +-- drivers/media/platform/rockchip/rga/rga-hw.c | 105 +++++++++++++---------= ---- drivers/media/platform/rockchip/rga/rga.h | 12 +-- 3 files changed, 64 insertions(+), 65 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga-buf.c b/drivers/media/= platform/rockchip/rga/rga-buf.c index b5e6b1b527ca81721c64d96d984d5e981449c237..0d188b3176cf3e175e865db5cfa= 26d565bf846ec 100644 --- a/drivers/media/platform/rockchip/rga/rga-buf.c +++ b/drivers/media/platform/rockchip/rga/rga-buf.c @@ -118,7 +118,7 @@ static int rga_buf_prepare(struct vb2_buffer *vb) size_t curr_desc =3D 0; int i; const struct v4l2_format_info *info; - unsigned int offsets[VIDEO_MAX_PLANES]; + unsigned int dma_addrs[VIDEO_MAX_PLANES]; =20 if (IS_ERR(f)) return PTR_ERR(f); @@ -142,18 +142,18 @@ static int rga_buf_prepare(struct vb2_buffer *vb) "Failed to map video buffer to RGA\n"); return n_desc; } - offsets[i] =3D curr_desc << PAGE_SHIFT; + dma_addrs[i] =3D curr_desc << PAGE_SHIFT; curr_desc +=3D n_desc; } =20 /* Fill the remaining planes */ info =3D v4l2_format_info(f->fmt->fourcc); for (i =3D info->mem_planes; i < info->comp_planes; i++) - offsets[i] =3D get_plane_offset(f, info, i); + dma_addrs[i] =3D dma_addrs[0] + get_plane_offset(f, info, i); =20 - rbuf->offset.y_off =3D offsets[0]; - rbuf->offset.u_off =3D offsets[1]; - rbuf->offset.v_off =3D offsets[2]; + rbuf->dma_addrs.y_addr =3D dma_addrs[0]; + rbuf->dma_addrs.u_addr =3D dma_addrs[1]; + rbuf->dma_addrs.v_addr =3D dma_addrs[2]; =20 return 0; } diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/p= latform/rockchip/rga/rga-hw.c index a44befe4054d19e3b921c0827af4d36cf077e61f..f3aef0b5ce25870764bd59f4241= e2bda332bbd1f 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.c +++ b/drivers/media/platform/rockchip/rga/rga-hw.c @@ -16,11 +16,11 @@ enum e_rga_start_pos { RB =3D 3, }; =20 -struct rga_corners_addr_offset { - struct rga_addr_offset left_top; - struct rga_addr_offset right_top; - struct rga_addr_offset left_bottom; - struct rga_addr_offset right_bottom; +struct rga_corners_addrs { + struct rga_addrs left_top; + struct rga_addrs right_top; + struct rga_addrs left_bottom; + struct rga_addrs right_bottom; }; =20 static unsigned int rga_get_scaling(unsigned int src, unsigned int dst) @@ -36,48 +36,47 @@ static unsigned int rga_get_scaling(unsigned int src, u= nsigned int dst) return (src > dst) ? ((dst << 16) / src) : ((src << 16) / dst); } =20 -static struct rga_corners_addr_offset -rga_get_addr_offset(struct rga_frame *frm, struct rga_addr_offset *offset, - unsigned int x, unsigned int y, unsigned int w, unsigned int h) +static struct rga_corners_addrs +rga_get_corner_addrs(struct rga_frame *frm, struct rga_addrs *addrs, + unsigned int x, unsigned int y, unsigned int w, unsigned int h) { - struct rga_corners_addr_offset offsets; - struct rga_addr_offset *lt, *lb, *rt, *rb; + struct rga_corners_addrs corner_addrs; + struct rga_addrs *lt, *lb, *rt, *rb; unsigned int x_div =3D 0, y_div =3D 0, uv_stride =3D 0, pixel_width =3D 0; =20 - lt =3D &offsets.left_top; - lb =3D &offsets.left_bottom; - rt =3D &offsets.right_top; - rb =3D &offsets.right_bottom; + lt =3D &corner_addrs.left_top; + lb =3D &corner_addrs.left_bottom; + rt =3D &corner_addrs.right_top; + rb =3D &corner_addrs.right_bottom; =20 x_div =3D frm->fmt->x_div; y_div =3D frm->fmt->y_div; uv_stride =3D frm->stride / x_div; pixel_width =3D frm->stride / frm->width; =20 - lt->y_off =3D offset->y_off + y * frm->stride + x * pixel_width; - lt->u_off =3D offset->u_off + (y / y_div) * uv_stride + x / x_div; - lt->v_off =3D offset->v_off + (y / y_div) * uv_stride + x / x_div; + lt->y_addr =3D addrs->y_addr + y * frm->stride + x * pixel_width; + lt->u_addr =3D addrs->u_addr + (y / y_div) * uv_stride + x / x_div; + lt->v_addr =3D addrs->v_addr + (y / y_div) * uv_stride + x / x_div; =20 - lb->y_off =3D lt->y_off + (h - 1) * frm->stride; - lb->u_off =3D lt->u_off + (h / y_div - 1) * uv_stride; - lb->v_off =3D lt->v_off + (h / y_div - 1) * uv_stride; + lb->y_addr =3D lt->y_addr + (h - 1) * frm->stride; + lb->u_addr =3D lt->u_addr + (h / y_div - 1) * uv_stride; + lb->v_addr =3D lt->v_addr + (h / y_div - 1) * uv_stride; =20 - rt->y_off =3D lt->y_off + (w - 1) * pixel_width; - rt->u_off =3D lt->u_off + w / x_div - 1; - rt->v_off =3D lt->v_off + w / x_div - 1; + rt->y_addr =3D lt->y_addr + (w - 1) * pixel_width; + rt->u_addr =3D lt->u_addr + w / x_div - 1; + rt->v_addr =3D lt->v_addr + w / x_div - 1; =20 - rb->y_off =3D lb->y_off + (w - 1) * pixel_width; - rb->u_off =3D lb->u_off + w / x_div - 1; - rb->v_off =3D lb->v_off + w / x_div - 1; + rb->y_addr =3D lb->y_addr + (w - 1) * pixel_width; + rb->u_addr =3D lb->u_addr + w / x_div - 1; + rb->v_addr =3D lb->v_addr + w / x_div - 1; =20 - return offsets; + return corner_addrs; } =20 -static struct rga_addr_offset *rga_lookup_draw_pos(struct - rga_corners_addr_offset - * offsets, u32 rotate_mode, - u32 mirr_mode) +static struct rga_addrs *rga_lookup_draw_pos(struct rga_corners_addrs *cor= ner_addrs, + u32 rotate_mode, + u32 mirr_mode) { static enum e_rga_start_pos rot_mir_point_matrix[4][4] =3D { { @@ -94,18 +93,18 @@ static struct rga_addr_offset *rga_lookup_draw_pos(stru= ct }, }; =20 - if (!offsets) + if (!corner_addrs) return NULL; =20 switch (rot_mir_point_matrix[rotate_mode][mirr_mode]) { case LT: - return &offsets->left_top; + return &corner_addrs->left_top; case LB: - return &offsets->left_bottom; + return &corner_addrs->left_bottom; case RT: - return &offsets->right_top; + return &corner_addrs->right_top; case RB: - return &offsets->right_bottom; + return &corner_addrs->right_bottom; } =20 return NULL; @@ -310,9 +309,9 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx) } =20 static void rga_cmd_set_src_info(struct rga_ctx *ctx, - struct rga_addr_offset *offset) + struct rga_addrs *addrs) { - struct rga_corners_addr_offset src_offsets; + struct rga_corners_addrs src_corner_addrs; struct rockchip_rga *rga =3D ctx->rga; u32 *dest =3D rga->cmdbuf_virt; unsigned int src_h, src_w, src_x, src_y; @@ -325,22 +324,22 @@ static void rga_cmd_set_src_info(struct rga_ctx *ctx, /* * Calculate the source framebuffer base address with offset pixel. */ - src_offsets =3D rga_get_addr_offset(&ctx->in, offset, - src_x, src_y, src_w, src_h); + src_corner_addrs =3D rga_get_corner_addrs(&ctx->in, addrs, + src_x, src_y, src_w, src_h); =20 dest[(RGA_SRC_Y_RGB_BASE_ADDR - RGA_MODE_BASE_REG) >> 2] =3D - src_offsets.left_top.y_off; + src_corner_addrs.left_top.y_addr; dest[(RGA_SRC_CB_BASE_ADDR - RGA_MODE_BASE_REG) >> 2] =3D - src_offsets.left_top.u_off; + src_corner_addrs.left_top.u_addr; dest[(RGA_SRC_CR_BASE_ADDR - RGA_MODE_BASE_REG) >> 2] =3D - src_offsets.left_top.v_off; + src_corner_addrs.left_top.v_addr; } =20 static void rga_cmd_set_dst_info(struct rga_ctx *ctx, - struct rga_addr_offset *offset) + struct rga_addrs *addrs) { - struct rga_addr_offset *dst_offset; - struct rga_corners_addr_offset offsets; + struct rga_addrs *dst_addrs; + struct rga_corners_addrs corner_addrs; struct rockchip_rga *rga =3D ctx->rga; u32 *dest =3D rga->cmdbuf_virt; unsigned int dst_h, dst_w, dst_x, dst_y; @@ -375,15 +374,15 @@ static void rga_cmd_set_dst_info(struct rga_ctx *ctx, /* * Configure the dest framebuffer base address with pixel offset. */ - offsets =3D rga_get_addr_offset(&ctx->out, offset, dst_x, dst_y, dst_w, d= st_h); - dst_offset =3D rga_lookup_draw_pos(&offsets, rot_mode, mir_mode); + corner_addrs =3D rga_get_corner_addrs(&ctx->out, addrs, dst_x, dst_y, dst= _w, dst_h); + dst_addrs =3D rga_lookup_draw_pos(&corner_addrs, rot_mode, mir_mode); =20 dest[(RGA_DST_Y_RGB_BASE_ADDR - RGA_MODE_BASE_REG) >> 2] =3D - dst_offset->y_off; + dst_addrs->y_addr; dest[(RGA_DST_CB_BASE_ADDR - RGA_MODE_BASE_REG) >> 2] =3D - dst_offset->u_off; + dst_addrs->u_addr; dest[(RGA_DST_CR_BASE_ADDR - RGA_MODE_BASE_REG) >> 2] =3D - dst_offset->v_off; + dst_addrs->v_addr; } =20 static void rga_cmd_set_mode(struct rga_ctx *ctx) @@ -426,8 +425,8 @@ static void rga_cmd_set(struct rga_ctx *ctx, rga_cmd_set_dst_addr(ctx, dst->dma_desc_pa); rga_cmd_set_mode(ctx); =20 - rga_cmd_set_src_info(ctx, &src->offset); - rga_cmd_set_dst_info(ctx, &dst->offset); + rga_cmd_set_src_info(ctx, &src->dma_addrs); + rga_cmd_set_dst_info(ctx, &dst->dma_addrs); rga_cmd_set_trans_info(ctx); =20 rga_write(rga, RGA_CMD_BASE, rga->cmdbuf_phy); diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index 257267738d5d179d9ec4fcb5c8729783c9b713de..fa47cb35f2623fc5226cb23d1d1= d793d5dcd1dc7 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -102,10 +102,10 @@ struct rockchip_rga { const struct rga_hw *hw; }; =20 -struct rga_addr_offset { - unsigned int y_off; - unsigned int u_off; - unsigned int v_off; +struct rga_addrs { + dma_addr_t y_addr; + dma_addr_t u_addr; + dma_addr_t v_addr; }; =20 struct rga_vb_buffer { @@ -117,8 +117,8 @@ struct rga_vb_buffer { dma_addr_t dma_desc_pa; size_t n_desc; =20 - /* Plane offsets of this buffer into the mapping */ - struct rga_addr_offset offset; + /* Plane DMA addresses after the MMU mapping of the buffer */ + struct rga_addrs dma_addrs; }; =20 static inline struct rga_vb_buffer *vb_to_rga(struct vb2_v4l2_buffer *vb) --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 705DC2D6E4B for ; Tue, 7 Oct 2025 08:32:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; 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spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637t-0002Hb-Ix; Tue, 07 Oct 2025 10:32:53 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:32:00 +0200 Subject: [PATCH 07/16] media: rockchip: rga: support external iommus Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-7-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org In preparation for the RGA3 add support for external iommus. This is a transition step to just disable the RGA2 specific mmu table setup code. Currently a simple rga_hw struct field is used to set the internal iommu. But to handle the case of more sophisticated detection mechanisms (e.g. check for an iommu property in the device tree), it is abstracted by an inline function. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-buf.c | 46 ++++++++++++++++-------= ---- drivers/media/platform/rockchip/rga/rga-hw.c | 1 + drivers/media/platform/rockchip/rga/rga.c | 11 +++++-- drivers/media/platform/rockchip/rga/rga.h | 6 ++++ 4 files changed, 43 insertions(+), 21 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga-buf.c b/drivers/media/= platform/rockchip/rga/rga-buf.c index 0d188b3176cf3e175e865db5cfa26d565bf846ec..26b66b0c7e008308c24433f061a= 738a3985484b6 100644 --- a/drivers/media/platform/rockchip/rga/rga-buf.c +++ b/drivers/media/platform/rockchip/rga/rga-buf.c @@ -12,6 +12,7 @@ #include #include #include +#include #include =20 #include "rga.h" @@ -79,14 +80,16 @@ static int rga_buf_init(struct vb2_buffer *vb) struct rga_frame *f =3D rga_get_frame(ctx, vb->vb2_queue->type); size_t n_desc =3D 0; =20 - n_desc =3D DIV_ROUND_UP(f->size, PAGE_SIZE); + if (rga_has_internal_iommu(rga)) { + n_desc =3D DIV_ROUND_UP(f->size, PAGE_SIZE); =20 - rbuf->n_desc =3D n_desc; - rbuf->dma_desc =3D dma_alloc_coherent(rga->dev, - rbuf->n_desc * sizeof(*rbuf->dma_desc), - &rbuf->dma_desc_pa, GFP_KERNEL); - if (!rbuf->dma_desc) - return -ENOMEM; + rbuf->n_desc =3D n_desc; + rbuf->dma_desc =3D dma_alloc_coherent(rga->dev, + rbuf->n_desc * sizeof(*rbuf->dma_desc), + &rbuf->dma_desc_pa, GFP_KERNEL); + if (!rbuf->dma_desc) + return -ENOMEM; + } =20 return 0; } @@ -133,17 +136,21 @@ static int rga_buf_prepare(struct vb2_buffer *vb) for (i =3D 0; i < vb->num_planes; i++) { vb2_set_plane_payload(vb, i, f->pix.plane_fmt[i].sizeimage); =20 - /* Create local MMU table for RGA */ - n_desc =3D fill_descriptors(&rbuf->dma_desc[curr_desc], - rbuf->n_desc - curr_desc, - vb2_dma_sg_plane_desc(vb, i)); - if (n_desc < 0) { - v4l2_err(&ctx->rga->v4l2_dev, - "Failed to map video buffer to RGA\n"); - return n_desc; + if (rga_has_internal_iommu(ctx->rga)) { + /* Create local MMU table for RGA */ + n_desc =3D fill_descriptors(&rbuf->dma_desc[curr_desc], + rbuf->n_desc - curr_desc, + vb2_dma_sg_plane_desc(vb, i)); + if (n_desc < 0) { + v4l2_err(&ctx->rga->v4l2_dev, + "Failed to map video buffer to RGA\n"); + return n_desc; + } + dma_addrs[i] =3D curr_desc << PAGE_SHIFT; + curr_desc +=3D n_desc; + } else { + dma_addrs[i] =3D vb2_dma_contig_plane_dma_addr(vb, i); } - dma_addrs[i] =3D curr_desc << PAGE_SHIFT; - curr_desc +=3D n_desc; } =20 /* Fill the remaining planes */ @@ -173,8 +180,9 @@ static void rga_buf_cleanup(struct vb2_buffer *vb) struct rga_ctx *ctx =3D vb2_get_drv_priv(vb->vb2_queue); struct rockchip_rga *rga =3D ctx->rga; =20 - dma_free_coherent(rga->dev, rbuf->n_desc * sizeof(*rbuf->dma_desc), - rbuf->dma_desc, rbuf->dma_desc_pa); + if (rga_has_internal_iommu(rga)) + dma_free_coherent(rga->dev, rbuf->n_desc * sizeof(*rbuf->dma_desc), + rbuf->dma_desc, rbuf->dma_desc_pa); } =20 static void rga_buf_return_buffers(struct vb2_queue *q, diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/p= latform/rockchip/rga/rga-hw.c index f3aef0b5ce25870764bd59f4241e2bda332bbd1f..04d72ecce7cdd47df8457b97c5e= c4cff9cd7430b 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.c +++ b/drivers/media/platform/rockchip/rga/rga-hw.c @@ -619,6 +619,7 @@ static struct rga_fmt formats[] =3D { =20 const struct rga_hw rga2_hw =3D { .card_type =3D "rga2", + .has_internal_iommu =3D true, .formats =3D formats, .num_formats =3D ARRAY_SIZE(formats), .cmdbuf_size =3D RGA_CMDBUF_SIZE, diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index ce55b48ef9fa8fbb2b265455cc559a4216609d4f..b8e4be3f9acd8a73a3d4e947aee= ef9095543fb49 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -23,6 +23,7 @@ #include #include #include +#include #include =20 #include "rga.h" @@ -95,13 +96,16 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct= vb2_queue *dst_vq) src_vq->io_modes =3D VB2_MMAP | VB2_DMABUF; src_vq->drv_priv =3D ctx; src_vq->ops =3D &rga_qops; - src_vq->mem_ops =3D &vb2_dma_sg_memops; + src_vq->mem_ops =3D &vb2_dma_contig_memops; src_vq->gfp_flags =3D __GFP_DMA32; src_vq->buf_struct_size =3D sizeof(struct rga_vb_buffer); src_vq->timestamp_flags =3D V4L2_BUF_FLAG_TIMESTAMP_COPY; src_vq->lock =3D &ctx->rga->mutex; src_vq->dev =3D ctx->rga->v4l2_dev.dev; =20 + if (rga_has_internal_iommu(ctx->rga)) + src_vq->mem_ops =3D &vb2_dma_sg_memops; + ret =3D vb2_queue_init(src_vq); if (ret) return ret; @@ -110,13 +114,16 @@ queue_init(void *priv, struct vb2_queue *src_vq, stru= ct vb2_queue *dst_vq) dst_vq->io_modes =3D VB2_MMAP | VB2_DMABUF; dst_vq->drv_priv =3D ctx; dst_vq->ops =3D &rga_qops; - dst_vq->mem_ops =3D &vb2_dma_sg_memops; + dst_vq->mem_ops =3D &vb2_dma_contig_memops; dst_vq->gfp_flags =3D __GFP_DMA32; dst_vq->buf_struct_size =3D sizeof(struct rga_vb_buffer); dst_vq->timestamp_flags =3D V4L2_BUF_FLAG_TIMESTAMP_COPY; dst_vq->lock =3D &ctx->rga->mutex; dst_vq->dev =3D ctx->rga->v4l2_dev.dev; =20 + if (rga_has_internal_iommu(ctx->rga)) + dst_vq->mem_ops =3D &vb2_dma_sg_memops; + return vb2_queue_init(dst_vq); } =20 diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index fa47cb35f2623fc5226cb23d1d1d793d5dcd1dc7..82ead58719f3baadb77575896ca= 2d430aa8e3dc6 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -152,6 +152,7 @@ static inline void rga_mod(struct rockchip_rga *rga, u3= 2 reg, u32 val, u32 mask) =20 struct rga_hw { const char *card_type; + bool has_internal_iommu; struct rga_fmt *formats; u32 num_formats; size_t cmdbuf_size; @@ -164,6 +165,11 @@ struct rga_hw { void (*get_version)(struct rockchip_rga *rga); }; =20 +static inline bool rga_has_internal_iommu(const struct rockchip_rga *rga) +{ + return rga->hw->has_internal_iommu; +} + extern const struct rga_hw rga2_hw; =20 #endif --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44C452571DA for ; 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dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637u-0002Hb-C4; Tue, 07 Oct 2025 10:32:54 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:32:01 +0200 Subject: [PATCH 08/16] media: rockchip: rga: remove size from rga_frame Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-8-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org The size member is only used for the mmu page table mapping. Therefore avoid storing the value and instead only calculate it in place. This also avoids the calculation entirely when an external iommu is used. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-buf.c | 6 +++++- drivers/media/platform/rockchip/rga/rga.c | 8 ++------ drivers/media/platform/rockchip/rga/rga.h | 1 - 3 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga-buf.c b/drivers/media/= platform/rockchip/rga/rga-buf.c index 26b66b0c7e008308c24433f061a738a3985484b6..e44fe870fb9e34aa93404b7a600= 22fe441adf8f9 100644 --- a/drivers/media/platform/rockchip/rga/rga-buf.c +++ b/drivers/media/platform/rockchip/rga/rga-buf.c @@ -79,9 +79,13 @@ static int rga_buf_init(struct vb2_buffer *vb) struct rockchip_rga *rga =3D ctx->rga; struct rga_frame *f =3D rga_get_frame(ctx, vb->vb2_queue->type); size_t n_desc =3D 0; + u32 size =3D 0; + u8 i; =20 if (rga_has_internal_iommu(rga)) { - n_desc =3D DIV_ROUND_UP(f->size, PAGE_SIZE); + for (i =3D 0; i < f->pix.num_planes; i++) + size +=3D f->pix.plane_fmt[i].sizeimage; + n_desc =3D DIV_ROUND_UP(size, PAGE_SIZE); =20 rbuf->n_desc =3D n_desc; rbuf->dma_desc =3D dma_alloc_coherent(rga->dev, diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index b8e4be3f9acd8a73a3d4e947aeeef9095543fb49..c5f25869d0cd08a794330954ec4= 14f0428b647d8 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -222,7 +222,6 @@ static int rga_open(struct file *file) }; =20 def_frame.stride =3D (def_frame.width * def_frame.fmt->depth) >> 3; - def_frame.size =3D def_frame.stride * def_frame.height; =20 ctx =3D kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -407,9 +406,6 @@ static int vidioc_s_fmt(struct file *file, void *priv, = struct v4l2_format *f) return PTR_ERR(frm); frm->width =3D pix_fmt->width; frm->height =3D pix_fmt->height; - frm->size =3D 0; - for (i =3D 0; i < pix_fmt->num_planes; i++) - frm->size +=3D pix_fmt->plane_fmt[i].sizeimage; frm->fmt =3D rga_fmt_find(rga, pix_fmt->pixelformat); frm->stride =3D pix_fmt->plane_fmt[0].bytesperline; frm->colorspace =3D pix_fmt->colorspace; @@ -423,10 +419,10 @@ static int vidioc_s_fmt(struct file *file, void *priv= , struct v4l2_format *f) frm->pix =3D *pix_fmt; =20 v4l2_dbg(debug, 1, &rga->v4l2_dev, - "[%s] fmt - %p4cc %dx%d (stride %d, sizeimage %d)\n", + "[%s] fmt - %p4cc %dx%d (stride %d)\n", V4L2_TYPE_IS_OUTPUT(f->type) ? "OUTPUT" : "CAPTURE", &frm->fmt->fourcc, frm->width, frm->height, - frm->stride, frm->size); + frm->stride); =20 for (i =3D 0; i < pix_fmt->num_planes; i++) { v4l2_dbg(debug, 1, &rga->v4l2_dev, diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index 82ead58719f3baadb77575896ca2d430aa8e3dc6..5aedda2f187e4bfef42c8755c4f= c4b1ee5453e8e 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -42,7 +42,6 @@ struct rga_frame { =20 /* Variables that can calculated once and reused */ u32 stride; - u32 size; }; =20 struct rga_dma_desc { --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F6232D77FF for ; Tue, 7 Oct 2025 08:32:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825979; cv=none; b=fCfpduOQG3gmDBH3OOHJjdQijSGzu9hgJhpmQYJzodIZbjLJGc25n8ulfSf3fmUsePmcXFbryXcgizTSwfywX6ca+UldDuDpuG2LHddyU4gXM2sCNqDIc5j+M3VAtuH+m/z9SEkYGG3jmVUechIdYoHUxMR9vsvgifXdxIGHXZI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825979; c=relaxed/simple; bh=uvBMgTCFe4PduWSyenflQ21dSqz1Y+X/m+6gHFwcchY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u2RWrsOzENsQFdSgkx6RABGCjBQKSsSydIEiQnpTyzXF4dsGfgOpGKamFPGXnAzcNVV9nUFy1+x/GK1EstP/QdCDAW3Bqi5GDLP30xv0sb9RY//1QRXUupO3Muj6TQefefu0PA5LPHg9fomzFTBobLpqQWDTEOh1bwDE4WeXVQs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637v-0002Hb-8G; Tue, 07 Oct 2025 10:32:55 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:32:02 +0200 Subject: [PATCH 09/16] media: rockchip: rga: remove stride from rga_frame Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-9-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Remove the stride variable from rga_frame. Despite the comment it didn't involve any calculation and is just a copy of the plane_fmt[0].bytesperline value. Therefore avoid this struct member and use the bytesperline value directly in the places where it is required. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-hw.c | 20 ++++++++++++-------- drivers/media/platform/rockchip/rga/rga.c | 5 +---- drivers/media/platform/rockchip/rga/rga.h | 3 --- 3 files changed, 13 insertions(+), 15 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/p= latform/rockchip/rga/rga-hw.c index 04d72ecce7cdd47df8457b97c5ec4cff9cd7430b..66b23c4a4cf1488ce42a7ab1901= daaaa55b28fe0 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.c +++ b/drivers/media/platform/rockchip/rga/rga-hw.c @@ -43,7 +43,7 @@ rga_get_corner_addrs(struct rga_frame *frm, struct rga_ad= drs *addrs, struct rga_corners_addrs corner_addrs; struct rga_addrs *lt, *lb, *rt, *rb; unsigned int x_div =3D 0, - y_div =3D 0, uv_stride =3D 0, pixel_width =3D 0; + y_div =3D 0, y_stride =3D 0, uv_stride =3D 0, pixel_width =3D 0; =20 lt =3D &corner_addrs.left_top; lb =3D &corner_addrs.left_bottom; @@ -52,14 +52,15 @@ rga_get_corner_addrs(struct rga_frame *frm, struct rga_= addrs *addrs, =20 x_div =3D frm->fmt->x_div; y_div =3D frm->fmt->y_div; - uv_stride =3D frm->stride / x_div; - pixel_width =3D frm->stride / frm->width; + y_stride =3D frm->pix.plane_fmt[0].bytesperline; + uv_stride =3D y_stride / x_div; + pixel_width =3D y_stride / frm->width; =20 - lt->y_addr =3D addrs->y_addr + y * frm->stride + x * pixel_width; + lt->y_addr =3D addrs->y_addr + y * y_stride + x * pixel_width; lt->u_addr =3D addrs->u_addr + (y / y_div) * uv_stride + x / x_div; lt->v_addr =3D addrs->v_addr + (y / y_div) * uv_stride + x / x_div; =20 - lb->y_addr =3D lt->y_addr + (h - 1) * frm->stride; + lb->y_addr =3D lt->y_addr + (h - 1) * y_stride; lb->u_addr =3D lt->u_addr + (h / y_div - 1) * uv_stride; lb->v_addr =3D lt->v_addr + (h / y_div - 1) * uv_stride; =20 @@ -163,6 +164,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx) union rga_src_act_info src_act_info; union rga_dst_vir_info dst_vir_info; union rga_dst_act_info dst_act_info; + u32 in_stride, out_stride; =20 src_h =3D ctx->in.crop.height; src_w =3D ctx->in.crop.width; @@ -285,13 +287,15 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ct= x) * Calculate the framebuffer virtual strides and active size, * note that the step of vir_stride / vir_width is 4 byte words */ - src_vir_info.data.vir_stride =3D ctx->in.stride >> 2; - src_vir_info.data.vir_width =3D ctx->in.stride >> 2; + in_stride =3D ctx->in.pix.plane_fmt[0].bytesperline; + src_vir_info.data.vir_stride =3D in_stride >> 2; + src_vir_info.data.vir_width =3D in_stride >> 2; =20 src_act_info.data.act_height =3D src_h - 1; src_act_info.data.act_width =3D src_w - 1; =20 - dst_vir_info.data.vir_stride =3D ctx->out.stride >> 2; + out_stride =3D ctx->out.pix.plane_fmt[0].bytesperline; + dst_vir_info.data.vir_stride =3D out_stride >> 2; dst_act_info.data.act_height =3D dst_h - 1; dst_act_info.data.act_width =3D dst_w - 1; =20 diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index c5f25869d0cd08a794330954ec414f0428b647d8..6e1a4a6dc6309a6d6d9a3aac0fe= 982e7200c96de 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -221,8 +221,6 @@ static int rga_open(struct file *file) .fmt =3D &rga->hw->formats[0], }; =20 - def_frame.stride =3D (def_frame.width * def_frame.fmt->depth) >> 3; - ctx =3D kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) return -ENOMEM; @@ -407,7 +405,6 @@ static int vidioc_s_fmt(struct file *file, void *priv, = struct v4l2_format *f) frm->width =3D pix_fmt->width; frm->height =3D pix_fmt->height; frm->fmt =3D rga_fmt_find(rga, pix_fmt->pixelformat); - frm->stride =3D pix_fmt->plane_fmt[0].bytesperline; frm->colorspace =3D pix_fmt->colorspace; =20 /* Reset crop settings */ @@ -422,7 +419,7 @@ static int vidioc_s_fmt(struct file *file, void *priv, = struct v4l2_format *f) "[%s] fmt - %p4cc %dx%d (stride %d)\n", V4L2_TYPE_IS_OUTPUT(f->type) ? "OUTPUT" : "CAPTURE", &frm->fmt->fourcc, frm->width, frm->height, - frm->stride); + pix_fmt->plane_fmt[0].bytesperline); =20 for (i =3D 0; i < pix_fmt->num_planes; i++) { v4l2_dbg(debug, 1, &rga->v4l2_dev, diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index 5aedda2f187e4bfef42c8755c4fc4b1ee5453e8e..d5ec873adc280bc2238b227d2f0= c649ca345b836 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -39,9 +39,6 @@ struct rga_frame { /* Image format */ struct rga_fmt *fmt; struct v4l2_pix_format_mplane pix; - - /* Variables that can calculated once and reused */ - u32 stride; }; =20 struct rga_dma_desc { --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 10AD72D4B57 for ; Tue, 7 Oct 2025 08:32:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825980; cv=none; b=d+vmj8Je1NgkRvJ28SLXwSBg2qFwydQf0nUMf+/Dw6kRCK8lEfmZusHI+zRaRLA2qM9L9a8sNiX1c4IUJ3AwoEMTmwTBCNceWnSglpTUds6hoTaBZVEiC1jsbYMeHXdkYEi9UuP+1quwSrhzauCekjSTLxUDonsUOnQe5gY2KBs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825980; c=relaxed/simple; bh=X5Lt3l+WINFRGiLQX6Vknkj6+gN4g3rjIVOPtgONkFM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hFk7xBEwQcYb9v1VHyBD430WJZb7sPTtwDxbqT33oDHqpRpsqzXeIQjzp+4AG3PqeKhxU6VtKzLqlRdqnev4ZEv+noqqAt8YkY94iA1+stJImTmjiVgP97QVyNn6vZmnc4YcCp/6IvNExA2wwLG+uddyV2jR3h5pxW6gnHks/dw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637w-0002Hb-3K; Tue, 07 Oct 2025 10:32:56 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:32:03 +0200 Subject: [PATCH 10/16] media: rockchip: rga: move rga_fmt to rga-hw.h Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-10-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Move rga_fmt to rga-hw in preparation of the RGA3 addition, as the struct contains many RGA2 specific values. They are used to write the correct register values quickly based on the chosen format. Therefore the pointer to the rga_fmt struct is kept but changed to an opaque void pointer outside of the rga-hw.h. To enumerate and set the correct formats, two helper functions need to be exposed in the rga_hw struct: enum_format just get's the vidioc_enum_fmt format and it's return value is also returned from vidioc_enum_fmt. This is a simple pass-through, as the implementation is very simple. try_format is a simple abstraction around the previous rga_find_format. But unlike rga_find_format, it always returns a valid format. Therefore the passed fourcc value is also a pointer to update it in case the passed fourcc value is not supported by the hardware. Due to the RGA3 supporting different formats on the capture and output side, an additional parameter is_capture has been added to support this use-case. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-buf.c | 2 +- drivers/media/platform/rockchip/rga/rga-hw.c | 52 ++++++++++++++++++++---= ---- drivers/media/platform/rockchip/rga/rga-hw.h | 12 +++++++ drivers/media/platform/rockchip/rga/rga.c | 45 ++++++++--------------- drivers/media/platform/rockchip/rga/rga.h | 16 ++------- 5 files changed, 71 insertions(+), 56 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga-buf.c b/drivers/media/= platform/rockchip/rga/rga-buf.c index e44fe870fb9e34aa93404b7a60022fe441adf8f9..ad660d3c8cc737b9f3f41770a14= ac13973bc7fea 100644 --- a/drivers/media/platform/rockchip/rga/rga-buf.c +++ b/drivers/media/platform/rockchip/rga/rga-buf.c @@ -158,7 +158,7 @@ static int rga_buf_prepare(struct vb2_buffer *vb) } =20 /* Fill the remaining planes */ - info =3D v4l2_format_info(f->fmt->fourcc); + info =3D v4l2_format_info(f->pix.pixelformat); for (i =3D info->mem_planes; i < info->comp_planes; i++) dma_addrs[i] =3D dma_addrs[0] + get_plane_offset(f, info, i); =20 diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/p= latform/rockchip/rga/rga-hw.c index 66b23c4a4cf1488ce42a7ab1901daaaa55b28fe0..d54183d224b3e9c42d5503acf17= 2257f2e736f7b 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.c +++ b/drivers/media/platform/rockchip/rga/rga-hw.c @@ -44,14 +44,15 @@ rga_get_corner_addrs(struct rga_frame *frm, struct rga_= addrs *addrs, struct rga_addrs *lt, *lb, *rt, *rb; unsigned int x_div =3D 0, y_div =3D 0, y_stride =3D 0, uv_stride =3D 0, pixel_width =3D 0; + struct rga_fmt *fmt =3D frm->fmt; =20 lt =3D &corner_addrs.left_top; lb =3D &corner_addrs.left_bottom; rt =3D &corner_addrs.right_top; rb =3D &corner_addrs.right_bottom; =20 - x_div =3D frm->fmt->x_div; - y_div =3D frm->fmt->y_div; + x_div =3D fmt->x_div; + y_div =3D fmt->y_div; y_stride =3D frm->pix.plane_fmt[0].bytesperline; uv_stride =3D y_stride / x_div; pixel_width =3D y_stride / frm->width; @@ -165,6 +166,8 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx) union rga_dst_vir_info dst_vir_info; union rga_dst_act_info dst_act_info; u32 in_stride, out_stride; + struct rga_fmt *in_fmt =3D ctx->in.fmt; + struct rga_fmt *out_fmt =3D ctx->out.fmt; =20 src_h =3D ctx->in.crop.height; src_w =3D ctx->in.crop.width; @@ -180,18 +183,18 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ct= x) dst_vir_info.val =3D dest[(RGA_DST_VIR_INFO - RGA_MODE_BASE_REG) >> 2]; dst_act_info.val =3D dest[(RGA_DST_ACT_INFO - RGA_MODE_BASE_REG) >> 2]; =20 - src_info.data.format =3D ctx->in.fmt->hw_format; - src_info.data.swap =3D ctx->in.fmt->color_swap; - dst_info.data.format =3D ctx->out.fmt->hw_format; - dst_info.data.swap =3D ctx->out.fmt->color_swap; + src_info.data.format =3D in_fmt->hw_format; + src_info.data.swap =3D in_fmt->color_swap; + dst_info.data.format =3D out_fmt->hw_format; + dst_info.data.swap =3D out_fmt->color_swap; =20 /* * CSC mode must only be set when the colorspace families differ between * input and output. It must remain unset (zeroed) if both are the same. */ =20 - if (RGA_COLOR_FMT_IS_YUV(ctx->in.fmt->hw_format) && - RGA_COLOR_FMT_IS_RGB(ctx->out.fmt->hw_format)) { + if (RGA_COLOR_FMT_IS_YUV(in_fmt->hw_format) && + RGA_COLOR_FMT_IS_RGB(out_fmt->hw_format)) { switch (ctx->in.colorspace) { case V4L2_COLORSPACE_REC709: src_info.data.csc_mode =3D RGA_SRC_CSC_MODE_BT709_R0; @@ -202,8 +205,8 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx) } } =20 - if (RGA_COLOR_FMT_IS_RGB(ctx->in.fmt->hw_format) && - RGA_COLOR_FMT_IS_YUV(ctx->out.fmt->hw_format)) { + if (RGA_COLOR_FMT_IS_RGB(in_fmt->hw_format) && + RGA_COLOR_FMT_IS_YUV(out_fmt->hw_format)) { switch (ctx->out.colorspace) { case V4L2_COLORSPACE_REC709: dst_info.data.csc_mode =3D RGA_SRC_CSC_MODE_BT709_R0; @@ -621,11 +624,34 @@ static struct rga_fmt formats[] =3D { }, }; =20 +static void *rga_try_format(u32 *fourcc, bool is_output) +{ + unsigned int i; + + if (!fourcc) + return &formats[0]; + + for (i =3D 0; i < ARRAY_SIZE(formats); i++) { + if (formats[i].fourcc =3D=3D *fourcc) + return &formats[i]; + } + + *fourcc =3D formats[0].fourcc; + return &formats[0]; +} + +static int rga_enum_format(struct v4l2_fmtdesc *f) +{ + if (f->index >=3D ARRAY_SIZE(formats)) + return -EINVAL; + + f->pixelformat =3D formats[f->index].fourcc; + return 0; +} + const struct rga_hw rga2_hw =3D { .card_type =3D "rga2", .has_internal_iommu =3D true, - .formats =3D formats, - .num_formats =3D ARRAY_SIZE(formats), .cmdbuf_size =3D RGA_CMDBUF_SIZE, .min_width =3D MIN_WIDTH, .max_width =3D MAX_WIDTH, @@ -635,4 +661,6 @@ const struct rga_hw rga2_hw =3D { .start =3D rga_hw_start, .handle_irq =3D rga_handle_irq, .get_version =3D rga_get_version, + .try_format =3D rga_try_format, + .enum_format =3D rga_enum_format, }; diff --git a/drivers/media/platform/rockchip/rga/rga-hw.h b/drivers/media/p= latform/rockchip/rga/rga-hw.h index 1f52fbfad5fb3b8b773f7f03be0603170c5189f6..0ac3a05c0e0cfd8ed64277cd67e= 5936fbd52d28f 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.h +++ b/drivers/media/platform/rockchip/rga/rga-hw.h @@ -6,6 +6,8 @@ #ifndef __RGA_HW_H__ #define __RGA_HW_H__ =20 +#include + #define RGA_CMDBUF_SIZE 0x20 =20 /* Hardware limits */ @@ -428,4 +430,14 @@ union rga_pat_con { } data; }; =20 +struct rga_fmt { + u32 fourcc; + int depth; + u8 uv_factor; + u8 y_div; + u8 x_div; + u8 color_swap; + u8 hw_format; +}; + #endif diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index 6e1a4a6dc6309a6d6d9a3aac0fe982e7200c96de..cd4da01645611e5fb51ed94e09b= 5f1463dad72c5 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -185,17 +185,6 @@ static int rga_setup_ctrls(struct rga_ctx *ctx) return 0; } =20 -static struct rga_fmt *rga_fmt_find(struct rockchip_rga *rga, u32 pixelfor= mat) -{ - unsigned int i; - - for (i =3D 0; i < rga->hw->num_formats; i++) { - if (rga->hw->formats[i].fourcc =3D=3D pixelformat) - return &rga->hw->formats[i]; - } - return NULL; -} - struct rga_frame *rga_get_frame(struct rga_ctx *ctx, enum v4l2_buf_type ty= pe) { if (V4L2_TYPE_IS_OUTPUT(type)) @@ -210,6 +199,7 @@ static int rga_open(struct file *file) struct rockchip_rga *rga =3D video_drvdata(file); struct rga_ctx *ctx =3D NULL; int ret =3D 0; + u32 fourcc; struct rga_frame def_frame =3D { .width =3D clamp(DEFAULT_WIDTH, rga->hw->min_width, rga->hw->max_width), .height =3D clamp(DEFAULT_HEIGHT, rga->hw->min_height, rga->hw->max_heig= ht), @@ -218,7 +208,6 @@ static int rga_open(struct file *file) .crop.top =3D 0, .crop.width =3D clamp(DEFAULT_WIDTH, rga->hw->min_width, rga->hw->max_wi= dth), .crop.height =3D clamp(DEFAULT_HEIGHT, rga->hw->min_height, rga->hw->max= _height), - .fmt =3D &rga->hw->formats[0], }; =20 ctx =3D kzalloc(sizeof(*ctx), GFP_KERNEL); @@ -229,10 +218,14 @@ static int rga_open(struct file *file) ctx->in =3D def_frame; ctx->out =3D def_frame; =20 + fourcc =3D 0; + ctx->in.fmt =3D rga->hw->try_format(&fourcc, true); v4l2_fill_pixfmt_mp(&ctx->in.pix, - ctx->in.fmt->fourcc, ctx->out.width, ctx->out.height); + fourcc, ctx->out.width, ctx->out.height); + fourcc =3D 0; + ctx->out.fmt =3D rga->hw->try_format(&fourcc, false); v4l2_fill_pixfmt_mp(&ctx->out.pix, - ctx->out.fmt->fourcc, ctx->out.width, ctx->out.height); + fourcc, ctx->out.width, ctx->out.height); =20 if (mutex_lock_interruptible(&rga->mutex)) { kfree(ctx); @@ -302,15 +295,8 @@ vidioc_querycap(struct file *file, void *priv, struct = v4l2_capability *cap) static int vidioc_enum_fmt(struct file *file, void *priv, struct v4l2_fmtd= esc *f) { struct rockchip_rga *rga =3D video_drvdata(file); - struct rga_fmt *fmt; =20 - if (f->index >=3D rga->hw->num_formats) - return -EINVAL; - - fmt =3D &rga->hw->formats[f->index]; - f->pixelformat =3D fmt->fourcc; - - return 0; + return rga->hw->enum_format(f); } =20 static void align_pixfmt(struct v4l2_pix_format_mplane *pix_fmt) @@ -346,7 +332,7 @@ static int vidioc_g_fmt(struct file *file, void *priv, = struct v4l2_format *f) if (IS_ERR(frm)) return PTR_ERR(frm); =20 - v4l2_fill_pixfmt_mp(pix_fmt, frm->fmt->fourcc, frm->width, frm->height); + v4l2_fill_pixfmt_mp(pix_fmt, frm->pix.pixelformat, frm->width, frm->heigh= t); align_pixfmt(pix_fmt); =20 pix_fmt->field =3D V4L2_FIELD_NONE; @@ -360,18 +346,16 @@ static int vidioc_try_fmt(struct file *file, void *pr= iv, struct v4l2_format *f) struct v4l2_pix_format_mplane *pix_fmt =3D &f->fmt.pix_mp; struct rockchip_rga *rga =3D video_drvdata(file); const struct rga_hw *hw =3D rga->hw; - struct rga_fmt *fmt; =20 - fmt =3D rga_fmt_find(rga, pix_fmt->pixelformat); - if (!fmt) - fmt =3D &hw->formats[0]; + hw->try_format(&pix_fmt->pixelformat, + V4L2_TYPE_IS_OUTPUT(f->type)); =20 pix_fmt->width =3D clamp(pix_fmt->width, hw->min_width, hw->max_width); pix_fmt->height =3D clamp(pix_fmt->height, hw->min_height, hw->max_height); =20 - v4l2_fill_pixfmt_mp(pix_fmt, fmt->fourcc, pix_fmt->width, pix_fmt->height= ); + v4l2_fill_pixfmt_mp(pix_fmt, pix_fmt->pixelformat, pix_fmt->width, pix_fm= t->height); align_pixfmt(pix_fmt); pix_fmt->field =3D V4L2_FIELD_NONE; =20 @@ -404,7 +388,8 @@ static int vidioc_s_fmt(struct file *file, void *priv, = struct v4l2_format *f) return PTR_ERR(frm); frm->width =3D pix_fmt->width; frm->height =3D pix_fmt->height; - frm->fmt =3D rga_fmt_find(rga, pix_fmt->pixelformat); + frm->fmt =3D rga->hw->try_format(&pix_fmt->pixelformat, + V4L2_TYPE_IS_OUTPUT(f->type)); frm->colorspace =3D pix_fmt->colorspace; =20 /* Reset crop settings */ @@ -418,7 +403,7 @@ static int vidioc_s_fmt(struct file *file, void *priv, = struct v4l2_format *f) v4l2_dbg(debug, 1, &rga->v4l2_dev, "[%s] fmt - %p4cc %dx%d (stride %d)\n", V4L2_TYPE_IS_OUTPUT(f->type) ? "OUTPUT" : "CAPTURE", - &frm->fmt->fourcc, frm->width, frm->height, + &pix_fmt->pixelformat, frm->width, frm->height, pix_fmt->plane_fmt[0].bytesperline); =20 for (i =3D 0; i < pix_fmt->num_planes; i++) { diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index d5ec873adc280bc2238b227d2f0c649ca345b836..fc4805ba4e8ef7fb311f780a198= ba6ba4d3aff17 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -17,16 +17,6 @@ #define DEFAULT_WIDTH 100 #define DEFAULT_HEIGHT 100 =20 -struct rga_fmt { - u32 fourcc; - int depth; - u8 uv_factor; - u8 y_div; - u8 x_div; - u8 color_swap; - u8 hw_format; -}; - struct rga_frame { /* Original dimensions */ u32 width; @@ -37,7 +27,7 @@ struct rga_frame { struct v4l2_rect crop; =20 /* Image format */ - struct rga_fmt *fmt; + void *fmt; struct v4l2_pix_format_mplane pix; }; =20 @@ -149,8 +139,6 @@ static inline void rga_mod(struct rockchip_rga *rga, u3= 2 reg, u32 val, u32 mask) struct rga_hw { const char *card_type; bool has_internal_iommu; - struct rga_fmt *formats; - u32 num_formats; size_t cmdbuf_size; u32 min_width, min_height; u32 max_width, max_height; @@ -159,6 +147,8 @@ struct rga_hw { struct rga_vb_buffer *src, struct rga_vb_buffer *dst); bool (*handle_irq)(struct rockchip_rga *rga); void (*get_version)(struct rockchip_rga *rga); + void *(*try_format)(u32 *fourcc, bool is_output); + int (*enum_format)(struct v4l2_fmtdesc *f); }; =20 static inline bool rga_has_internal_iommu(const struct rockchip_rga *rga) --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB8532D5A0C for ; Tue, 7 Oct 2025 08:32:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825981; cv=none; b=IxV8gfmJagDZ7KtOTMjKJ+UaSFeaPDLeU/dLl0vjPJ2QbqCy24dI1o9+tROpw7NVno0USsqZ+6G4xmKW0rJ8BSIbuemE/aqKom6rQIyqCx9gJoxs7FPkZINTOzW84bzcKIH91q2r1Kcgspy1O/IRuR1jGIhxUfxL9WDMwOIql04= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825981; c=relaxed/simple; bh=m8/AYG1WeqfOxv75Mz5AsWV07rJvH181OXXlCgRuSc0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OUL37fnmtt19sUV1RpT1uKBe1Wdk0gUvRAapTrw6SDa+z8YL4c38oyrgF0jtcKuXIIxTgr29PC2L4crSDxvte4OJr+bICAJuD1orClallG2h2ARUbcI/L/mZ5C7fwz1Iv+HM9LLaU4z28hkxcuDja4G3V0FRVhOnjB+JZrB51KU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637w-0002Hb-U9; Tue, 07 Oct 2025 10:32:57 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:32:04 +0200 Subject: [PATCH 11/16] media: rockchip: rga: add iommu restore function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-11-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Add an iommu restore function in preparation for the rga3 addition. This is necessary for a soft reset, as the rga3 will also reset it's iommu paging table to 0 and disable paging. The empty domain attach/detach to restore the iommu is copied from the rkvdec driver. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga.c | 24 ++++++++++++++++++++++++ drivers/media/platform/rockchip/rga/rga.h | 7 +++++++ 2 files changed, 31 insertions(+) diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index cd4da01645611e5fb51ed94e09b5f1463dad72c5..0a725841b0cfa41bbc5b861b8f5= ceac2452fc2b5 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -560,6 +561,19 @@ static const struct video_device rga_videodev =3D { .device_caps =3D V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING, }; =20 +void rga_iommu_restore(struct rockchip_rga *rga) +{ + if (rga->empty_domain) { + /* + * To rewrite mapping into the attached IOMMU core, attach a new empty d= omain that + * will program an empty table, then detach it to restore the default do= main and + * all cached mappings. + */ + iommu_attach_device(rga->empty_domain, rga->dev); + iommu_detach_device(rga->empty_domain, rga->dev); + } +} + static int rga_parse_dt(struct rockchip_rga *rga) { struct reset_control *core_rst, *axi_rst, *ahb_rst; @@ -657,6 +671,13 @@ static int rga_probe(struct platform_device *pdev) goto err_put_clk; } =20 + if (iommu_get_domain_for_dev(rga->dev)) { + rga->empty_domain =3D iommu_paging_domain_alloc(rga->dev); + + if (!rga->empty_domain) + dev_warn(rga->dev, "cannot alloc new empty domain\n"); + } + ret =3D v4l2_device_register(&pdev->dev, &rga->v4l2_dev); if (ret) goto err_put_clk; @@ -741,6 +762,9 @@ static void rga_remove(struct platform_device *pdev) v4l2_device_unregister(&rga->v4l2_dev); =20 pm_runtime_disable(rga->dev); + + if (rga->empty_domain) + iommu_domain_free(rga->empty_domain); } =20 static int __maybe_unused rga_runtime_suspend(struct device *dev) diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index fc4805ba4e8ef7fb311f780a198ba6ba4d3aff17..e19c4c82aca5ae2056f52d52513= 8093fbbb81af8 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -75,6 +75,7 @@ struct rockchip_rga { void __iomem *regs; struct clk_bulk_data clks[3]; struct rockchip_rga_version version; + struct iommu_domain *empty_domain; =20 /* vfd lock */ struct mutex mutex; @@ -114,6 +115,12 @@ static inline struct rga_vb_buffer *vb_to_rga(struct v= b2_v4l2_buffer *vb) =20 struct rga_frame *rga_get_frame(struct rga_ctx *ctx, enum v4l2_buf_type ty= pe); =20 +/* + * This should be called in an interrupt handler to make sure no memory + * is mapped through the IOMMU while the empty domain is attached. + */ +void rga_iommu_restore(struct rockchip_rga *rga); + /* RGA Buffers Manage */ extern const struct vb2_ops rga_qops; =20 --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96F5A2D8DCA for ; Tue, 7 Oct 2025 08:32:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637x-0002Hb-Mm; Tue, 07 Oct 2025 10:32:57 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:32:05 +0200 Subject: [PATCH 12/16] media: rockchip: rga: handle error interrupt Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-12-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Handle the error interrupt status in preparation of the RGA3 addition. This allows the buffer to be marked as done, as it would otherwise be stuck in the queue. The RGA3 needs a soft reset to properly work after an error occurred, as it would otherwise cease to deliver new interrupts. Also the soft reset avoids additional error interrupts to be triggered, which are currently not supported by the rga_isr function. As it is unknown how the RGA2 behaves in the error case, no error interrupt was enabled and handled. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-hw.c | 6 ++++-- drivers/media/platform/rockchip/rga/rga.c | 32 +++++++++++++++++-------= ---- drivers/media/platform/rockchip/rga/rga.h | 8 ++++++- 3 files changed, 31 insertions(+), 15 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/p= latform/rockchip/rga/rga-hw.c index d54183d224b3e9c42d5503acf172257f2e736f7b..93822b5b8b15e76862bd022759e= aa5cb9552dd76 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.c +++ b/drivers/media/platform/rockchip/rga/rga-hw.c @@ -459,7 +459,7 @@ static void rga_hw_start(struct rockchip_rga *rga, rga_write(rga, RGA_CMD_CTRL, 0x1); } =20 -static bool rga_handle_irq(struct rockchip_rga *rga) +static enum rga_irq_result rga_handle_irq(struct rockchip_rga *rga) { int intr; =20 @@ -467,7 +467,9 @@ static bool rga_handle_irq(struct rockchip_rga *rga) =20 rga_mod(rga, RGA_INT, intr << 4, 0xf << 4); =20 - return intr & 0x04; + if (intr & 0x04) + return RGA_IRQ_DONE; + return RGA_IRQ_IGNORE; } =20 static void rga_get_version(struct rockchip_rga *rga) diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index 0a725841b0cfa41bbc5b861b8f5ceac2452fc2b5..3b5d2eb8e109f44af76dd2240a2= 39b1fa8a78cee 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -56,30 +56,38 @@ static void device_run(void *prv) static irqreturn_t rga_isr(int irq, void *prv) { struct rockchip_rga *rga =3D prv; + struct vb2_v4l2_buffer *src, *dst; + struct rga_ctx *ctx =3D rga->curr; + enum rga_irq_result result; =20 - if (rga->hw->handle_irq(rga)) { - struct vb2_v4l2_buffer *src, *dst; - struct rga_ctx *ctx =3D rga->curr; + result =3D rga->hw->handle_irq(rga); + if (result =3D=3D RGA_IRQ_IGNORE) + return IRQ_HANDLED; =20 - WARN_ON(!ctx); + WARN_ON(!ctx); =20 - rga->curr =3D NULL; + rga->curr =3D NULL; =20 - src =3D v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); - dst =3D v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + src =3D v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + dst =3D v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); =20 - WARN_ON(!src); - WARN_ON(!dst); + WARN_ON(!src); + WARN_ON(!dst); =20 - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst, true); =20 - dst->sequence =3D ctx->csequence++; + dst->sequence =3D ctx->csequence++; =20 + if (result =3D=3D RGA_IRQ_DONE) { v4l2_m2m_buf_done(src, VB2_BUF_STATE_DONE); v4l2_m2m_buf_done(dst, VB2_BUF_STATE_DONE); - v4l2_m2m_job_finish(rga->m2m_dev, ctx->fh.m2m_ctx); + } else { + v4l2_m2m_buf_done(src, VB2_BUF_STATE_ERROR); + v4l2_m2m_buf_done(dst, VB2_BUF_STATE_ERROR); } =20 + v4l2_m2m_job_finish(rga->m2m_dev, ctx->fh.m2m_ctx); + return IRQ_HANDLED; } =20 diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index e19c4c82aca5ae2056f52d525138093fbbb81af8..dc4bb85707d12f5378c4891098c= d7ea4a4d75e2d 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -143,6 +143,12 @@ static inline void rga_mod(struct rockchip_rga *rga, u= 32 reg, u32 val, u32 mask) rga_write(rga, reg, temp); }; =20 +enum rga_irq_result { + RGA_IRQ_IGNORE, + RGA_IRQ_DONE, + RGA_IRQ_ERROR, +}; + struct rga_hw { const char *card_type; bool has_internal_iommu; @@ -152,7 +158,7 @@ struct rga_hw { =20 void (*start)(struct rockchip_rga *rga, struct rga_vb_buffer *src, struct rga_vb_buffer *dst); - bool (*handle_irq)(struct rockchip_rga *rga); + enum rga_irq_result (*handle_irq)(struct rockchip_rga *rga); void (*get_version)(struct rockchip_rga *rga); void *(*try_format)(u32 *fourcc, bool is_output); int (*enum_format)(struct v4l2_fmtdesc *f); --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9705E2D8DCF for ; Tue, 7 Oct 2025 08:33:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; 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spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637y-0002Hb-Eu; Tue, 07 Oct 2025 10:32:58 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:32:06 +0200 Subject: [PATCH 13/16] media: dt-bindings: media: rockchip-rga: add rockchip,rk3588-rga3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-13-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Add a new compatible for the rk3588 Rockchip SoC, which features an RGA3, which is described in the TRM Part2. Signed-off-by: Sven P=C3=BCschel --- Documentation/devicetree/bindings/media/rockchip-rga.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.yaml b/Do= cumentation/devicetree/bindings/media/rockchip-rga.yaml index ac17cda65191be047fc61d0c806f806c6af07c7b..11e86333c56aab55d9358dc88e4= 5e7c1ebfaae9e 100644 --- a/Documentation/devicetree/bindings/media/rockchip-rga.yaml +++ b/Documentation/devicetree/bindings/media/rockchip-rga.yaml @@ -20,6 +20,7 @@ properties: oneOf: - const: rockchip,rk3288-rga - const: rockchip,rk3399-rga + - const: rockchip,rk3588-rga3 - items: - enum: - rockchip,rk3228-rga --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AAEAB2D94BD for ; Tue, 7 Oct 2025 08:33:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825983; cv=none; b=Y/Nud9US3DNvk94C4hEie0x2/2tuPrW3tuUZsivzHs2ACM4U9TkzE4M+wYUW9OcKV3vGKYHCIuGyWAUlV8NFK/BphYxN6pwJp2gmHYT6WzgPKGU8vVqARvHhP/pOWssXXEEWFtJt0JaSrWtsmS5HqWsfSX774Dim89Sdb8bJW08= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825983; c=relaxed/simple; bh=E2UCwo2mDp2UiCmu+fvQJ2vHIGrZozQVSDc2uvx3KwI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XnoJXeoNhpMKhv0Tri4FrCBJAtAus9S+7PdPTRXJO4qgF7UV0STdEtzfyup7yRTUTVtbeIU+fN27d3hnKZCK/NxND+WdvFeoICTxCQPsj5BJ1kxBLYYonPAmOrnIuZqBFoqBym3OJczRjCCCY/Bz8PD1l93cviUjvrpCCAiiNNI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v637z-0002Hb-5k; Tue, 07 Oct 2025 10:32:59 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:32:07 +0200 Subject: [PATCH 14/16] arm64: dts: rockchip: add rga3 dt nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-14-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Add devicetree nodes for the RGA3 peripheral in the RK3588. They are based on the vendor downstream device nodes, but were adjusted to work with the rockchip-rga and iommu driver kernel. Signed-off-by: Sven P=C3=BCschel --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 46 +++++++++++++++++++++++= ++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 70f03e68ba550d6b9142131dcca86e8ded36e2f1..08885d9c19e0c104ab0f723ec16= 1b83998cfb9c7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1172,6 +1172,52 @@ rga: rga@fdb80000 { power-domains =3D <&power RK3588_PD_VDPU>; }; =20 + rga3_core0: rga@fdb60000 { + compatible =3D "rockchip,rk3588-rga3"; + reg =3D <0x0 0xfdb60000 0x0 0x200>; + interrupts =3D ; + interrupt-names =3D "rga3_core0_irq"; + clocks =3D <&cru ACLK_RGA3_0>, <&cru HCLK_RGA3_0>, <&cru CLK_RGA3_0_CORE= >; + clock-names =3D "aclk", "hclk", "sclk"; + resets =3D <&cru SRST_RGA3_0_CORE>, <&cru SRST_A_RGA3_0>, <&cru SRST_H_R= GA3_0>; + reset-names =3D "core", "axi", "ahb"; + power-domains =3D <&power RK3588_PD_RGA30>; + iommus =3D <&rga3_0_mmu>; + }; + + rga3_0_mmu: iommu@fdb60f00 { + compatible =3D "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg =3D <0x0 0xfdb60f00 0x0 0x100>; + interrupts =3D ; + clocks =3D <&cru ACLK_RGA3_0>, <&cru HCLK_RGA3_0>; + clock-names =3D "aclk", "iface"; + #iommu-cells =3D <0>; + power-domains =3D <&power RK3588_PD_RGA30>; + }; + + rga3_core1: rga@fdb70000 { + compatible =3D "rockchip,rk3588-rga3"; + reg =3D <0x0 0xfdb70000 0x0 0x200>; + interrupts =3D ; + interrupt-names =3D "rga3_core1_irq"; + clocks =3D <&cru ACLK_RGA3_1>, <&cru HCLK_RGA3_1>, <&cru CLK_RGA3_1_CORE= >; + clock-names =3D "aclk", "hclk", "sclk"; + resets =3D <&cru SRST_RGA3_1_CORE>, <&cru SRST_A_RGA3_1>, <&cru SRST_H_R= GA3_1>; + reset-names =3D "core", "axi", "ahb"; + power-domains =3D <&power RK3588_PD_RGA31>; + iommus =3D <&rga3_1_mmu>; + }; + + rga3_1_mmu: iommu@fdb70f00 { + compatible =3D "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg =3D <0x0 0xfdb70f00 0x0 0x100>; + interrupts =3D ; + clocks =3D <&cru ACLK_RGA3_1>, <&cru HCLK_RGA3_1>; + clock-names =3D "aclk", "iface"; + #iommu-cells =3D <0>; + power-domains =3D <&power RK3588_PD_RGA31>; + }; + vepu121_0: video-codec@fdba0000 { compatible =3D "rockchip,rk3588-vepu121"; reg =3D <0x0 0xfdba0000 0x0 0x800>; --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E26012D9796 for ; Tue, 7 Oct 2025 08:33:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825984; cv=none; b=JRpZH9FWvYe52RlSI+8V1gAMT2veCPwHcLx2VBBsZxBTB1+n6PpK4LsxDMDuCev+AshgisKGbmVo9WhdUZao9nR7fzk6/1do8mpopG/T8t21x36ckyss8yy3hRyhsWz4zW5UtqJVl7NleqoGss6QsdaTIYJwOFYM4Sz5Fheh3/Y= ARC-Message-Signature: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-15-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Increase the RGA3 clock speed to get the maximal possible frames per second. By default the core and axi clock is set to 375Mhz. Signed-off-by: Sven P=C3=BCschel --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 08885d9c19e0c104ab0f723ec161b83998cfb9c7..57e320267bb629893bb884bf4e8= d6bbc22f8d628 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1179,6 +1179,8 @@ rga3_core0: rga@fdb60000 { interrupt-names =3D "rga3_core0_irq"; clocks =3D <&cru ACLK_RGA3_0>, <&cru HCLK_RGA3_0>, <&cru CLK_RGA3_0_CORE= >; clock-names =3D "aclk", "hclk", "sclk"; + assigned-clocks =3D <&cru CLK_RGA3_0_CORE>, <&cru ACLK_RGA3_0>; + assigned-clock-rates =3D <800000000>, <800000000>; resets =3D <&cru SRST_RGA3_0_CORE>, <&cru SRST_A_RGA3_0>, <&cru SRST_H_R= GA3_0>; reset-names =3D "core", "axi", "ahb"; power-domains =3D <&power RK3588_PD_RGA30>; @@ -1202,6 +1204,8 @@ rga3_core1: rga@fdb70000 { interrupt-names =3D "rga3_core1_irq"; clocks =3D <&cru ACLK_RGA3_1>, <&cru HCLK_RGA3_1>, <&cru CLK_RGA3_1_CORE= >; clock-names =3D "aclk", "hclk", "sclk"; + assigned-clocks =3D <&cru CLK_RGA3_1_CORE>, <&cru ACLK_RGA3_1>; + assigned-clock-rates =3D <800000000>, <800000000>; resets =3D <&cru SRST_RGA3_1_CORE>, <&cru SRST_A_RGA3_1>, <&cru SRST_H_R= GA3_1>; reset-names =3D "core", "axi", "ahb"; power-domains =3D <&power RK3588_PD_RGA31>; --=20 2.51.0 From nobody Mon Feb 9 10:30:12 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D901D2D9ECE for ; Tue, 7 Oct 2025 08:33:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825986; cv=none; b=OsVIokqOslie4gHYsJKCr6BkxNTLPNM1umj+27ibe2F/RGQUMtUbwuhmlPS8yFMP8BsW0DqhPpioK4E7uFVrdE0+r4fs6pGmlKx1xNZOdCSlfpPFKMO4+2rRf1Z6habBZVSrcFH1Ujm+yKHXlaa1nhpman0/qdDSHuv5VKCCKrI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759825986; c=relaxed/simple; bh=5M5LW6dv+wRQCks/SvizwnLcQgLbqI0XgSF6No+wUPc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=stu+WXZO+I0s2BZfbyLbJYv6SQVUbLAjj4YuYmKCuqNhRJKexfBVbByn1MzzQ6wgEs9nXx/Vvn4V8QTfFSZ4h2d36yNWDF/O62gxyl/BuoFcODL0oQHO1zxjguUGtk0KDv/UWj4rk/qeCJ1/2goGudJBvA5mfKaLkRqoPRCdfHs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v6380-0002Hb-Op; Tue, 07 Oct 2025 10:33:00 +0200 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 07 Oct 2025 10:32:09 +0200 Subject: [PATCH 16/16] media: rockchip: rga: add rga3 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251007-spu-rga3-v1-16-36ad85570402@pengutronix.de> References: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> In-Reply-To: <20251007-spu-rga3-v1-0-36ad85570402@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Add support for the RGA3 unit contained in the RK3588. Only a basic feature set consisting of scaling and color conversion is implemented. Advanced features like rotation and cropping will just be ignored. Also the BT601F color space conversion is currently hard coded. The register address defines were copied from the vendor Rockchip kernel sources and slightly adjusted to not start at 0 again for the cmd registers. Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/Makefile | 2 +- drivers/media/platform/rockchip/rga/rga.c | 4 + drivers/media/platform/rockchip/rga/rga.h | 2 +- drivers/media/platform/rockchip/rga/rga3-hw.c | 490 ++++++++++++++++++++++= ++++ drivers/media/platform/rockchip/rga/rga3-hw.h | 186 ++++++++++ 5 files changed, 682 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/Makefile b/drivers/media/p= latform/rockchip/rga/Makefile index 1bbecdc3d8df2ce286652f5544c4a3b52a6d28cf..7326a548f3dc7618403e98974b8= c60d45f556fef 100644 --- a/drivers/media/platform/rockchip/rga/Makefile +++ b/drivers/media/platform/rockchip/rga/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -rockchip-rga-objs :=3D rga.o rga-hw.o rga-buf.o +rockchip-rga-objs :=3D rga.o rga-hw.o rga3-hw.o rga-buf.o =20 obj-$(CONFIG_VIDEO_ROCKCHIP_RGA) +=3D rockchip-rga.o diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index 3b5d2eb8e109f44af76dd2240a239b1fa8a78cee..9d15104fcc1a45553af33bfd637= bba0a86329c17 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -805,6 +805,10 @@ static const struct of_device_id rockchip_rga_match[] = =3D { .compatible =3D "rockchip,rk3399-rga", .data =3D &rga2_hw, }, + { + .compatible =3D "rockchip,rk3588-rga3", + .data =3D &rga3_hw, + }, {}, }; =20 diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index dc4bb85707d12f5378c4891098cd7ea4a4d75e2d..350a4e07cb2ee237fc3676d594e= 1e7298a028afb 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -169,6 +169,6 @@ static inline bool rga_has_internal_iommu(const struct = rockchip_rga *rga) return rga->hw->has_internal_iommu; } =20 -extern const struct rga_hw rga2_hw; +extern const struct rga_hw rga2_hw, rga3_hw; =20 #endif diff --git a/drivers/media/platform/rockchip/rga/rga3-hw.c b/drivers/media/= platform/rockchip/rga/rga3-hw.c new file mode 100644 index 0000000000000000000000000000000000000000..6e4cd2f96cf866880316c75924f= 7a4c339851448 --- /dev/null +++ b/drivers/media/platform/rockchip/rga/rga3-hw.c @@ -0,0 +1,490 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) Pengutronix e.K. + * Author: Sven P=C3=BCschel + */ + +#include +#include +#include +#include + +#include + +#include "rga3-hw.h" +#include "rga.h" + +static unsigned int rga3_get_scaling(unsigned int src, unsigned int dst) +{ + if (dst > src) { + if (((src - 1) << 16) % (dst - 1) =3D=3D 0) + return ((src - 1) << 16) / (dst - 1) - 1; + else + return ((src - 1) << 16) / (dst - 1); + } else { + return ((dst - 1) << 16) / (src - 1) + 1; + } +} + +static bool rga3_has_alpha(const struct rga3_fmt *fmt) +{ + return fmt->hw_format >=3D RGA3_COLOR_FMT_FIRST_HAS_ALPHA && + fmt->fourcc !=3D V4L2_PIX_FMT_BGRX32 && + fmt->fourcc !=3D V4L2_PIX_FMT_XBGR32 && + fmt->fourcc !=3D V4L2_PIX_FMT_RGBX32 && + fmt->fourcc !=3D V4L2_PIX_FMT_XRGB32; +} + +static bool rga3_can_capture(const struct rga3_fmt *fmt) +{ + return fmt->hw_format <=3D RGA3_COLOR_FMT_LAST_OUTPUT; +} + +static void rga3_cmd_set_trans_info(struct rga_ctx *ctx) +{ + struct rockchip_rga *rga =3D ctx->rga; + u32 *cmd =3D rga->cmdbuf_virt; + unsigned int src_h, src_w, dst_h, dst_w; + unsigned int reg; + u16 hor_scl_fac, ver_scl_fac; + + src_h =3D ctx->in.crop.height; + src_w =3D ctx->in.crop.width; + dst_h =3D ctx->out.crop.height; + dst_w =3D ctx->out.crop.width; + + reg =3D RGA3_WIN0_RD_CTRL - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] |=3D FIELD_PREP(RGA3_WIN_SCALE_HOR_UP, dst_w > src_w) + | FIELD_PREP(RGA3_WIN_SCALE_HOR_BYPASS, dst_w =3D=3D src_w) + | FIELD_PREP(RGA3_WIN_SCALE_VER_UP, dst_h > src_h) + | FIELD_PREP(RGA3_WIN_SCALE_VER_BYPASS, dst_h =3D=3D src_h); + + /* stride needs to be in words */ + reg =3D RGA3_WIN0_VIR_STRIDE - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D ctx->in.pix.plane_fmt[0].bytesperline >> 2; + reg =3D RGA3_WIN0_UV_VIR_STRIDE - RGA3_FIRST_CMD_REG; + if (ctx->in.pix.num_planes >=3D 2) + cmd[reg >> 2] =3D ctx->in.pix.plane_fmt[1].bytesperline >> 2; + else + cmd[reg >> 2] =3D ctx->in.pix.plane_fmt[0].bytesperline >> 2; + reg =3D RGA3_WR_VIR_STRIDE - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D ctx->out.pix.plane_fmt[0].bytesperline >> 2; + reg =3D RGA3_WR_PL_VIR_STRIDE - RGA3_FIRST_CMD_REG; + if (ctx->out.pix.num_planes >=3D 2) + cmd[reg >> 2] =3D ctx->out.pix.plane_fmt[1].bytesperline >> 2; + else + cmd[reg >> 2] =3D ctx->out.pix.plane_fmt[0].bytesperline >> 2; + + reg =3D RGA3_WIN0_ACT_SIZE - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D FIELD_PREP(RGA3_WIDTH, src_w) + | FIELD_PREP(RGA3_HEIGHT, src_h); + reg =3D RGA3_WIN0_SRC_SIZE - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D FIELD_PREP(RGA3_WIDTH, src_w) + | FIELD_PREP(RGA3_HEIGHT, src_h); + + reg =3D RGA3_WIN0_DST_SIZE - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D FIELD_PREP(RGA3_WIDTH, dst_w) + | FIELD_PREP(RGA3_HEIGHT, dst_h); + + hor_scl_fac =3D rga3_get_scaling(src_w, dst_w); + ver_scl_fac =3D rga3_get_scaling(src_h, dst_h); + reg =3D RGA3_WIN0_SCL_FAC - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D FIELD_PREP(RGA3_SCALE_HOR_FAC, hor_scl_fac) + | FIELD_PREP(RGA3_SCALE_VER_FAC, ver_scl_fac); + + if (rga3_has_alpha(ctx->in.fmt)) { + /* copy alpha from input */ + reg =3D RGA3_OVLP_TOP_ALPHA - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D FIELD_PREP(RGA3_ALPHA_SELECT_MODE, 1) + | FIELD_PREP(RGA3_ALPHA_BLEND_MODE, 1); + reg =3D RGA3_OVLP_BOT_ALPHA - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D FIELD_PREP(RGA3_ALPHA_SELECT_MODE, 1) + | FIELD_PREP(RGA3_ALPHA_BLEND_MODE, 1); + } else { + /* just use a 255 alpha value */ + reg =3D RGA3_OVLP_TOP_CTRL - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D FIELD_PREP(RGA3_OVLP_GLOBAL_ALPHA, 0xff) + | FIELD_PREP(RGA3_OVLP_COLOR_MODE, 1); + reg =3D RGA3_OVLP_BOT_CTRL - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D FIELD_PREP(RGA3_OVLP_GLOBAL_ALPHA, 0xff) + | FIELD_PREP(RGA3_OVLP_COLOR_MODE, 1); + } +} + +static void rga3_cmd_set_win0_addr(struct rga_ctx *ctx, + const struct rga_addrs *addrs) +{ + u32 *cmd =3D ctx->rga->cmdbuf_virt; + unsigned int reg; + + reg =3D RGA3_WIN0_Y_BASE - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D addrs->y_addr; + reg =3D RGA3_WIN0_U_BASE - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D addrs->u_addr; +} + +static void rga3_cmd_set_wr_addr(struct rga_ctx *ctx, + const struct rga_addrs *addrs) +{ + u32 *cmd =3D ctx->rga->cmdbuf_virt; + unsigned int reg; + + reg =3D RGA3_WR_Y_BASE - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D addrs->y_addr; + reg =3D RGA3_WR_U_BASE - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] =3D addrs->u_addr; +} + +static void rga3_cmd_set_win0_format(struct rga_ctx *ctx) +{ + u32 *cmd =3D ctx->rga->cmdbuf_virt; + const struct rga3_fmt *in =3D ctx->in.fmt; + const struct rga3_fmt *out =3D ctx->out.fmt; + const struct v4l2_format_info *in_fmt, *out_fmt; + unsigned int src_h, src_w, dst_h, dst_w; + bool r2y, y2r; + u8 rd_format; + unsigned int reg; + + src_h =3D ctx->in.crop.height; + src_w =3D ctx->in.crop.width; + dst_h =3D ctx->out.crop.height; + dst_w =3D ctx->out.crop.width; + + in_fmt =3D v4l2_format_info(in->fourcc); + out_fmt =3D v4l2_format_info(out->fourcc); + r2y =3D v4l2_is_format_rgb(in_fmt) && v4l2_is_format_yuv(out_fmt); + y2r =3D v4l2_is_format_yuv(in_fmt) && v4l2_is_format_rgb(out_fmt); + + if (in->semi_planar) + rd_format =3D RGA3_RDWR_FORMAT_SEMI_PLANAR; + else + rd_format =3D RGA3_RDWR_FORMAT_INTERLEAVED; + + reg =3D RGA3_WIN0_RD_CTRL - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] |=3D FIELD_PREP(RGA3_WIN_PIC_FORMAT, in->hw_format) + | FIELD_PREP(RGA3_WIN_YC_SWAP, in->yc_swap) + | FIELD_PREP(RGA3_WIN_RBUV_SWAP, in->rbuv_swap) + | FIELD_PREP(RGA3_WIN_RD_FORMAT, rd_format) + | FIELD_PREP(RGA3_WIN_R2Y, r2y) + | FIELD_PREP(RGA3_WIN_Y2R, y2r) + | FIELD_PREP(RGA3_WIN_CSC_MODE, RGA3_WIN_CSC_MODE_BT601_F); +} + +static void rga3_cmd_enable_win0(struct rga_ctx *ctx) +{ + u32 *cmd =3D ctx->rga->cmdbuf_virt; + unsigned int reg; + + reg =3D RGA3_WIN0_RD_CTRL - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] |=3D FIELD_PREP(RGA3_WIN_ENABLE, 1); +} + +static void rga3_cmd_set_wr_format(struct rga_ctx *ctx) +{ + u32 *cmd =3D ctx->rga->cmdbuf_virt; + const struct rga3_fmt *out =3D ctx->out.fmt; + u8 wr_format; + unsigned int reg; + + if (out->semi_planar) + wr_format =3D RGA3_RDWR_FORMAT_SEMI_PLANAR; + else + wr_format =3D RGA3_RDWR_FORMAT_INTERLEAVED; + + reg =3D RGA3_WR_CTRL - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] |=3D FIELD_PREP(RGA3_WR_PIC_FORMAT, out->hw_format) + | FIELD_PREP(RGA3_WR_YC_SWAP, out->yc_swap) + | FIELD_PREP(RGA3_WR_RBUV_SWAP, out->rbuv_swap) + | FIELD_PREP(RGA3_WR_FORMAT, wr_format); +} + +static void rga3_cmd_disable_wr_limitation(struct rga_ctx *ctx) +{ + u32 *cmd =3D ctx->rga->cmdbuf_virt; + unsigned int reg; + + /* Use the max value to avoid limiting the write speed */ + reg =3D RGA3_WR_CTRL - RGA3_FIRST_CMD_REG; + cmd[reg >> 2] |=3D FIELD_PREP(RGA3_WR_SW_OUTSTANDING_MAX, 63); +} + +static void rga3_cmd_set(struct rga_ctx *ctx, + struct rga_vb_buffer *src, struct rga_vb_buffer *dst) +{ + struct rockchip_rga *rga =3D ctx->rga; + + memset(rga->cmdbuf_virt, 0, RGA3_CMDBUF_SIZE * 4); + + rga3_cmd_set_win0_addr(ctx, &src->dma_addrs); + rga3_cmd_set_wr_addr(ctx, &dst->dma_addrs); + + rga3_cmd_set_win0_format(ctx); + rga3_cmd_enable_win0(ctx); + rga3_cmd_set_trans_info(ctx); + rga3_cmd_set_wr_format(ctx); + rga3_cmd_disable_wr_limitation(ctx); + + rga_write(rga, RGA3_CMD_ADDR, rga->cmdbuf_phy); + + /* sync CMD buf for RGA */ + dma_sync_single_for_device(rga->dev, rga->cmdbuf_phy, + PAGE_SIZE, DMA_BIDIRECTIONAL); +} + +static void rga3_hw_start(struct rockchip_rga *rga, + struct rga_vb_buffer *src, struct rga_vb_buffer *dst) +{ + struct rga_ctx *ctx =3D rga->curr; + + rga3_cmd_set(ctx, src, dst); + + /* set to master mode and start the conversion */ + rga_write(rga, RGA3_SYS_CTRL, + FIELD_PREP(RGA3_CMD_MODE, RGA3_CMD_MODE_MASTER)); + rga_write(rga, RGA3_INT_EN, + FIELD_PREP(RGA3_INT_FRM_DONE, 1) | + FIELD_PREP(RGA3_INT_DMA_READ_BUS_ERR, 1) | + FIELD_PREP(RGA3_INT_WIN0_FBC_DEC_ERR, 1) | + FIELD_PREP(RGA3_INT_WIN0_HOR_ERR, 1) | + FIELD_PREP(RGA3_INT_WIN0_VER_ERR, 1) | + FIELD_PREP(RGA3_INT_WR_VER_ERR, 1) | + FIELD_PREP(RGA3_INT_WR_HOR_ERR, 1) | + FIELD_PREP(RGA3_INT_WR_BUS_ERR, 1) | + FIELD_PREP(RGA3_INT_WIN0_IN_FIFO_WR_ERR, 1) | + FIELD_PREP(RGA3_INT_WIN0_IN_FIFO_RD_ERR, 1) | + FIELD_PREP(RGA3_INT_WIN0_HOR_FIFO_WR_ERR, 1) | + FIELD_PREP(RGA3_INT_WIN0_HOR_FIFO_RD_ERR, 1) | + FIELD_PREP(RGA3_INT_WIN0_VER_FIFO_WR_ERR, 1) | + FIELD_PREP(RGA3_INT_WIN0_VER_FIFO_RD_ERR, 1)); + rga_write(rga, RGA3_CMD_CTRL, + FIELD_PREP(RGA3_CMD_LINE_START_PULSE, 1)); +} + +static void rga3_soft_reset(struct rockchip_rga *rga) +{ + u32 i; + + rga_write(rga, RGA3_SYS_CTRL, + FIELD_PREP(RGA3_CCLK_SRESET, 1) | + FIELD_PREP(RGA3_ACLK_SRESET, 1)); + + for (i =3D 0; i < RGA3_RESET_TIMEOUT; i++) { + if (FIELD_GET(RGA3_RO_SRST_DONE, rga_read(rga, RGA3_RO_SRST))) + break; + + udelay(1); + } + + if (i =3D=3D RGA3_RESET_TIMEOUT) + pr_err("Timeout of %d usec reached while waiting for an rga3 soft reset\= n", i); + + rga_write(rga, RGA3_SYS_CTRL, 0); + rga_iommu_restore(rga); +} + +static enum rga_irq_result rga3_handle_irq(struct rockchip_rga *rga) +{ + u32 intr; + + intr =3D rga_read(rga, RGA3_INT_RAW); + /* clear all interrupts */ + rga_write(rga, RGA3_INT_CLR, intr); + + if (FIELD_GET(RGA3_INT_FRM_DONE, intr)) + return RGA_IRQ_DONE; + if (FIELD_GET(RGA3_INT_DMA_READ_BUS_ERR, intr) || + FIELD_GET(RGA3_INT_WIN0_FBC_DEC_ERR, intr) || + FIELD_GET(RGA3_INT_WIN0_HOR_ERR, intr) || + FIELD_GET(RGA3_INT_WIN0_VER_ERR, intr) || + FIELD_GET(RGA3_INT_WR_VER_ERR, intr) || + FIELD_GET(RGA3_INT_WR_HOR_ERR, intr) || + FIELD_GET(RGA3_INT_WR_BUS_ERR, intr) || + FIELD_GET(RGA3_INT_WIN0_IN_FIFO_WR_ERR, intr) || + FIELD_GET(RGA3_INT_WIN0_IN_FIFO_RD_ERR, intr) || + FIELD_GET(RGA3_INT_WIN0_HOR_FIFO_WR_ERR, intr) || + FIELD_GET(RGA3_INT_WIN0_HOR_FIFO_RD_ERR, intr) || + FIELD_GET(RGA3_INT_WIN0_VER_FIFO_WR_ERR, intr) || + FIELD_GET(RGA3_INT_WIN0_VER_FIFO_RD_ERR, intr)) { + rga3_soft_reset(rga); + return RGA_IRQ_ERROR; + } + + return RGA_IRQ_IGNORE; +} + +static void rga3_get_version(struct rockchip_rga *rga) +{ + u32 version =3D rga_read(rga, RGA3_VERSION_NUM); + + rga->version.major =3D FIELD_GET(RGA3_VERSION_NUM_MAJOR, version); + rga->version.minor =3D FIELD_GET(RGA3_VERSION_NUM_MINOR, version); +} + +static struct rga3_fmt rga3_formats[] =3D { + { + .fourcc =3D V4L2_PIX_FMT_RGB24, + .hw_format =3D RGA3_COLOR_FMT_BGR888, + .rbuv_swap =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_BGR24, + .hw_format =3D RGA3_COLOR_FMT_BGR888, + }, + { + .fourcc =3D V4L2_PIX_FMT_ABGR32, + .hw_format =3D RGA3_COLOR_FMT_BGRA8888, + }, + { + .fourcc =3D V4L2_PIX_FMT_RGBA32, + .hw_format =3D RGA3_COLOR_FMT_BGRA8888, + .rbuv_swap =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_XBGR32, + .hw_format =3D RGA3_COLOR_FMT_BGRA8888, + }, + { + .fourcc =3D V4L2_PIX_FMT_RGBX32, + .hw_format =3D RGA3_COLOR_FMT_BGRA8888, + .rbuv_swap =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_RGB565, + .hw_format =3D RGA3_COLOR_FMT_BGR565, + .rbuv_swap =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV12M, + .hw_format =3D RGA3_COLOR_FMT_YUV420, + .semi_planar =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV12, + .hw_format =3D RGA3_COLOR_FMT_YUV420, + .semi_planar =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV21M, + .hw_format =3D RGA3_COLOR_FMT_YUV420, + .rbuv_swap =3D 1, + .semi_planar =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV21, + .hw_format =3D RGA3_COLOR_FMT_YUV420, + .rbuv_swap =3D 1, + .semi_planar =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV16M, + .hw_format =3D RGA3_COLOR_FMT_YUV422, + .semi_planar =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV16, + .hw_format =3D RGA3_COLOR_FMT_YUV422, + .semi_planar =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV61M, + .hw_format =3D RGA3_COLOR_FMT_YUV422, + .rbuv_swap =3D 1, + .semi_planar =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV61, + .hw_format =3D RGA3_COLOR_FMT_YUV422, + .rbuv_swap =3D 1, + .semi_planar =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_YUYV, + .hw_format =3D RGA3_COLOR_FMT_YUV422, + .yc_swap =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_YVYU, + .hw_format =3D RGA3_COLOR_FMT_YUV422, + .yc_swap =3D 1, + .rbuv_swap =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_UYVY, + .hw_format =3D RGA3_COLOR_FMT_YUV422, + }, + { + .fourcc =3D V4L2_PIX_FMT_VYUY, + .hw_format =3D RGA3_COLOR_FMT_YUV422, + .rbuv_swap =3D 1, + }, + /* Input only formats last to keep rga3_enum_format simple */ + { + .fourcc =3D V4L2_PIX_FMT_ARGB32, + .hw_format =3D RGA3_COLOR_FMT_ABGR8888, + .rbuv_swap =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_BGRA32, + .hw_format =3D RGA3_COLOR_FMT_ABGR8888, + }, + { + .fourcc =3D V4L2_PIX_FMT_XRGB32, + .hw_format =3D RGA3_COLOR_FMT_ABGR8888, + .rbuv_swap =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_BGRX32, + .hw_format =3D RGA3_COLOR_FMT_ABGR8888, + }, +}; + +static int rga3_enum_format(struct v4l2_fmtdesc *f) +{ + struct rga3_fmt *fmt; + + if (f->index >=3D ARRAY_SIZE(rga3_formats)) + return -EINVAL; + + fmt =3D &rga3_formats[f->index]; + if (V4L2_TYPE_IS_CAPTURE(f->type) && !rga3_can_capture(fmt)) + return -EINVAL; + + f->pixelformat =3D fmt->fourcc; + return 0; +} + +static void *rga3_try_format(u32 *fourcc, bool is_output) +{ + unsigned int i; + + if (!fourcc) + return &rga3_formats[0]; + + for (i =3D 0; i < ARRAY_SIZE(rga3_formats); i++) { + if (!is_output && !rga3_can_capture(&rga3_formats[i])) + continue; + + if (rga3_formats[i].fourcc =3D=3D *fourcc) + return &rga3_formats[i]; + } + + *fourcc =3D rga3_formats[0].fourcc; + return &rga3_formats[0]; +} + +const struct rga_hw rga3_hw =3D { + .card_type =3D "rga3", + .has_internal_iommu =3D false, + .cmdbuf_size =3D RGA3_CMDBUF_SIZE, + .min_width =3D RGA3_MIN_WIDTH, + .min_height =3D RGA3_MIN_HEIGHT, + .max_width =3D RGA3_MAX_INPUT_WIDTH, + .max_height =3D RGA3_MAX_INPUT_HEIGHT, + + .start =3D rga3_hw_start, + .handle_irq =3D rga3_handle_irq, + .get_version =3D rga3_get_version, + .enum_format =3D rga3_enum_format, + .try_format =3D rga3_try_format, +}; diff --git a/drivers/media/platform/rockchip/rga/rga3-hw.h b/drivers/media/= platform/rockchip/rga/rga3-hw.h new file mode 100644 index 0000000000000000000000000000000000000000..3829469e310706c11ecc52f40d3= d1eb43a61d9c2 --- /dev/null +++ b/drivers/media/platform/rockchip/rga/rga3-hw.h @@ -0,0 +1,186 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) Pengutronix e.K. + * Author: Sven P=C3=BCschel + */ +#ifndef __RGA3_HW_H__ +#define __RGA3_HW_H__ + +#include + +#define RGA3_CMDBUF_SIZE 0x2e + +#define RGA3_MIN_WIDTH 128 +#define RGA3_MIN_HEIGHT 128 +#define RGA3_MAX_INPUT_WIDTH (8192 - 16) +#define RGA3_MAX_INPUT_HEIGHT (8192 - 16) +#define RGA3_RESET_TIMEOUT 1000 + +/* Registers address */ +/* sys reg */ +#define RGA3_SYS_CTRL 0x000 +#define RGA3_CMD_CTRL 0x004 +#define RGA3_CMD_ADDR 0x008 +#define RGA3_MI_GROUP_CTRL 0x00c +#define RGA3_ARQOS_CTRL 0x010 +#define RGA3_VERSION_NUM 0x018 +#define RGA3_VERSION_TIM 0x01c +#define RGA3_INT_EN 0x020 +#define RGA3_INT_RAW 0x024 +#define RGA3_INT_MSK 0x028 +#define RGA3_INT_CLR 0x02c +#define RGA3_RO_SRST 0x030 +#define RGA3_STATUS0 0x034 +#define RGA3_SCAN_CNT 0x038 +#define RGA3_CMD_STATE 0x040 + +/* cmd reg */ +#define RGA3_WIN0_RD_CTRL 0x100 +#define RGA3_FIRST_CMD_REG RGA3_WIN0_RD_CTRL +#define RGA3_WIN0_Y_BASE 0x110 +#define RGA3_WIN0_U_BASE 0x114 +#define RGA3_WIN0_V_BASE 0x118 +#define RGA3_WIN0_VIR_STRIDE 0x11c +#define RGA3_WIN0_FBC_OFF 0x120 +#define RGA3_WIN0_SRC_SIZE 0x124 +#define RGA3_WIN0_ACT_OFF 0x128 +#define RGA3_WIN0_ACT_SIZE 0x12c +#define RGA3_WIN0_DST_SIZE 0x130 +#define RGA3_WIN0_SCL_FAC 0x134 +#define RGA3_WIN0_UV_VIR_STRIDE 0x138 +#define RGA3_WIN1_RD_CTRL 0x140 +#define RGA3_WIN1_Y_BASE 0x150 +#define RGA3_WIN1_U_BASE 0x154 +#define RGA3_WIN1_V_BASE 0x158 +#define RGA3_WIN1_VIR_STRIDE 0x15c +#define RGA3_WIN1_FBC_OFF 0x160 +#define RGA3_WIN1_SRC_SIZE 0x164 +#define RGA3_WIN1_ACT_OFF 0x168 +#define RGA3_WIN1_ACT_SIZE 0x16c +#define RGA3_WIN1_DST_SIZE 0x170 +#define RGA3_WIN1_SCL_FAC 0x174 +#define RGA3_WIN1_UV_VIR_STRIDE 0x178 +#define RGA3_OVLP_CTRL 0x180 +#define RGA3_OVLP_OFF 0x184 +#define RGA3_OVLP_TOP_KEY_MIN 0x188 +#define RGA3_OVLP_TOP_KEY_MAX 0x18c +#define RGA3_OVLP_TOP_CTRL 0x190 +#define RGA3_OVLP_BOT_CTRL 0x194 +#define RGA3_OVLP_TOP_ALPHA 0x198 +#define RGA3_OVLP_BOT_ALPHA 0x19c +#define RGA3_WR_CTRL 0x1a0 +#define RGA3_WR_FBCE_CTRL 0x1a4 +#define RGA3_WR_VIR_STRIDE 0x1a8 +#define RGA3_WR_PL_VIR_STRIDE 0x1ac +#define RGA3_WR_Y_BASE 0x1b0 +#define RGA3_WR_U_BASE 0x1b4 +#define RGA3_WR_V_BASE 0x1b8 + +/* Registers value */ +#define RGA3_COLOR_FMT_YUV420 0x0 +#define RGA3_COLOR_FMT_YUV422 0x1 +#define RGA3_COLOR_FMT_YUV420_10B 0x2 +#define RGA3_COLOR_FMT_YUV422_10B 0x3 +/* + * Use memory ordering names + * instead of the datasheet naming RGB formats in big endian order + */ +#define RGA3_COLOR_FMT_BGR565 0x4 +#define RGA3_COLOR_FMT_BGR888 0x5 +#define RGA3_COLOR_FMT_FIRST_HAS_ALPHA RGA3_COLOR_FMT_BGRA8888 +#define RGA3_COLOR_FMT_BGRA8888 0x6 +#define RGA3_COLOR_FMT_LAST_OUTPUT RGA3_COLOR_FMT_BGRA8888 +/* the following are only supported as inputs */ +#define RGA3_COLOR_FMT_ABGR8888 0x7 +/* + * the following seem to be unnecessary, + * as they can be achieved with RB swaps + */ +#define RGA3_COLOR_FMT_RGBA8888 0x8 +#define RGA3_COLOR_FMT_ARGB8888 0x9 + +#define RGA3_RDWR_FORMAT_SEMI_PLANAR 0x1 +#define RGA3_RDWR_FORMAT_INTERLEAVED 0x2 + +#define RGA3_CMD_MODE_MASTER 0x1 + +#define RGA3_WIN_CSC_MODE_BT601_F 0x2 + +/* RGA masks */ +/* SYS_CTRL */ +#define RGA3_CCLK_SRESET BIT(4) +#define RGA3_ACLK_SRESET BIT(3) +#define RGA3_CMD_MODE BIT(1) + +/* CMD_CTRL */ +#define RGA3_CMD_LINE_START_PULSE BIT(0) + +/* VERSION_NUM */ +#define RGA3_VERSION_NUM_MAJOR GENMASK(31, 28) +#define RGA3_VERSION_NUM_MINOR GENMASK(27, 20) + +/* INT_* */ +#define RGA3_INT_FRM_DONE BIT(0) +#define RGA3_INT_DMA_READ_BUS_ERR BIT(2) +#define RGA3_INT_WIN0_FBC_DEC_ERR BIT(5) +#define RGA3_INT_WIN0_HOR_ERR BIT(6) +#define RGA3_INT_WIN0_VER_ERR BIT(7) +#define RGA3_INT_WR_VER_ERR BIT(13) +#define RGA3_INT_WR_HOR_ERR BIT(14) +#define RGA3_INT_WR_BUS_ERR BIT(15) +#define RGA3_INT_WIN0_IN_FIFO_WR_ERR BIT(16) +#define RGA3_INT_WIN0_IN_FIFO_RD_ERR BIT(17) +#define RGA3_INT_WIN0_HOR_FIFO_WR_ERR BIT(18) +#define RGA3_INT_WIN0_HOR_FIFO_RD_ERR BIT(19) +#define RGA3_INT_WIN0_VER_FIFO_WR_ERR BIT(20) +#define RGA3_INT_WIN0_VER_FIFO_RD_ERR BIT(21) + +/* RO_SRST */ +#define RGA3_RO_SRST_DONE GENMASK(5, 0) + +/* *_SIZE */ +#define RGA3_HEIGHT GENMASK(28, 16) +#define RGA3_WIDTH GENMASK(12, 0) + +/* SCL_FAC */ +#define RGA3_SCALE_VER_FAC GENMASK(31, 16) +#define RGA3_SCALE_HOR_FAC GENMASK(15, 0) + +/* WINx_CTRL */ +#define RGA3_WIN_CSC_MODE GENMASK(27, 26) +#define RGA3_WIN_R2Y BIT(25) +#define RGA3_WIN_Y2R BIT(24) +#define RGA3_WIN_SCALE_VER_UP BIT(23) +#define RGA3_WIN_SCALE_VER_BYPASS BIT(22) +#define RGA3_WIN_SCALE_HOR_UP BIT(21) +#define RGA3_WIN_SCALE_HOR_BYPASS BIT(20) +#define RGA3_WIN_YC_SWAP BIT(13) +#define RGA3_WIN_RBUV_SWAP BIT(12) +#define RGA3_WIN_RD_FORMAT GENMASK(9, 8) +#define RGA3_WIN_PIC_FORMAT GENMASK(7, 4) +#define RGA3_WIN_ENABLE BIT(0) + +/* COLOR_CTRL */ +#define RGA3_OVLP_GLOBAL_ALPHA GENMASK(23, 16) +#define RGA3_OVLP_COLOR_MODE BIT(0) + +/* ALPHA_CTRL */ +#define RGA3_ALPHA_SELECT_MODE BIT(4) +#define RGA3_ALPHA_BLEND_MODE GENMASK(3, 2) + +/* WR_CTRL */ +#define RGA3_WR_YC_SWAP BIT(20) +#define RGA3_WR_SW_OUTSTANDING_MAX GENMASK(18, 13) +#define RGA3_WR_RBUV_SWAP BIT(12) +#define RGA3_WR_FORMAT GENMASK(9, 8) +#define RGA3_WR_PIC_FORMAT GENMASK(7, 4) + +struct rga3_fmt { + u32 fourcc; + u8 hw_format; + bool rbuv_swap; + bool yc_swap; + bool semi_planar; +}; + +#endif --=20 2.51.0