From nobody Wed Dec 17 19:18:06 2025 Received: from freeshell.de (freeshell.de [116.202.128.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 236A31AAA1C; Sun, 5 Oct 2025 17:46:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.202.128.144 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759686376; cv=none; b=PWkQQTJNfgbocBokXbrsNs7j4imBysqcZhpUHW0w6+TIAPMW3xclh2IypJXgpe/C9t0jc7oT7E9nNnzHd7hyyEKBFEgS7RY8yV5voyPCuO5Z4adhfdq3SCgHpkUejYcpX9Xp89s5+q6V/CnELe6Qf81w+qmsECntasGLC6yjg5E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759686376; c=relaxed/simple; bh=a0N1zcN86aqW1+2RupNVIT1sSg6OWkR+fyhZihL9WUg=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=cwGC8tagJDxZ/cGrvNMJNiuzU2VZENItg4Av/6N4dTWaBo7aISFRaVlmefUNPxvHnLV7kjAk1c8eO+gKe1pX8y/KRx6eTqtfhu6dKCNog1ZtC9ME3jnuNl7+0RIOGKNj0QJntoa1wUnsPzJQEUe+zQhYS19OHTNUYqC+Mzfx7Bk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=freeshell.de; spf=pass smtp.mailfrom=freeshell.de; arc=none smtp.client-ip=116.202.128.144 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=freeshell.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=freeshell.de Received: from hay.lan (unknown [IPv6:2605:59c0:2078:cf00:6ecf:39ff:fe00:8375]) (Authenticated sender: e) by freeshell.de (Postfix) with ESMTPSA id A498BB220074; Sun, 5 Oct 2025 19:46:02 +0200 (CEST) From: E Shattow To: Emil Renner Berthing , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: E Shattow , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] dts: starfive: jh7110-common: split out mmc0 reset pins from common into boards Date: Sun, 5 Oct 2025 10:44:28 -0700 Message-ID: <20251005174450.1949110-1-e@freeshell.de> X-Mailer: git-send-email 2.50.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Prepare for Orange Pi RV using jh7110-common.dtsi having GPIO62 assignment different than mmc0 reset by splitting this out into each board dts. Signed-off-by: E Shattow --- arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 11 ----------- .../dts/starfive/jh7110-deepcomputing-fml13v01.dts | 13 +++++++++++++ arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts | 13 +++++++++++++ .../boot/dts/starfive/jh7110-milkv-marscm.dtsi | 13 +++++++++++++ .../boot/dts/starfive/jh7110-pine64-star64.dts | 13 +++++++++++++ .../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 13 +++++++++++++ 6 files changed, 65 insertions(+), 11 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/b= oot/dts/starfive/jh7110-common.dtsi index 5dc15e48b74b..083ec80b4e44 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -444,17 +444,6 @@ GPOEN_SYS_I2C6_DATA, }; =20 mmc0_pins: mmc0-0 { - rst-pins { - pinmux =3D ; - bias-pull-up; - drive-strength =3D <12>; - input-disable; - input-schmitt-disable; - slew-rate =3D <0>; - }; - mmc-pins { pinmux =3D , , diff --git a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts= b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts index f2857d021d68..0243e54a84ed 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts @@ -11,6 +11,19 @@ / { compatible =3D "deepcomputing,fml13v01", "starfive,jh7110"; }; =20 +&mmc0_pins { + rst-pins { + pinmux =3D ; + bias-pull-up; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; +}; + &pcie1 { perst-gpios =3D <&sysgpio 21 GPIO_ACTIVE_LOW>; phys =3D <&pciephy1>; diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/risc= v/boot/dts/starfive/jh7110-milkv-mars.dts index fdaf6b4557da..5ca10597dcd9 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts @@ -22,6 +22,19 @@ &i2c0 { status =3D "okay"; }; =20 +&mmc0_pins { + rst-pins { + pinmux =3D ; + bias-pull-up; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; +}; + &pcie0 { status =3D "okay"; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi b/arch/r= iscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi index 25b70af564ee..025471061d43 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi @@ -40,6 +40,19 @@ &i2c6 { status =3D "disabled"; }; =20 +&mmc0_pins { + rst-pins { + pinmux =3D ; + bias-pull-up; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; +}; + &mmc1 { #address-cells =3D <1>; #size-cells =3D <0>; diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/r= iscv/boot/dts/starfive/jh7110-pine64-star64.dts index 31e825be2065..980e24e3dbc8 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts @@ -44,6 +44,19 @@ &i2c0 { status =3D "okay"; }; =20 +&mmc0_pins { + rst-pins { + pinmux =3D ; + bias-pull-up; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; +}; + &pcie1 { status =3D "okay"; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi= b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 5f14afb2c24d..574e128138c2 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -41,6 +41,19 @@ &mmc0 { non-removable; }; =20 +&mmc0_pins { + rst-pins { + pinmux =3D ; + bias-pull-up; + drive-strength =3D <12>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; +}; + &pcie0 { status =3D "okay"; }; base-commit: 6093a688a07da07808f0122f9aa2a3eed250d853 --=20 2.50.0