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charset="utf-8" Out of broad need for the register and bitfield macros in Rust, move them out of nova into the kernel crate. Several usecases need them (Nova is already using these and Tyr developers said they need them). bitfield moved into kernel crate - defines bitfields in Rust. register moved into io module - defines hardware registers and accessors. Reviewed-by: Alexandre Courbot Reviewed-by: Elle Rhumsaa Signed-off-by: Joel Fernandes --- drivers/gpu/nova-core/falcon.rs | 2 +- drivers/gpu/nova-core/falcon/gsp.rs | 4 +- drivers/gpu/nova-core/falcon/sec2.rs | 2 +- drivers/gpu/nova-core/nova_core.rs | 3 - drivers/gpu/nova-core/regs.rs | 6 +- .../gpu/nova-core =3D> rust/kernel}/bitfield.rs | 27 ++++----- rust/kernel/io.rs | 1 + .../macros.rs =3D> rust/kernel/io/register.rs | 58 ++++++++++--------- rust/kernel/lib.rs | 1 + 9 files changed, 54 insertions(+), 50 deletions(-) rename {drivers/gpu/nova-core =3D> rust/kernel}/bitfield.rs (91%) rename drivers/gpu/nova-core/regs/macros.rs =3D> rust/kernel/io/register.r= s (93%) diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon= .rs index 37e6298195e4..a15fa98c8614 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -6,6 +6,7 @@ use hal::FalconHal; use kernel::device; use kernel::dma::DmaAddress; +use kernel::io::register::RegisterBase; use kernel::prelude::*; use kernel::sync::aref::ARef; use kernel::time::Delta; @@ -14,7 +15,6 @@ use crate::driver::Bar0; use crate::gpu::Chipset; use crate::regs; -use crate::regs::macros::RegisterBase; use crate::util; =20 pub(crate) mod gsp; diff --git a/drivers/gpu/nova-core/falcon/gsp.rs b/drivers/gpu/nova-core/fa= lcon/gsp.rs index f17599cb49fa..cd4960e997c8 100644 --- a/drivers/gpu/nova-core/falcon/gsp.rs +++ b/drivers/gpu/nova-core/falcon/gsp.rs @@ -1,9 +1,11 @@ // SPDX-License-Identifier: GPL-2.0 =20 +use kernel::io::register::RegisterBase; + use crate::{ driver::Bar0, falcon::{Falcon, FalconEngine, PFalcon2Base, PFalconBase}, - regs::{self, macros::RegisterBase}, + regs::self, }; =20 /// Type specifying the `Gsp` falcon engine. Cannot be instantiated. diff --git a/drivers/gpu/nova-core/falcon/sec2.rs b/drivers/gpu/nova-core/f= alcon/sec2.rs index 815786c8480d..81717868a8a8 100644 --- a/drivers/gpu/nova-core/falcon/sec2.rs +++ b/drivers/gpu/nova-core/falcon/sec2.rs @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 =20 use crate::falcon::{FalconEngine, PFalcon2Base, PFalconBase}; -use crate::regs::macros::RegisterBase; +use kernel::io::register::RegisterBase; =20 /// Type specifying the `Sec2` falcon engine. Cannot be instantiated. pub(crate) struct Sec2(()); diff --git a/drivers/gpu/nova-core/nova_core.rs b/drivers/gpu/nova-core/nov= a_core.rs index 112277c7921e..fffcaee2249f 100644 --- a/drivers/gpu/nova-core/nova_core.rs +++ b/drivers/gpu/nova-core/nova_core.rs @@ -2,9 +2,6 @@ =20 //! Nova Core GPU Driver =20 -#[macro_use] -mod bitfield; - mod dma; mod driver; mod falcon; diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs index 206dab2e1335..1f08e6d4045a 100644 --- a/drivers/gpu/nova-core/regs.rs +++ b/drivers/gpu/nova-core/regs.rs @@ -4,15 +4,13 @@ // but are mapped to types. #![allow(non_camel_case_types)] =20 -#[macro_use] -pub(crate) mod macros; - use crate::falcon::{ DmaTrfCmdSize, FalconCoreRev, FalconCoreRevSubversion, FalconFbifMemTy= pe, FalconFbifTarget, FalconModSelAlgo, FalconSecurityModel, PFalcon2Base, PFalconBase, Pere= grineCoreSelect, }; use crate::gpu::{Architecture, Chipset}; use kernel::prelude::*; +use kernel::register; =20 // PMC =20 @@ -331,6 +329,7 @@ pub(crate) fn mem_scrubbing_done(self) -> bool { =20 pub(crate) mod gm107 { // FUSE + use kernel::register; =20 register!(NV_FUSE_STATUS_OPT_DISPLAY @ 0x00021c04 { 0:0 display_disabled as bool; @@ -339,6 +338,7 @@ pub(crate) mod gm107 { =20 pub(crate) mod ga100 { // FUSE + use kernel::register; =20 register!(NV_FUSE_STATUS_OPT_DISPLAY @ 0x00820c04 { 0:0 display_disabled as bool; diff --git a/drivers/gpu/nova-core/bitfield.rs b/rust/kernel/bitfield.rs similarity index 91% rename from drivers/gpu/nova-core/bitfield.rs rename to rust/kernel/bitfield.rs index cbedbb0078f6..09cd5741598c 100644 --- a/drivers/gpu/nova-core/bitfield.rs +++ b/rust/kernel/bitfield.rs @@ -9,7 +9,7 @@ /// # Syntax /// /// ```rust -/// use nova_core::bitfield; +/// use kernel::bitfield; /// /// #[derive(Debug, Clone, Copy, Default)] /// enum Mode { @@ -82,10 +82,11 @@ /// the result. /// - `as ?=3D> ` calls ``'s `TryFrom= ::<>` implementation /// and returns the result. This is useful with fields for which not all= values are valid. +#[macro_export] macro_rules! bitfield { // Main entry point - defines the bitfield struct with fields ($vis:vis struct $name:ident($storage:ty) $(, $comment:literal)? { $($= fields:tt)* }) =3D> { - bitfield!(@core $vis $name $storage $(, $comment)? { $($fields)* }= ); + ::kernel::bitfield!(@core $vis $name $storage $(, $comment)? { $($= fields)* }); }; =20 // All rules below are helpers. @@ -114,7 +115,7 @@ fn from(val: $name) -> $storage { } } =20 - bitfield!(@fields_dispatcher $vis $name $storage { $($fields)* }); + ::kernel::bitfield!(@fields_dispatcher $vis $name $storage { $($fi= elds)* }); }; =20 // Captures the fields and passes them to all the implementers that re= quire field information. @@ -130,7 +131,7 @@ fn from(val: $name) -> $storage { )* } ) =3D> { - bitfield!(@field_accessors $vis $name $storage { + ::kernel::bitfield!(@field_accessors $vis $name $storage { $( $hi:$lo $field as $type $(?=3D> $try_into_type)? @@ -139,8 +140,8 @@ fn from(val: $name) -> $storage { ; )* }); - bitfield!(@debug $name { $($field;)* }); - bitfield!(@default $name { $($field;)* }); + ::kernel::bitfield!(@debug $name { $($field;)* }); + ::kernel::bitfield!(@default $name { $($field;)* }); }; =20 // Defines all the field getter/setter methods for `$name`. @@ -155,13 +156,13 @@ fn from(val: $name) -> $storage { } ) =3D> { $( - bitfield!(@check_field_bounds $hi:$lo $field as $type); + ::kernel::bitfield!(@check_field_bounds $hi:$lo $field as $typ= e); )* =20 #[allow(dead_code)] impl $name { $( - bitfield!(@field_accessor $vis $name $storage, $hi:$lo $field = as $type + ::kernel::bitfield!(@field_accessor $vis $name $storage, $hi:$= lo $field as $type $(?=3D> $try_into_type)? $(=3D> $into_type)? $(, $comment)? @@ -198,7 +199,7 @@ impl $name { @field_accessor $vis:vis $name:ident $storage:ty, $hi:tt:$lo:tt $f= ield:ident as bool =3D> $into_type:ty $(, $comment:literal)?; ) =3D> { - bitfield!( + ::kernel::bitfield!( @leaf_accessor $vis $name $storage, $hi:$lo $field { |f| <$into_type>::from(if f !=3D 0 { true } else { false }) } $into_type =3D> $into_type $(, $comment)?; @@ -209,7 +210,7 @@ impl $name { ( @field_accessor $vis:vis $name:ident $storage:ty, $hi:tt:$lo:tt $f= ield:ident as bool $(, $comment:literal)?; ) =3D> { - bitfield!(@field_accessor $vis $name $storage, $hi:$lo $field as b= ool =3D> bool $(, $comment)?;); + ::kernel::bitfield!(@field_accessor $vis $name $storage, $hi:$lo $= field as bool =3D> bool $(, $comment)?;); }; =20 // Catches the `?=3D>` syntax for non-boolean fields. @@ -217,7 +218,7 @@ impl $name { @field_accessor $vis:vis $name:ident $storage:ty, $hi:tt:$lo:tt $f= ield:ident as $type:tt ?=3D> $try_into_type:ty $(, $comment:literal)?; ) =3D> { - bitfield!(@leaf_accessor $vis $name $storage, $hi:$lo $field + ::kernel::bitfield!(@leaf_accessor $vis $name $storage, $hi:$lo $f= ield { |f| <$try_into_type>::try_from(f as $type) } $try_into_type = =3D> ::core::result::Result< $try_into_type, @@ -231,7 +232,7 @@ impl $name { @field_accessor $vis:vis $name:ident $storage:ty, $hi:tt:$lo:tt $f= ield:ident as $type:tt =3D> $into_type:ty $(, $comment:literal)?; ) =3D> { - bitfield!(@leaf_accessor $vis $name $storage, $hi:$lo $field + ::kernel::bitfield!(@leaf_accessor $vis $name $storage, $hi:$lo $f= ield { |f| <$into_type>::from(f as $type) } $into_type =3D> $into_t= ype $(, $comment)?;); }; =20 @@ -240,7 +241,7 @@ impl $name { @field_accessor $vis:vis $name:ident $storage:ty, $hi:tt:$lo:tt $f= ield:ident as $type:tt $(, $comment:literal)?; ) =3D> { - bitfield!(@field_accessor $vis $name $storage, $hi:$lo $field as $= type =3D> $type $(, $comment)?;); + ::kernel::bitfield!(@field_accessor $vis $name $storage, $hi:$lo $= field as $type =3D> $type $(, $comment)?;); }; =20 // Generates the accessor methods for a single field. diff --git a/rust/kernel/io.rs b/rust/kernel/io.rs index 03b467722b86..a79b603604b1 100644 --- a/rust/kernel/io.rs +++ b/rust/kernel/io.rs @@ -8,6 +8,7 @@ use crate::{bindings, build_assert, ffi::c_void}; =20 pub mod mem; +pub mod register; pub mod resource; =20 pub use resource::Resource; diff --git a/drivers/gpu/nova-core/regs/macros.rs b/rust/kernel/io/register= .rs similarity index 93% rename from drivers/gpu/nova-core/regs/macros.rs rename to rust/kernel/io/register.rs index c0a5194e8d97..c24d956f122f 100644 --- a/drivers/gpu/nova-core/regs/macros.rs +++ b/rust/kernel/io/register.rs @@ -17,7 +17,8 @@ /// The `T` generic argument is used to distinguish which base to use, in = case a type provides /// several bases. It is given to the `register!` macro to restrict the us= e of the register to /// implementors of this particular variant. -pub(crate) trait RegisterBase { +pub trait RegisterBase { + /// The base address for the register. const BASE: usize; } =20 @@ -26,7 +27,7 @@ pub(crate) trait RegisterBase { /// /// Example: /// -/// ```no_run +/// ```ignore /// register!(BOOT_0 @ 0x00000100, "Basic revision information about the G= PU" { /// 3:0 minor_revision as u8, "Minor revision of the chip"; /// 7:4 major_revision as u8, "Major revision of the chip"; @@ -39,7 +40,7 @@ pub(crate) trait RegisterBase { /// significant bits of the register. Each field can be accessed and modif= ied using accessor /// methods: /// -/// ```no_run +/// ```ignore /// // Read from the register's defined offset (0x100). /// let boot0 =3D BOOT_0::read(&bar); /// pr_info!("chip revision: {}.{}", boot0.major_revision(), boot0.minor_r= evision()); @@ -61,7 +62,7 @@ pub(crate) trait RegisterBase { /// It is also possible to create a alias register by using the `=3D> ALIA= S` syntax. This is useful /// for cases where a register's interpretation depends on the context: /// -/// ```no_run +/// ```ignore /// register!(SCRATCH @ 0x00000200, "Scratch register" { /// 31:0 value as u32, "Raw value"; /// }); @@ -111,7 +112,7 @@ pub(crate) trait RegisterBase { /// this register needs to implement `RegisterBase`. Here is the abo= ve example translated /// into code: /// -/// ```no_run +/// ```ignore /// // Type used to identify the base. /// pub(crate) struct CpuCtlBase; /// @@ -162,7 +163,7 @@ pub(crate) trait RegisterBase { /// compile-time or runtime bound checking. Simply define their address as= `Address[Size]`, and add /// an `idx` parameter to their `read`, `write` and `alter` methods: /// -/// ```no_run +/// ```ignore /// # fn no_run() -> Result<(), Error> { /// # fn get_scratch_idx() -> usize { /// # 0x15 @@ -211,7 +212,7 @@ pub(crate) trait RegisterBase { /// Combining the two features described in the sections above, arrays of = registers accessible from /// a base can also be defined: /// -/// ```no_run +/// ```ignore /// # fn no_run() -> Result<(), Error> { /// # fn get_scratch_idx() -> usize { /// # 0x15 @@ -273,28 +274,29 @@ pub(crate) trait RegisterBase { /// # Ok(()) /// # } /// ``` +#[macro_export] macro_rules! register { // Creates a register at a fixed offset of the MMIO space. ($name:ident @ $offset:literal $(, $comment:literal)? { $($fields:tt)*= } ) =3D> { - bitfield!(pub(crate) struct $name(u32) $(, $comment)? { $($fields)= * } ); + ::kernel::bitfield!(pub(crate) struct $name(u32) $(, $comment)? { = $($fields)* } ); register!(@io_fixed $name @ $offset); }; =20 // Creates an alias register of fixed offset register `alias` with its= own fields. ($name:ident =3D> $alias:ident $(, $comment:literal)? { $($fields:tt)*= } ) =3D> { - bitfield!(pub(crate) struct $name(u32) $(, $comment)? { $($fields)= * } ); + ::kernel::bitfield!(pub(crate) struct $name(u32) $(, $comment)? { = $($fields)* } ); register!(@io_fixed $name @ $alias::OFFSET); }; =20 // Creates a register at a relative offset from a base address provide= r. ($name:ident @ $base:ty [ $offset:literal ] $(, $comment:literal)? { $= ($fields:tt)* } ) =3D> { - bitfield!(pub(crate) struct $name(u32) $(, $comment)? { $($fields)= * } ); + ::kernel::bitfield!(pub(crate) struct $name(u32) $(, $comment)? { = $($fields)* } ); register!(@io_relative $name @ $base [ $offset ]); }; =20 // Creates an alias register of relative offset register `alias` with = its own fields. ($name:ident =3D> $base:ty [ $alias:ident ] $(, $comment:literal)? { $= ($fields:tt)* }) =3D> { - bitfield!(pub(crate) struct $name(u32) $(, $comment)? { $($fields)= * } ); + ::kernel::bitfield!(pub(crate) struct $name(u32) $(, $comment)? { = $($fields)* } ); register!(@io_relative $name @ $base [ $alias::OFFSET ]); }; =20 @@ -305,7 +307,7 @@ macro_rules! register { } ) =3D> { static_assert!(::core::mem::size_of::() <=3D $stride); - bitfield!(pub(crate) struct $name(u32) $(, $comment)? { $($fields)= * } ); + ::kernel::bitfield!(pub(crate) struct $name(u32) $(, $comment)? { = $($fields)* } ); register!(@io_array $name @ $offset [ $size ; $stride ]); }; =20 @@ -326,7 +328,7 @@ macro_rules! register { $(, $comment:literal)? { $($fields:tt)* } ) =3D> { static_assert!(::core::mem::size_of::() <=3D $stride); - bitfield!(pub(crate) struct $name(u32) $(, $comment)? { $($fields)= * } ); + ::kernel::bitfield!(pub(crate) struct $name(u32) $(, $comment)? { = $($fields)* } ); register!(@io_relative_array $name @ $base [ $offset [ $size ; $st= ride ] ]); }; =20 @@ -348,7 +350,7 @@ macro_rules! register { } ) =3D> { static_assert!($idx < $alias::SIZE); - bitfield!(pub(crate) struct $name(u32) $(, $comment)? { $($fields)= * } ); + ::kernel::bitfield!(pub(crate) struct $name(u32) $(, $comment)? { = $($fields)* } ); register!(@io_relative $name @ $base [ $alias::OFFSET + $idx * $al= ias::STRIDE ] ); }; =20 @@ -357,7 +359,7 @@ macro_rules! register { // to avoid it being interpreted in place of the relative register arr= ay alias rule. ($name:ident =3D> $alias:ident [ $idx:expr ] $(, $comment:literal)? { = $($fields:tt)* }) =3D> { static_assert!($idx < $alias::SIZE); - bitfield!(pub(crate) struct $name(u32) $(, $comment)? { $($fields)= * } ); + ::kernel::bitfield!(pub(crate) struct $name(u32) $(, $comment)? { = $($fields)* } ); register!(@io_fixed $name @ $alias::OFFSET + $idx * $alias::STRIDE= ); }; =20 @@ -414,12 +416,12 @@ pub(crate) fn read( base: &B, ) -> Self where T: ::core::ops::Deref>, - B: crate::regs::macros::RegisterBase<$base>, + B: ::kernel::io::register::RegisterBase<$base>, { const OFFSET: usize =3D $name::OFFSET; =20 let value =3D io.read32( - >::BASE = + OFFSET + >::BA= SE + OFFSET ); =20 Self(value) @@ -435,13 +437,13 @@ pub(crate) fn write( base: &B, ) where T: ::core::ops::Deref>, - B: crate::regs::macros::RegisterBase<$base>, + B: ::kernel::io::register::RegisterBase<$base>, { const OFFSET: usize =3D $name::OFFSET; =20 io.write32( self.0, - >::BASE = + OFFSET + >::BA= SE + OFFSET ); } =20 @@ -455,7 +457,7 @@ pub(crate) fn alter( f: F, ) where T: ::core::ops::Deref>, - B: crate::regs::macros::RegisterBase<$base>, + B: ::kernel::io::register::RegisterBase<$base>, F: ::core::ops::FnOnce(Self) -> Self, { let reg =3D f(Self::read(io, base)); @@ -600,11 +602,11 @@ pub(crate) fn read( idx: usize, ) -> Self where T: ::core::ops::Deref>, - B: crate::regs::macros::RegisterBase<$base>, + B: ::kernel::io::register::RegisterBase<$base>, { build_assert!(idx < Self::SIZE); =20 - let offset =3D >::BASE + + let offset =3D >::BASE + Self::OFFSET + (idx * Self::STRIDE); let value =3D io.read32(offset); =20 @@ -622,11 +624,11 @@ pub(crate) fn write( idx: usize ) where T: ::core::ops::Deref>, - B: crate::regs::macros::RegisterBase<$base>, + B: ::kernel::io::register::RegisterBase<$base>, { build_assert!(idx < Self::SIZE); =20 - let offset =3D >::BASE + + let offset =3D >::BASE + Self::OFFSET + (idx * Self::STRIDE); =20 io.write32(self.0, offset); @@ -643,7 +645,7 @@ pub(crate) fn alter( f: F, ) where T: ::core::ops::Deref>, - B: crate::regs::macros::RegisterBase<$base>, + B: ::kernel::io::register::RegisterBase<$base>, F: ::core::ops::FnOnce(Self) -> Self, { let reg =3D f(Self::read(io, base, idx)); @@ -662,7 +664,7 @@ pub(crate) fn try_read( idx: usize, ) -> ::kernel::error::Result where T: ::core::ops::Deref>, - B: crate::regs::macros::RegisterBase<$base>, + B: ::kernel::io::register::RegisterBase<$base>, { if idx < Self::SIZE { Ok(Self::read(io, base, idx)) @@ -684,7 +686,7 @@ pub(crate) fn try_write( idx: usize, ) -> ::kernel::error::Result where T: ::core::ops::Deref>, - B: crate::regs::macros::RegisterBase<$base>, + B: ::kernel::io::register::RegisterBase<$base>, { if idx < Self::SIZE { Ok(self.write(io, base, idx)) @@ -707,7 +709,7 @@ pub(crate) fn try_alter( f: F, ) -> ::kernel::error::Result where T: ::core::ops::Deref>, - B: crate::regs::macros::RegisterBase<$base>, + B: ::kernel::io::register::RegisterBase<$base>, F: ::core::ops::FnOnce(Self) -> Self, { if idx < Self::SIZE { diff --git a/rust/kernel/lib.rs b/rust/kernel/lib.rs index fcffc3988a90..8f8260090c02 100644 --- a/rust/kernel/lib.rs +++ b/rust/kernel/lib.rs @@ -63,6 +63,7 @@ pub mod alloc; #[cfg(CONFIG_AUXILIARY_BUS)] pub mod auxiliary; +pub mod bitfield; pub mod bits; #[cfg(CONFIG_BLOCK)] pub mod block; --=20 2.34.1