From nobody Tue Oct 7 03:47:40 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 11AA627BF84; Fri, 3 Oct 2025 09:12:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759482726; cv=none; b=ZFUyvEgTJIWA0zs2yFRmCnC2xNUi/LeUVpcP8Pci69QLVSoRen9BBi4bGqjr77AjtEEfsHe+k7Av27yfnAbFzBUY24vaadNPgISiFkqdgzPIpaUMkvIsqFq1i/qVswMdTHM5sPcd4t9oX4B0fJy2MZV2p6YWj1tnri0ZQTKbPNw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759482726; c=relaxed/simple; bh=MFzhi+8dQhX3GG3nbAarfsmphnpndwcDIjCl6a18VBw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l+UxxFPH3+RCrXTxUeCIcyHsSQBRpYtNGHPO5FPuwDlBeKOHZgB/9tw97thpNgNbKiJo4aYCFYichGmaFsIwjne7NjcvGj1AlWq+CXo0wN2Q5UiO4UPYsN/pEu7hM8Cz0WtfeUn2v06sL7OhuZG54NeGWdDZrQWfvGmBRb1RftI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=hp1s5oiF; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="hp1s5oiF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1759482722; bh=MFzhi+8dQhX3GG3nbAarfsmphnpndwcDIjCl6a18VBw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hp1s5oiFEEAwuV2hU2RDBaSQMrpc6pQQqyDW23sX9Kko0t4N+G04Gp+0+2NHuPpFD 6apa9vlCqjlR9xR+qTFr+J86/lj0XnMamnC7NVZJTmeJxSyBNTQsy9um+7KpxjwTzD TrKd4JKjXtLwrzwBDSB5Dz4Ry4/qA65+y2g6mTgGIo6e3QxMT69wh4Rn+gPU5y3gL6 QCXqBi1MHHqSkg50dk0yNhaX6s5eEhB1YHTNP1B42pb/7yh7pd1tkcO9FHwgvGGBCF ZvSvvnykbPWxdSA8D5waw/R2M1QZAbzsvE8sHxis29s/IogoQ3UuZBZLHriObtS2Q/ iezh9RWtoKZpg== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id C1BF517E129E; Fri, 3 Oct 2025 11:12:01 +0200 (CEST) From: AngeloGioacchino Del Regno To: linux-mediatek@lists.infradead.org Cc: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, lgirdwood@gmail.com, broonie@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, wenst@chromium.org, igor.belwon@mentallysanemainliners.org Subject: [PATCH v8 1/9] dt-bindings: regulator: Document MediaTek MT6316 PMIC Regulators Date: Fri, 3 Oct 2025 11:11:50 +0200 Message-ID: <20251003091158.26748-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251003091158.26748-1-angelogioacchino.delregno@collabora.com> References: <20251003091158.26748-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add bindings for the regulators found in the MediaTek MT6316 PMIC, usually found in board designs using the MT6991 Dimensity 9400 and on MT8196 Kompanio SoC for Chromebooks. This chip is fully controlled by SPMI and has multiple variants providing different phase configurations. Reviewed-by: Chen-Yu Tsai Signed-off-by: AngeloGioacchino Del Regno --- .../regulator/mediatek,mt6316b-regulator.yaml | 80 +++++++++++++++++++ .../regulator/mediatek,mt6316c-regulator.yaml | 80 +++++++++++++++++++ .../regulator/mediatek,mt6316d-regulator.yaml | 79 ++++++++++++++++++ 3 files changed, 239 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/mediatek,mt= 6316b-regulator.yaml create mode 100644 Documentation/devicetree/bindings/regulator/mediatek,mt= 6316c-regulator.yaml create mode 100644 Documentation/devicetree/bindings/regulator/mediatek,mt= 6316d-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6316b-r= egulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6316= b-regulator.yaml new file mode 100644 index 000000000000..53d2c9913e55 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6316b-regulato= r.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6316b-regulator.ya= ml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6316 BP/VP SPMI PMIC Regulators + +maintainers: + - AngeloGioacchino Del Regno + +description: + The MediaTek MT6316BP/VP PMICs are fully controlled by SPMI interface, b= oth + feature four step-down DC/DC (buck) converters, and provides 2+2 Phases, + joining Buck 1+2 for the first phase, and Buck 3+4 for the second phase. + +properties: + compatible: + const: mediatek,mt6316b-regulator + + reg: + maxItems: 1 + + '#address-cells': + const: 0 + +patternProperties: + "^vbuck(12|34)$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + properties: + regulator-allowed-modes: + description: | + Allowed Buck regulator operating modes allowed. Valid values bel= ow. + 0 - Normal mode with automatic power saving, reducing the swit= ching + frequency when light load conditions are detected + 1 - Forced Continuous Conduction mode (FCCM) for improved volt= age + regulation accuracy with constant switching frequency but = lower + regulator efficiency + 2 - Forced Low Power mode for improved regulator efficiency, u= sed + when no heavy load is expected, will shut down unnecessary= IP + blocks and secondary phases to reduce quiescent current. + This mode does not limit the maximum output current but un= less + only a light load is applied, there will be regulation acc= uracy + and efficiency losses. + maxItems: 3 + items: + enum: [ 0, 1, 2 ] + +required: + - compatible + - reg + - '#address-cells' + +additionalProperties: false + +examples: + - | + #include + + spmi { + #address-cells =3D <2>; + #size-cells =3D <0>; + + pmic@8 { + compatible =3D "mediatek,mt6316b-regulator"; + reg =3D <0x8 SPMI_USID>; + #address-cells =3D <0>; + + vbuck12 { + regulator-name =3D "dvdd_core"; + regulator-min-microvolt =3D <450000>; + regulator-max-microvolt =3D <965000>; + regulator-allowed-modes =3D <0 1 2>; + regulator-enable-ramp-delay =3D <256>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6316c-r= egulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6316= c-regulator.yaml new file mode 100644 index 000000000000..4fae025c8a35 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6316c-regulato= r.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6316c-regulator.ya= ml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6316 CP/HP/KP SPMI PMIC Regulators + +maintainers: + - AngeloGioacchino Del Regno + +description: + The MediaTek MT6316CP/HP/KP PMICs are fully controlled by SPMI interface, + features four step-down DC/DC (buck) converters, and provides 3+1 Phases, + joining Buck 1+2+4 for the first phase, and uses Buck 3 for the second. + +properties: + compatible: + const: mediatek,mt6316c-regulator + + reg: + maxItems: 1 + + '#address-cells': + const: 0 + +patternProperties: + "^vbuck(124|3)$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + properties: + regulator-allowed-modes: + description: | + Allowed Buck regulator operating modes allowed. Valid values bel= ow. + 0 - Normal mode with automatic power saving, reducing the swit= ching + frequency when light load conditions are detected + 1 - Forced Continuous Conduction mode (FCCM) for improved volt= age + regulation accuracy with constant switching frequency but = lower + regulator efficiency + 2 - Forced Low Power mode for improved regulator efficiency, u= sed + when no heavy load is expected, will shut down unnecessary= IP + blocks and secondary phases to reduce quiescent current. + This mode does not limit the maximum output current but un= less + only a light load is applied, there will be regulation acc= uracy + and efficiency losses. + maxItems: 3 + items: + enum: [ 0, 1, 2 ] + +required: + - compatible + - reg + - '#address-cells' + +additionalProperties: false + +examples: + - | + #include + + spmi { + #address-cells =3D <2>; + #size-cells =3D <0>; + + pmic@6 { + compatible =3D "mediatek,mt6316c-regulator"; + reg =3D <0x6 SPMI_USID>; + #address-cells =3D <0>; + + vbuck124 { + regulator-name =3D "dvdd_proc_m"; + regulator-min-microvolt =3D <450000>; + regulator-max-microvolt =3D <1277500>; + regulator-allowed-modes =3D <0 1 2>; + regulator-enable-ramp-delay =3D <256>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6316d-r= egulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6316= d-regulator.yaml new file mode 100644 index 000000000000..22277ddf3c96 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6316d-regulato= r.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6316d-regulator.ya= ml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6316 DP/TP SPMI PMIC Regulators + +maintainers: + - AngeloGioacchino Del Regno + +description: + The MediaTek MT6316DP/TP PMICs are fully controlled by SPMI interface, b= oth + feature four step-down DC/DC (buck) converters, and provides a single Ph= ase, + joining Buck 1+2+3+4. + +properties: + compatible: + const: mediatek,mt6316d-regulator + + reg: + maxItems: 1 + + '#address-cells': + const: 0 + + vbuck1234: + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + properties: + regulator-allowed-modes: + description: | + Allowed Buck regulator operating modes allowed. Valid values bel= ow. + 0 - Normal mode with automatic power saving, reducing the swit= ching + frequency when light load conditions are detected + 1 - Forced Continuous Conduction mode (FCCM) for improved volt= age + regulation accuracy with constant switching frequency but = lower + regulator efficiency + 2 - Forced Low Power mode for improved regulator efficiency, u= sed + when no heavy load is expected, will shut down unnecessary= IP + blocks and secondary phases to reduce quiescent current. + This mode does not limit the maximum output current but un= less + only a light load is applied, there will be regulation acc= uracy + and efficiency losses. + maxItems: 3 + items: + enum: [ 0, 1, 2 ] + +required: + - compatible + - reg + - '#address-cells' + +additionalProperties: false + +examples: + - | + #include + + spmi { + #address-cells =3D <2>; + #size-cells =3D <0>; + + pmic@7 { + compatible =3D "mediatek,mt6316d-regulator"; + reg =3D <0x7 SPMI_USID>; + #address-cells =3D <0>; + + vbuck1234 { + regulator-name =3D "dvdd_gpustack"; + regulator-min-microvolt =3D <400000>; + regulator-max-microvolt =3D <1277500>; + regulator-allowed-modes =3D <0 1 2>; + regulator-enable-ramp-delay =3D <256>; + }; + }; + }; +... --=20 2.51.0