From nobody Wed Dec 17 15:53:45 2025 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7701B2D8360 for ; Thu, 2 Oct 2025 12:14:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759407301; cv=none; b=pqJPjukmV4OX/do/+mhKGHFG/EPBjNdYZ/zpHGU4PKG9NYG5BrW2srmOiu57mF0gPHmvNgrJG8k2Ef08qStBbb3IzNiBVDsTJMW+1FZGI1ZkRtbku/rj11mcpG2NAKzZjqBM0XQJyoJeGr6nskYr+ZuO0xbmHw0LEE17p84SLgQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759407301; c=relaxed/simple; bh=TL5iKamif9/4tL7FQ0FciqO0XBFjKW67GewQeJxLTD4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RdZgj4l7OnySzCpmhUJDxgmtx/pHgN+lTh5VSHnTpZoNqb8sqX1IDoB5O3nWW5laZ0t4OpQLnxw6DUtWupmKHjOIGRejf5/ave7DF2NDXKfoRarZzQ2FWddsRbaBHCWuOyGG6uaYute0mjW0YsAWJfDp4t7j4B4/3jTKRzQIwyg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=0jQ/Js35; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="0jQ/Js35" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id D15C3C00D81; Thu, 2 Oct 2025 12:14:38 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id BE7A46062C; Thu, 2 Oct 2025 12:14:56 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 79AC4102F1BE8; Thu, 2 Oct 2025 14:14:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1759407296; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=F8gvOaxNAH7inLC+vGtHLk3oAZwzMLD+DPQRdkt+DN4=; b=0jQ/Js35bCc6/HEB6wVHl+4Zbo7q1fveIsCqcSbyuks2Az6Q3SmhwPYqeE//S3+KKyNIu7 gZaklzcpyteI2I+CUkA4GP7Lm+JQ+AaPEyBsK57GpgsO2NIzz4SnKJw6gK9iYfCqY/9jWF 0klbwiNaQXvaboigmF8hGBNRihoMIArYBRs20NxndT0fRh0Tz/vhDyYBVVziChKNUKKrLu DTzYmsIhMrlTZ/oVfBiq+XB0yMhsWETlB/XfPxvBdGNw35qXd7WmS3WcwAARpJAwsbdwy0 NhkaxmwJzO4vIfsMixQgpGiE0B6qj5cF5IsLyHFyx8AFKQEI1qhB9dz8iErJzA== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Thu, 02 Oct 2025 14:14:37 +0200 Subject: [PATCH RFC 1/2] spi: dw: rename the spi controller to ctlr Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251002-spi-dw-target-v1-1-993e91c1a712@bootlin.com> References: <20251002-spi-dw-target-v1-0-993e91c1a712@bootlin.com> In-Reply-To: <20251002-spi-dw-target-v1-0-993e91c1a712@bootlin.com> To: Mark Brown Cc: Thomas Petazzoni , Vladimir Kondratiev , Tawfik Bayouk , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Since the designware SPI controller can act as both a target and a host, rename spi_controller member of the dw_spi struct to ctlr instead of host. Similarly, rename the functions handling the controller, using controller instead of host as the suffix. No functional changes intended. Signed-off-by: Beno=C3=AEt Monin --- drivers/spi/spi-dw-bt1.c | 4 +- drivers/spi/spi-dw-core.c | 128 +++++++++++++++++++++++-------------------= ---- drivers/spi/spi-dw-dma.c | 22 ++++---- drivers/spi/spi-dw-mmio.c | 4 +- drivers/spi/spi-dw-pci.c | 8 +-- drivers/spi/spi-dw.h | 12 ++--- 6 files changed, 89 insertions(+), 89 deletions(-) diff --git a/drivers/spi/spi-dw-bt1.c b/drivers/spi/spi-dw-bt1.c index 4a5be813efa75e3606b5dd546f0678ed68794d6e..91642e05ac6077cfb68dfd0ef6a= cf7cca960f211 100644 --- a/drivers/spi/spi-dw-bt1.c +++ b/drivers/spi/spi-dw-bt1.c @@ -288,7 +288,7 @@ static int dw_spi_bt1_probe(struct platform_device *pde= v) =20 pm_runtime_enable(&pdev->dev); =20 - ret =3D dw_spi_add_host(&pdev->dev, dws); + ret =3D dw_spi_add_controller(&pdev->dev, dws); if (ret) { pm_runtime_disable(&pdev->dev); return ret; @@ -303,7 +303,7 @@ static void dw_spi_bt1_remove(struct platform_device *p= dev) { struct dw_spi_bt1 *dwsbt1 =3D platform_get_drvdata(pdev); =20 - dw_spi_remove_host(&dwsbt1->dws); + dw_spi_remove_controller(&dwsbt1->dws); =20 pm_runtime_disable(&pdev->dev); } diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index b3b883cb954107ea631d12c1ef1074046cff39a7..90dea6f9b3dab773204c667cb12= f3ecaef1d7108 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -63,7 +63,7 @@ static void dw_spi_debugfs_init(struct dw_spi *dws) { char name[32]; =20 - snprintf(name, 32, "dw_spi%d", dws->host->bus_num); + snprintf(name, 32, "dw_spi%d", dws->ctlr->bus_num); dws->debugfs =3D debugfs_create_dir(name, NULL); =20 dws->regset.regs =3D dw_spi_dbgfs_regs; @@ -185,25 +185,25 @@ int dw_spi_check_status(struct dw_spi *dws, bool raw) irq_status =3D dw_readl(dws, DW_SPI_ISR); =20 if (irq_status & DW_SPI_INT_RXOI) { - dev_err(&dws->host->dev, "RX FIFO overflow detected\n"); + dev_err(&dws->ctlr->dev, "RX FIFO overflow detected\n"); ret =3D -EIO; } =20 if (irq_status & DW_SPI_INT_RXUI) { - dev_err(&dws->host->dev, "RX FIFO underflow detected\n"); + dev_err(&dws->ctlr->dev, "RX FIFO underflow detected\n"); ret =3D -EIO; } =20 if (irq_status & DW_SPI_INT_TXOI) { - dev_err(&dws->host->dev, "TX FIFO overflow detected\n"); + dev_err(&dws->ctlr->dev, "TX FIFO overflow detected\n"); ret =3D -EIO; } =20 /* Generically handle the erroneous situation */ if (ret) { dw_spi_reset_chip(dws); - if (dws->host->cur_msg) - dws->host->cur_msg->status =3D ret; + if (dws->ctlr->cur_msg) + dws->ctlr->cur_msg->status =3D ret; } =20 return ret; @@ -215,7 +215,7 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_sp= i *dws) u16 irq_status =3D dw_readl(dws, DW_SPI_ISR); =20 if (dw_spi_check_status(dws, false)) { - spi_finalize_current_transfer(dws->host); + spi_finalize_current_transfer(dws->ctlr); return IRQ_HANDLED; } =20 @@ -229,7 +229,7 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_sp= i *dws) dw_reader(dws); if (!dws->rx_len) { dw_spi_mask_intr(dws, 0xff); - spi_finalize_current_transfer(dws->host); + spi_finalize_current_transfer(dws->ctlr); } else if (dws->rx_len <=3D dw_readl(dws, DW_SPI_RXFTLR)) { dw_writel(dws, DW_SPI_RXFTLR, dws->rx_len - 1); } @@ -250,14 +250,14 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_= spi *dws) =20 static irqreturn_t dw_spi_irq(int irq, void *dev_id) { - struct spi_controller *host =3D dev_id; - struct dw_spi *dws =3D spi_controller_get_devdata(host); + struct spi_controller *ctlr =3D dev_id; + struct dw_spi *dws =3D spi_controller_get_devdata(ctlr); u16 irq_status =3D dw_readl(dws, DW_SPI_ISR) & DW_SPI_INT_MASK; =20 if (!irq_status) return IRQ_NONE; =20 - if (!host->cur_msg) { + if (!ctlr->cur_msg) { dw_spi_mask_intr(dws, 0xff); return IRQ_HANDLED; } @@ -410,11 +410,11 @@ static int dw_spi_poll_transfer(struct dw_spi *dws, return 0; } =20 -static int dw_spi_transfer_one(struct spi_controller *host, +static int dw_spi_transfer_one(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *transfer) { - struct dw_spi *dws =3D spi_controller_get_devdata(host); + struct dw_spi *dws =3D spi_controller_get_devdata(ctlr); struct dw_spi_cfg cfg =3D { .tmode =3D DW_SPI_CTRLR0_TMOD_TR, .dfs =3D transfer->bits_per_word, @@ -439,7 +439,7 @@ static int dw_spi_transfer_one(struct spi_controller *h= ost, transfer->effective_speed_hz =3D dws->current_freq; =20 /* Check if current transfer is a DMA transaction */ - dws->dma_mapped =3D spi_xfer_is_dma_mapped(host, spi, transfer); + dws->dma_mapped =3D spi_xfer_is_dma_mapped(ctlr, spi, transfer); =20 /* For poll mode just disable all interrupts */ dw_spi_mask_intr(dws, 0xff); @@ -462,10 +462,10 @@ static int dw_spi_transfer_one(struct spi_controller = *host, return 1; } =20 -static void dw_spi_handle_err(struct spi_controller *host, +static void dw_spi_handle_err(struct spi_controller *ctlr, struct spi_message *msg) { - struct dw_spi *dws =3D spi_controller_get_devdata(host); + struct dw_spi *dws =3D spi_controller_get_devdata(ctlr); =20 if (dws->dma_mapped) dws->dma_ops->dma_stop(dws); @@ -574,7 +574,7 @@ static int dw_spi_write_then_read(struct dw_spi *dws, s= truct spi_device *spi) while (len) { entries =3D readl_relaxed(dws->regs + DW_SPI_TXFLR); if (!entries) { - dev_err(&dws->host->dev, "CS de-assertion on Tx\n"); + dev_err(&dws->ctlr->dev, "CS de-assertion on Tx\n"); return -EIO; } room =3D min(dws->fifo_len - entries, len); @@ -594,7 +594,7 @@ static int dw_spi_write_then_read(struct dw_spi *dws, s= truct spi_device *spi) if (!entries) { sts =3D readl_relaxed(dws->regs + DW_SPI_RISR); if (sts & DW_SPI_INT_RXOI) { - dev_err(&dws->host->dev, "FIFO overflow on Rx\n"); + dev_err(&dws->ctlr->dev, "FIFO overflow on Rx\n"); return -EIO; } continue; @@ -635,7 +635,7 @@ static int dw_spi_wait_mem_op_done(struct dw_spi *dws) spi_delay_exec(&delay, NULL); =20 if (retry < 0) { - dev_err(&dws->host->dev, "Mem op hanged up\n"); + dev_err(&dws->ctlr->dev, "Mem op hanged up\n"); return -EIO; } =20 @@ -898,60 +898,60 @@ static const struct spi_controller_mem_caps dw_spi_me= m_caps =3D { .per_op_freq =3D true, }; =20 -int dw_spi_add_host(struct device *dev, struct dw_spi *dws) +int dw_spi_add_controller(struct device *dev, struct dw_spi *dws) { - struct spi_controller *host; + struct spi_controller *ctlr; int ret; =20 if (!dws) return -EINVAL; =20 - host =3D spi_alloc_host(dev, 0); - if (!host) + ctlr =3D spi_alloc_host(dev, 0); + if (!ctlr) return -ENOMEM; =20 - device_set_node(&host->dev, dev_fwnode(dev)); + device_set_node(&ctlr->dev, dev_fwnode(dev)); =20 - dws->host =3D host; + dws->ctlr =3D ctlr; dws->dma_addr =3D (dma_addr_t)(dws->paddr + DW_SPI_DR); =20 - spi_controller_set_devdata(host, dws); + spi_controller_set_devdata(ctlr, dws); =20 /* Basic HW init */ dw_spi_hw_init(dev, dws); =20 ret =3D request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev), - host); + ctlr); if (ret < 0 && ret !=3D -ENOTCONN) { dev_err(dev, "can not get IRQ\n"); - goto err_free_host; + goto err_free_ctlr; } =20 dw_spi_init_mem_ops(dws); =20 - host->use_gpio_descriptors =3D true; - host->mode_bits =3D SPI_CPOL | SPI_CPHA | SPI_LOOP; + ctlr->use_gpio_descriptors =3D true; + ctlr->mode_bits =3D SPI_CPOL | SPI_CPHA | SPI_LOOP; if (dws->caps & DW_SPI_CAP_DFS32) - host->bits_per_word_mask =3D SPI_BPW_RANGE_MASK(4, 32); + ctlr->bits_per_word_mask =3D SPI_BPW_RANGE_MASK(4, 32); else - host->bits_per_word_mask =3D SPI_BPW_RANGE_MASK(4, 16); - host->bus_num =3D dws->bus_num; - host->num_chipselect =3D dws->num_cs; - host->setup =3D dw_spi_setup; - host->cleanup =3D dw_spi_cleanup; + ctlr->bits_per_word_mask =3D SPI_BPW_RANGE_MASK(4, 16); + ctlr->bus_num =3D dws->bus_num; + ctlr->num_chipselect =3D dws->num_cs; + ctlr->setup =3D dw_spi_setup; + ctlr->cleanup =3D dw_spi_cleanup; if (dws->set_cs) - host->set_cs =3D dws->set_cs; + ctlr->set_cs =3D dws->set_cs; else - host->set_cs =3D dw_spi_set_cs; - host->transfer_one =3D dw_spi_transfer_one; - host->handle_err =3D dw_spi_handle_err; + ctlr->set_cs =3D dw_spi_set_cs; + ctlr->transfer_one =3D dw_spi_transfer_one; + ctlr->handle_err =3D dw_spi_handle_err; if (dws->mem_ops.exec_op) { - host->mem_ops =3D &dws->mem_ops; - host->mem_caps =3D &dw_spi_mem_caps; + ctlr->mem_ops =3D &dws->mem_ops; + ctlr->mem_caps =3D &dw_spi_mem_caps; } - host->max_speed_hz =3D dws->max_freq; - host->flags =3D SPI_CONTROLLER_GPIO_SS; - host->auto_runtime_pm =3D true; + ctlr->max_speed_hz =3D dws->max_freq; + ctlr->flags =3D SPI_CONTROLLER_GPIO_SS; + ctlr->auto_runtime_pm =3D true; =20 /* Get default rx sample delay */ device_property_read_u32(dev, "rx-sample-delay-ns", @@ -964,14 +964,14 @@ int dw_spi_add_host(struct device *dev, struct dw_spi= *dws) } else if (ret) { dev_warn(dev, "DMA init failed\n"); } else { - host->can_dma =3D dws->dma_ops->can_dma; - host->flags |=3D SPI_CONTROLLER_MUST_TX; + ctlr->can_dma =3D dws->dma_ops->can_dma; + ctlr->flags |=3D SPI_CONTROLLER_MUST_TX; } } =20 - ret =3D spi_register_controller(host); + ret =3D spi_register_controller(ctlr); if (ret) { - dev_err_probe(dev, ret, "problem registering spi host\n"); + dev_err_probe(dev, ret, "problem registering spi controller\n"); goto err_dma_exit; } =20 @@ -983,47 +983,47 @@ int dw_spi_add_host(struct device *dev, struct dw_spi= *dws) dws->dma_ops->dma_exit(dws); dw_spi_enable_chip(dws, 0); err_free_irq: - free_irq(dws->irq, host); -err_free_host: - spi_controller_put(host); + free_irq(dws->irq, ctlr); +err_free_ctlr: + spi_controller_put(ctlr); return ret; } -EXPORT_SYMBOL_NS_GPL(dw_spi_add_host, "SPI_DW_CORE"); +EXPORT_SYMBOL_NS_GPL(dw_spi_add_controller, "SPI_DW_CORE"); =20 -void dw_spi_remove_host(struct dw_spi *dws) +void dw_spi_remove_controller(struct dw_spi *dws) { dw_spi_debugfs_remove(dws); =20 - spi_unregister_controller(dws->host); + spi_unregister_controller(dws->ctlr); =20 if (dws->dma_ops && dws->dma_ops->dma_exit) dws->dma_ops->dma_exit(dws); =20 dw_spi_shutdown_chip(dws); =20 - free_irq(dws->irq, dws->host); + free_irq(dws->irq, dws->ctlr); } -EXPORT_SYMBOL_NS_GPL(dw_spi_remove_host, "SPI_DW_CORE"); +EXPORT_SYMBOL_NS_GPL(dw_spi_remove_controller, "SPI_DW_CORE"); =20 -int dw_spi_suspend_host(struct dw_spi *dws) +int dw_spi_suspend_controller(struct dw_spi *dws) { int ret; =20 - ret =3D spi_controller_suspend(dws->host); + ret =3D spi_controller_suspend(dws->ctlr); if (ret) return ret; =20 dw_spi_shutdown_chip(dws); return 0; } -EXPORT_SYMBOL_NS_GPL(dw_spi_suspend_host, "SPI_DW_CORE"); +EXPORT_SYMBOL_NS_GPL(dw_spi_suspend_controller, "SPI_DW_CORE"); =20 -int dw_spi_resume_host(struct dw_spi *dws) +int dw_spi_resume_controller(struct dw_spi *dws) { - dw_spi_hw_init(&dws->host->dev, dws); - return spi_controller_resume(dws->host); + dw_spi_hw_init(&dws->ctlr->dev, dws); + return spi_controller_resume(dws->ctlr); } -EXPORT_SYMBOL_NS_GPL(dw_spi_resume_host, "SPI_DW_CORE"); +EXPORT_SYMBOL_NS_GPL(dw_spi_resume_controller, "SPI_DW_CORE"); =20 MODULE_AUTHOR("Feng Tang "); MODULE_DESCRIPTION("Driver for DesignWare SPI controller core"); diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index b5bed02b7e5006d399697384c958137649786f1a..65adec7c7524b8362ec63be556a= 5a6ba8ab53a99 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -139,8 +139,8 @@ static int dw_spi_dma_init_mfld(struct device *dev, str= uct dw_spi *dws) if (!dws->txchan) goto free_rxchan; =20 - dws->host->dma_rx =3D dws->rxchan; - dws->host->dma_tx =3D dws->txchan; + dws->ctlr->dma_rx =3D dws->rxchan; + dws->ctlr->dma_tx =3D dws->txchan; =20 init_completion(&dws->dma_completion); =20 @@ -183,8 +183,8 @@ static int dw_spi_dma_init_generic(struct device *dev, = struct dw_spi *dws) goto free_rxchan; } =20 - dws->host->dma_rx =3D dws->rxchan; - dws->host->dma_tx =3D dws->txchan; + dws->ctlr->dma_rx =3D dws->rxchan; + dws->ctlr->dma_tx =3D dws->txchan; =20 init_completion(&dws->dma_completion); =20 @@ -242,10 +242,10 @@ static enum dma_slave_buswidth dw_spi_dma_convert_wid= th(u8 n_bytes) } } =20 -static bool dw_spi_can_dma(struct spi_controller *host, +static bool dw_spi_can_dma(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *xfer) { - struct dw_spi *dws =3D spi_controller_get_devdata(host); + struct dw_spi *dws =3D spi_controller_get_devdata(ctlr); enum dma_slave_buswidth dma_bus_width; =20 if (xfer->len <=3D dws->fifo_len) @@ -271,7 +271,7 @@ static int dw_spi_dma_wait(struct dw_spi *dws, unsigned= int len, u32 speed) msecs_to_jiffies(ms)); =20 if (ms =3D=3D 0) { - dev_err(&dws->host->cur_msg->spi->dev, + dev_err(&dws->ctlr->cur_msg->spi->dev, "DMA transaction timed out\n"); return -ETIMEDOUT; } @@ -299,7 +299,7 @@ static int dw_spi_dma_wait_tx_done(struct dw_spi *dws, spi_delay_exec(&delay, xfer); =20 if (retry < 0) { - dev_err(&dws->host->dev, "Tx hanged up\n"); + dev_err(&dws->ctlr->dev, "Tx hanged up\n"); return -EIO; } =20 @@ -400,7 +400,7 @@ static int dw_spi_dma_wait_rx_done(struct dw_spi *dws) spi_delay_exec(&delay, NULL); =20 if (retry < 0) { - dev_err(&dws->host->dev, "Rx hanged up\n"); + dev_err(&dws->ctlr->dev, "Rx hanged up\n"); return -EIO; } =20 @@ -656,13 +656,13 @@ static int dw_spi_dma_transfer(struct dw_spi *dws, st= ruct spi_transfer *xfer) if (ret) return ret; =20 - if (dws->host->cur_msg->status =3D=3D -EINPROGRESS) { + if (dws->ctlr->cur_msg->status =3D=3D -EINPROGRESS) { ret =3D dw_spi_dma_wait_tx_done(dws, xfer); if (ret) return ret; } =20 - if (xfer->rx_buf && dws->host->cur_msg->status =3D=3D -EINPROGRESS) + if (xfer->rx_buf && dws->ctlr->cur_msg->status =3D=3D -EINPROGRESS) ret =3D dw_spi_dma_wait_rx_done(dws); =20 return ret; diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index f0f576fac77afed6ca2ddc0d31e37bc76462c736..cc16139e121bf2dae29a16e362d= b56ea8ad3a18b 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -380,7 +380,7 @@ static int dw_spi_mmio_probe(struct platform_device *pd= ev) =20 pm_runtime_enable(&pdev->dev); =20 - ret =3D dw_spi_add_host(&pdev->dev, dws); + ret =3D dw_spi_add_controller(&pdev->dev, dws); if (ret) goto out; =20 @@ -399,7 +399,7 @@ static void dw_spi_mmio_remove(struct platform_device *= pdev) { struct dw_spi_mmio *dwsmmio =3D platform_get_drvdata(pdev); =20 - dw_spi_remove_host(&dwsmmio->dws); + dw_spi_remove_controller(&dwsmmio->dws); pm_runtime_disable(&pdev->dev); reset_control_assert(dwsmmio->rstc); } diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c index b32d6648a32ea251028d2b4ad422941867c71519..72d9f5bc87f75a00f97d9c159a0= acb118b0a77ab 100644 --- a/drivers/spi/spi-dw-pci.c +++ b/drivers/spi/spi-dw-pci.c @@ -127,7 +127,7 @@ static int dw_spi_pci_probe(struct pci_dev *pdev, const= struct pci_device_id *en goto err_free_irq_vectors; } =20 - ret =3D dw_spi_add_host(&pdev->dev, dws); + ret =3D dw_spi_add_controller(&pdev->dev, dws); if (ret) goto err_free_irq_vectors; =20 @@ -156,7 +156,7 @@ static void dw_spi_pci_remove(struct pci_dev *pdev) pm_runtime_forbid(&pdev->dev); pm_runtime_get_noresume(&pdev->dev); =20 - dw_spi_remove_host(dws); + dw_spi_remove_controller(dws); pci_free_irq_vectors(pdev); } =20 @@ -165,14 +165,14 @@ static int dw_spi_pci_suspend(struct device *dev) { struct dw_spi *dws =3D dev_get_drvdata(dev); =20 - return dw_spi_suspend_host(dws); + return dw_spi_suspend_controller(dws); } =20 static int dw_spi_pci_resume(struct device *dev) { struct dw_spi *dws =3D dev_get_drvdata(dev); =20 - return dw_spi_resume_host(dws); + return dw_spi_resume_controller(dws); } #endif =20 diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index fc267c6437ae095e37de78b480856ca8deb5656e..9cc79c566a70c0ababf01cc7311= 1c14d73a35a98 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -142,14 +142,14 @@ struct dw_spi_dma_ops { int (*dma_init)(struct device *dev, struct dw_spi *dws); void (*dma_exit)(struct dw_spi *dws); int (*dma_setup)(struct dw_spi *dws, struct spi_transfer *xfer); - bool (*can_dma)(struct spi_controller *host, struct spi_device *spi, + bool (*can_dma)(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *xfer); int (*dma_transfer)(struct dw_spi *dws, struct spi_transfer *xfer); void (*dma_stop)(struct dw_spi *dws); }; =20 struct dw_spi { - struct spi_controller *host; + struct spi_controller *ctlr; =20 u32 ip; /* Synopsys DW SSI IP-core ID */ u32 ver; /* Synopsys component version */ @@ -288,10 +288,10 @@ extern void dw_spi_set_cs(struct spi_device *spi, boo= l enable); extern void dw_spi_update_config(struct dw_spi *dws, struct spi_device *sp= i, struct dw_spi_cfg *cfg); extern int dw_spi_check_status(struct dw_spi *dws, bool raw); -extern int dw_spi_add_host(struct device *dev, struct dw_spi *dws); -extern void dw_spi_remove_host(struct dw_spi *dws); -extern int dw_spi_suspend_host(struct dw_spi *dws); -extern int dw_spi_resume_host(struct dw_spi *dws); +extern int dw_spi_add_controller(struct device *dev, struct dw_spi *dws); +extern void dw_spi_remove_controller(struct dw_spi *dws); +extern int dw_spi_suspend_controller(struct dw_spi *dws); +extern int dw_spi_resume_controller(struct dw_spi *dws); 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Thu, 2 Oct 2025 14:14:56 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1759407297; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=55qKq9XUEwMg11SwoucBKDCPf/P3augAEJP1FaUSztE=; b=fhQIOLqt/ahoZNDiKUdPQ1cbc7iEMsCIlSYbKxAlqjnwXM+qqREWIzr0LhZaeEXHSHK74Z GQ3dyj0M3uJ0camelXBBbPrjNezT71YQL+nZHXZanYB550IwOobRu8viKRkqYO3AW6pIyB F0Ho/qaQSSFKyu7FCxpQfXiNmLuVWGywoKIwcUVkxGqbPY+W3AGS2CPWUoG05jNqjPQLBv kBidtWU56ax77OeM3MKkk4cW1h+mdDZqNd/7dOnNQJCaqCEPVKClWPInGrJ+q5gOGEZUcX 7bTdhYMi/LSU4m+wayPy9cMY77m+XJHt6wb8J6FuFDsEZcZL9FPJrWO6gwc2dg== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Thu, 02 Oct 2025 14:14:38 +0200 Subject: [PATCH RFC 2/2] spi: dw: add target mode support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251002-spi-dw-target-v1-2-993e91c1a712@bootlin.com> References: <20251002-spi-dw-target-v1-0-993e91c1a712@bootlin.com> In-Reply-To: <20251002-spi-dw-target-v1-0-993e91c1a712@bootlin.com> To: Mark Brown Cc: Thomas Petazzoni , Vladimir Kondratiev , Tawfik Bayouk , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Implement target mode for the DesignWare controller with the following changes: Allocate an SPI controller of the correct type based on the spi-slave property in dw_spi_add_controller() and set the controller properties depending on its type. Since they are only relevant when acting as a host controller, settings related to chip-select control and the set_cs() callback are only set in host mode, as are the loopback support, the memory operations and the maximum frequency. The target_abort() callback is set only when configured in target mode. The number of chip-select is set to 1 in dw_spi_hw_init() since the controller only has one CS input in target mode. In dw_spi_update_config(), return after setting the CTRLR0 register as the other registers are only relevant in host mode and are read-only in target mode. This function is called as part of the transfer_one() callback, which is identical in both the host and target mode. Move the code implementing the handle_err() callback to a new function named dw_spi_abort(), and use it to implement both the handle_err() and the target_abort() callbacks. Finally, drop the error path on the spi-slave property in dw_spi_mmio_probe(), as it is now a valid configuration. Signed-off-by: Beno=C3=AEt Monin --- drivers/spi/spi-dw-core.c | 82 ++++++++++++++++++++++++++++++++-----------= ---- drivers/spi/spi-dw-mmio.c | 5 --- 2 files changed, 57 insertions(+), 30 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 90dea6f9b3dab773204c667cb12f3ecaef1d7108..9ebf244294f89db1c5f26471d18= eb298ae804cd9 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -332,6 +332,9 @@ void dw_spi_update_config(struct dw_spi *dws, struct sp= i_device *spi, =20 dw_writel(dws, DW_SPI_CTRLR0, cr0); =20 + if (spi_controller_is_target(dws->ctlr)) + return; + if (cfg->tmode =3D=3D DW_SPI_CTRLR0_TMOD_EPROMREAD || cfg->tmode =3D=3D DW_SPI_CTRLR0_TMOD_RO) dw_writel(dws, DW_SPI_CTRLR1, cfg->ndf ? cfg->ndf - 1 : 0); @@ -462,8 +465,7 @@ static int dw_spi_transfer_one(struct spi_controller *c= tlr, return 1; } =20 -static void dw_spi_handle_err(struct spi_controller *ctlr, - struct spi_message *msg) +static inline void dw_spi_abort(struct spi_controller *ctlr) { struct dw_spi *dws =3D spi_controller_get_devdata(ctlr); =20 @@ -473,6 +475,19 @@ static void dw_spi_handle_err(struct spi_controller *c= tlr, dw_spi_reset_chip(dws); } =20 +static void dw_spi_handle_err(struct spi_controller *ctlr, + struct spi_message *msg) +{ + dw_spi_abort(ctlr); +} + +static int dw_spi_target_abort(struct spi_controller *ctlr) +{ + dw_spi_abort(ctlr); + + return 0; +} + static int dw_spi_adjust_mem_op_size(struct spi_mem *mem, struct spi_mem_o= p *op) { if (op->data.dir =3D=3D SPI_MEM_DATA_IN) @@ -834,18 +849,23 @@ static void dw_spi_hw_init(struct device *dev, struct= dw_spi *dws) DW_SPI_GET_BYTE(dws->ver, 1)); } =20 - /* - * Try to detect the number of native chip-selects if the platform - * driver didn't set it up. There can be up to 16 lines configured. - */ - if (!dws->num_cs) { - u32 ser; + if (spi_controller_is_target(dws->ctlr)) { + /* There is only one CS input signal in target mode */ + dws->num_cs =3D 1; + } else { + /* + * Try to detect the number of native chip-selects if the platform + * driver didn't set it up. There can be up to 16 lines configured. + */ + if (!dws->num_cs) { + u32 ser; =20 - dw_writel(dws, DW_SPI_SER, 0xffff); - ser =3D dw_readl(dws, DW_SPI_SER); - dw_writel(dws, DW_SPI_SER, 0); + dw_writel(dws, DW_SPI_SER, 0xffff); + ser =3D dw_readl(dws, DW_SPI_SER); + dw_writel(dws, DW_SPI_SER, 0); =20 - dws->num_cs =3D hweight16(ser); + dws->num_cs =3D hweight16(ser); + } } =20 /* @@ -901,12 +921,18 @@ static const struct spi_controller_mem_caps dw_spi_me= m_caps =3D { int dw_spi_add_controller(struct device *dev, struct dw_spi *dws) { struct spi_controller *ctlr; + bool target; int ret; =20 if (!dws) return -EINVAL; =20 - ctlr =3D spi_alloc_host(dev, 0); + target =3D device_property_read_bool(dev, "spi-slave"); + if (target) + ctlr =3D spi_alloc_target(dev, 0); + else + ctlr =3D spi_alloc_host(dev, 0); + if (!ctlr) return -ENOMEM; =20 @@ -929,8 +955,7 @@ int dw_spi_add_controller(struct device *dev, struct dw= _spi *dws) =20 dw_spi_init_mem_ops(dws); =20 - ctlr->use_gpio_descriptors =3D true; - ctlr->mode_bits =3D SPI_CPOL | SPI_CPHA | SPI_LOOP; + ctlr->mode_bits =3D SPI_CPOL | SPI_CPHA; if (dws->caps & DW_SPI_CAP_DFS32) ctlr->bits_per_word_mask =3D SPI_BPW_RANGE_MASK(4, 32); else @@ -939,20 +964,27 @@ int dw_spi_add_controller(struct device *dev, struct = dw_spi *dws) ctlr->num_chipselect =3D dws->num_cs; ctlr->setup =3D dw_spi_setup; ctlr->cleanup =3D dw_spi_cleanup; - if (dws->set_cs) - ctlr->set_cs =3D dws->set_cs; - else - ctlr->set_cs =3D dw_spi_set_cs; ctlr->transfer_one =3D dw_spi_transfer_one; ctlr->handle_err =3D dw_spi_handle_err; - if (dws->mem_ops.exec_op) { - ctlr->mem_ops =3D &dws->mem_ops; - ctlr->mem_caps =3D &dw_spi_mem_caps; - } - ctlr->max_speed_hz =3D dws->max_freq; - ctlr->flags =3D SPI_CONTROLLER_GPIO_SS; ctlr->auto_runtime_pm =3D true; =20 + if (!target) { + ctlr->use_gpio_descriptors =3D true; + ctlr->mode_bits |=3D SPI_LOOP; + if (dws->set_cs) + ctlr->set_cs =3D dws->set_cs; + else + ctlr->set_cs =3D dw_spi_set_cs; + if (dws->mem_ops.exec_op) { + ctlr->mem_ops =3D &dws->mem_ops; + ctlr->mem_caps =3D &dw_spi_mem_caps; + } + ctlr->max_speed_hz =3D dws->max_freq; + ctlr->flags =3D SPI_CONTROLLER_GPIO_SS; + } else { + ctlr->target_abort =3D dw_spi_target_abort; + } + /* Get default rx sample delay */ device_property_read_u32(dev, "rx-sample-delay-ns", &dws->def_rx_sample_dly_ns); diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index cc16139e121bf2dae29a16e362db56ea8ad3a18b..f2cd675a9a1980fba447e13e356= bb81a0395256e 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -321,11 +321,6 @@ static int dw_spi_mmio_probe(struct platform_device *p= dev) struct dw_spi *dws; int ret; =20 - if (device_property_read_bool(&pdev->dev, "spi-slave")) { - dev_warn(&pdev->dev, "spi-slave is not yet supported\n"); - return -ENODEV; - } - dwsmmio =3D devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_mmio), GFP_KERNEL); if (!dwsmmio) --=20 2.51.0