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[144.49.247.0]) by smtp-relay.gmail.com with ESMTPS id d9443c01a7336-28e8d11809csm237545ad.26.2025.10.01.11.17.29 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Oct 2025 11:17:29 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-qt1-f198.google.com with SMTP id d75a77b69052e-4bf1e8c996eso7548851cf.1 for ; Wed, 01 Oct 2025 11:17:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1759342648; x=1759947448; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zUuZQrnmJtbF5ECpFYAH41ueWDcOLNVLh/7zyV6Y6a0=; b=aiOR0MTlnch3m728dg7hPLOVenW83X/mufF4XH953YvveBn/kkMw2vozsHd6G3c0uT QGK3C9gJ7pxJIh3lymt9uobvS4scUt/mtL2qyPvl73gGfWltcWzR8JLbxQKEWU4bmQ3g U4XCV7gnDnMJiIkLBYHAFcx3uQgmT3gi1g7Js= X-Forwarded-Encrypted: i=1; AJvYcCUNB6RneEEQieVAtNolpLtYPPdn8ptm59mDynu3CbzRP6NRwlJZV27O9TK5HW9cFnV6i/wobzoj7PMWeQ0=@vger.kernel.org X-Received: by 2002:a05:622a:4d90:b0:4de:f3d7:6964 with SMTP id d75a77b69052e-4e41cd01379mr61196211cf.24.1759342647796; Wed, 01 Oct 2025 11:17:27 -0700 (PDT) X-Received: by 2002:a05:622a:4d90:b0:4de:f3d7:6964 with SMTP id d75a77b69052e-4e41cd01379mr61195441cf.24.1759342647212; Wed, 01 Oct 2025 11:17:27 -0700 (PDT) Received: from mail.broadcom.net ([192.19.144.250]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-4e55c9e78cfsm3847671cf.27.2025.10.01.11.17.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Oct 2025 11:17:26 -0700 (PDT) From: Kamal Dasu To: peng.fan@oss.nxp.com, andersson@kernel.org, baolin.wang@linux.alibaba.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, florian.fainelli@broadcom.com Cc: bcm-kernel-feedback-list@broadcom.com, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kamal Dasu Subject: [PATCH v2 2/3] hwspinlock: brcmstb hardware semaphore support Date: Wed, 1 Oct 2025 14:16:40 -0400 Message-Id: <20251001181641.1561472-3-kamal.dasu@broadcom.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251001181641.1561472-1-kamal.dasu@broadcom.com> References: <20251001181641.1561472-1-kamal.dasu@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Content-Type: text/plain; charset="utf-8" Added support for brmstb_hwspinlock driver that makes use of the hwspinlock framework. Driver uses SUN_TOP_CTRL_SEMAPHORE_[1:15] registers to implement the hardware semaphore. With this change other brcmstb drivers can use hwspin_trylock() and hwspin_unlock() apis and make use of this hwspinlock framework. Other driver dt nodes just need to use a reference to the &hwspinlock and the lock id they want to use. e.g. hwlocks =3D <&hwspinlock0 0>; Signed-off-by: Kamal Dasu --- drivers/hwspinlock/Kconfig | 11 ++- drivers/hwspinlock/Makefile | 1 + drivers/hwspinlock/brcmstb_hwspinlock.c | 96 +++++++++++++++++++++++++ 3 files changed, 107 insertions(+), 1 deletion(-) create mode 100644 drivers/hwspinlock/brcmstb_hwspinlock.c diff --git a/drivers/hwspinlock/Kconfig b/drivers/hwspinlock/Kconfig index 3874d15b0e9b..39797cadfd0b 100644 --- a/drivers/hwspinlock/Kconfig +++ b/drivers/hwspinlock/Kconfig @@ -8,6 +8,16 @@ menuconfig HWSPINLOCK =20 if HWSPINLOCK =20 +config HWSPINLOCK_BRCMSTB + tristate "Broadcom Setttop Hardware Semaphore functionality" + depends on ARCH_BRCMSTB || COMPILE_TEST + help + Broadcom settop hwspinlock driver. + Say y here to support the Broadcom Hardware Semaphore functionality, wh= ich + provides a synchronisation mechanism on the SoC. + + If unsure, say N. + config HWSPINLOCK_OMAP tristate "OMAP Hardware Spinlock device" depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM4= 3XX || ARCH_K3 || COMPILE_TEST @@ -62,5 +72,4 @@ config HSEM_U8500 SoC. =20 If unsure, say N. - endif # HWSPINLOCK diff --git a/drivers/hwspinlock/Makefile b/drivers/hwspinlock/Makefile index a0f16c9aaa82..35f2d94d8ba2 100644 --- a/drivers/hwspinlock/Makefile +++ b/drivers/hwspinlock/Makefile @@ -4,6 +4,7 @@ # =20 obj-$(CONFIG_HWSPINLOCK) +=3D hwspinlock_core.o +obj-$(CONFIG_HWSPINLOCK_BRCMSTB) +=3D brcmstb_hwspinlock.o obj-$(CONFIG_HWSPINLOCK_OMAP) +=3D omap_hwspinlock.o obj-$(CONFIG_HWSPINLOCK_QCOM) +=3D qcom_hwspinlock.o obj-$(CONFIG_HWSPINLOCK_SPRD) +=3D sprd_hwspinlock.o diff --git a/drivers/hwspinlock/brcmstb_hwspinlock.c b/drivers/hwspinlock/b= rcmstb_hwspinlock.c new file mode 100644 index 000000000000..0b164c57192e --- /dev/null +++ b/drivers/hwspinlock/brcmstb_hwspinlock.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * brcmstb HWSEM driver + * + * Copyright (C) 2025 Broadcom + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "hwspinlock_internal.h" + +#define BRCMSTB_NUM_SEMAPHORES 16 +#define RESET_SEMAPHORE 0 + +#define HWSPINLOCK_VAL 'L' + +static int brcmstb_hwspinlock_trylock(struct hwspinlock *lock) +{ + void __iomem *lock_addr =3D (void __iomem *)lock->priv; + + writel(HWSPINLOCK_VAL, lock_addr); + + return (readl(lock_addr) =3D=3D HWSPINLOCK_VAL); +} + +static void brcmstb_hwspinlock_unlock(struct hwspinlock *lock) +{ + void __iomem *lock_addr =3D (void __iomem *)lock->priv; + + /* release the lock by writing 0 to it */ + writel(RESET_SEMAPHORE, lock_addr); +} + +static void brcmstb_hwspinlock_relax(struct hwspinlock *lock) +{ + ndelay(50); +} + +static const struct hwspinlock_ops brcmstb_hwspinlock_ops =3D { + .trylock =3D brcmstb_hwspinlock_trylock, + .unlock =3D brcmstb_hwspinlock_unlock, + .relax =3D brcmstb_hwspinlock_relax, +}; + +static int brcmstb_hwspinlock_probe(struct platform_device *pdev) +{ + struct hwspinlock_device *bank; + struct hwspinlock *hwlock; + void __iomem *io_base; + int i, num_locks =3D BRCMSTB_NUM_SEMAPHORES; + + io_base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(io_base)) { + dev_err(&pdev->dev, "semaphore iobase mapping error\n"); + return PTR_ERR(io_base); + } + + bank =3D devm_kzalloc(&pdev->dev, struct_size(bank, lock, num_locks), + GFP_KERNEL); + if (!bank) + return -ENOMEM; + + for (i =3D 0, hwlock =3D &bank->lock[0]; i < num_locks; i++, hwlock++) + hwlock->priv =3D (void __iomem *)(io_base + sizeof(u32) * i); + + return devm_hwspin_lock_register(&pdev->dev, bank, + &brcmstb_hwspinlock_ops, + 0, num_locks); +} + +static const struct of_device_id brcmstb_hwspinlock_ids[] =3D { + { .compatible =3D "brcm,brcmstb-hwspinlock", }, + { /* end */ }, +}; +MODULE_DEVICE_TABLE(of, brcmstb_hwspinlock_ids); + +static struct platform_driver brcmstb_hwspinlock_driver =3D { + .probe =3D brcmstb_hwspinlock_probe, + .driver =3D { + .name =3D "brcmstb_hwspinlock", + .of_match_table =3D brcmstb_hwspinlock_ids, + }, +}; + +module_platform_driver(brcmstb_hwspinlock_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Hardware Spinlock driver for brcmstb"); +MODULE_AUTHOR("Kamal Dasu "); --=20 2.34.1