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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2025 15:02:24.1286 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a6bddc3f-c7fc-49cf-bb18-08de00fb877e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468E.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4176 Content-Type: text/plain; charset="utf-8" - Add auto_sel read support in cppc_get_perf_caps(). - Add write of both auto_sel and energy_perf in cppc_set_epp_perf(). - Remove redundant energy_perf field from 'struct cppc_perf_caps' as the same is available in 'struct cppc_perf_ctrls' which is used. Signed-off-by: Sumit Gupta --- drivers/acpi/cppc_acpi.c | 30 ++++++++++++++++++++++++++---- include/acpi/cppc_acpi.h | 1 - 2 files changed, 26 insertions(+), 5 deletions(-) diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index ab8dd5cdb13b..12b2516b971c 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -1344,8 +1344,8 @@ int cppc_get_perf_caps(int cpunum, struct cppc_perf_c= aps *perf_caps) struct cpc_desc *cpc_desc =3D per_cpu(cpc_desc_ptr, cpunum); struct cpc_register_resource *highest_reg, *lowest_reg, *lowest_non_linear_reg, *nominal_reg, *guaranteed_reg, - *low_freq_reg =3D NULL, *nom_freq_reg =3D NULL; - u64 high, low, guaranteed, nom, min_nonlinear, low_f =3D 0, nom_f =3D 0; + *low_freq_reg =3D NULL, *nom_freq_reg =3D NULL, *auto_sel_reg =3D NULL; + u64 high, low, guaranteed, nom, min_nonlinear, low_f =3D 0, nom_f =3D 0, = auto_sel =3D 0; int pcc_ss_id =3D per_cpu(cpu_pcc_subspace_idx, cpunum); struct cppc_pcc_data *pcc_ss_data =3D NULL; int ret =3D 0, regs_in_pcc =3D 0; @@ -1362,11 +1362,12 @@ int cppc_get_perf_caps(int cpunum, struct cppc_perf= _caps *perf_caps) low_freq_reg =3D &cpc_desc->cpc_regs[LOWEST_FREQ]; nom_freq_reg =3D &cpc_desc->cpc_regs[NOMINAL_FREQ]; guaranteed_reg =3D &cpc_desc->cpc_regs[GUARANTEED_PERF]; + auto_sel_reg =3D &cpc_desc->cpc_regs[AUTO_SEL_ENABLE]; =20 /* Are any of the regs PCC ?*/ if (CPC_IN_PCC(highest_reg) || CPC_IN_PCC(lowest_reg) || CPC_IN_PCC(lowest_non_linear_reg) || CPC_IN_PCC(nominal_reg) || - CPC_IN_PCC(low_freq_reg) || CPC_IN_PCC(nom_freq_reg)) { + CPC_IN_PCC(low_freq_reg) || CPC_IN_PCC(nom_freq_reg) || CPC_IN_PCC(auto_= sel_reg)) { if (pcc_ss_id < 0) { pr_debug("Invalid pcc_ss_id\n"); return -ENODEV; @@ -1414,6 +1415,9 @@ int cppc_get_perf_caps(int cpunum, struct cppc_perf_c= aps *perf_caps) perf_caps->lowest_freq =3D low_f; perf_caps->nominal_freq =3D nom_f; =20 + if (CPC_SUPPORTED(auto_sel_reg)) + cpc_read(cpunum, auto_sel_reg, &auto_sel); + perf_caps->auto_sel =3D (bool)auto_sel; =20 out_err: if (regs_in_pcc) @@ -1555,6 +1559,8 @@ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls= *perf_ctrls, bool enable) struct cpc_register_resource *auto_sel_reg; struct cpc_desc *cpc_desc =3D per_cpu(cpc_desc_ptr, cpu); struct cppc_pcc_data *pcc_ss_data =3D NULL; + bool autosel_support_in_ffh_or_sysmem; + bool epp_support_in_ffh_or_sysmem; int ret; =20 if (!cpc_desc) { @@ -1565,6 +1571,11 @@ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrl= s *perf_ctrls, bool enable) auto_sel_reg =3D &cpc_desc->cpc_regs[AUTO_SEL_ENABLE]; epp_set_reg =3D &cpc_desc->cpc_regs[ENERGY_PERF]; =20 + epp_support_in_ffh_or_sysmem =3D CPC_SUPPORTED(epp_set_reg) && + (CPC_IN_FFH(epp_set_reg) || CPC_IN_SYSTEM_MEMORY(epp_set_reg)); + autosel_support_in_ffh_or_sysmem =3D CPC_SUPPORTED(auto_sel_reg) && + (CPC_IN_FFH(auto_sel_reg) || CPC_IN_SYSTEM_MEMORY(auto_sel_reg)); + if (CPC_IN_PCC(epp_set_reg) || CPC_IN_PCC(auto_sel_reg)) { if (pcc_ss_id < 0) { pr_debug("Invalid pcc_ss_id for CPU:%d\n", cpu); @@ -1590,8 +1601,19 @@ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrl= s *perf_ctrls, bool enable) ret =3D send_pcc_cmd(pcc_ss_id, CMD_WRITE); up_write(&pcc_ss_data->pcc_lock); } else if (osc_cpc_flexible_adr_space_confirmed && - CPC_SUPPORTED(epp_set_reg) && CPC_IN_FFH(epp_set_reg)) { + epp_support_in_ffh_or_sysmem && autosel_support_in_ffh_or_sysmem) { + ret =3D cpc_write(cpu, auto_sel_reg, enable); + if (ret) { + pr_debug("Failed to write auto_sel=3D%d for CPU:%d\n", enable, cpu); + return ret; + } + ret =3D cpc_write(cpu, epp_set_reg, perf_ctrls->energy_perf); + if (ret) { + pr_debug("Failed to write energy_perf=3D%u for CPU:%d\n", + perf_ctrls->energy_perf, cpu); + return ret; + } } else { ret =3D -ENOTSUPP; pr_debug("_CPC in PCC and _CPC in FFH are not supported\n"); diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h index 213bd389ec57..3babc6d6e70a 100644 --- a/include/acpi/cppc_acpi.h +++ b/include/acpi/cppc_acpi.h @@ -119,7 +119,6 @@ struct cppc_perf_caps { u32 lowest_nonlinear_perf; u32 lowest_freq; u32 nominal_freq; - u32 energy_perf; bool auto_sel; }; =20 --=20 2.34.1