From nobody Wed Oct 1 22:18:42 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3B7127FD47 for ; Wed, 1 Oct 2025 02:21:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759285316; cv=pass; b=uRSCGvQ7zRUQynoNq8ECeWKK/SvB628RsgozZtpG3Le6+LSEWlo89XmmIawHLnrVcBUGSpr95CJubtHNqam7SFLcTF21S+JR0W1gvz3fJvJEhp7IVxFT2mhTP3td5pSHF5hG6ZbsCthuL5eX3MyXxHj5empo40CgyTeNtYVU5/U= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759285316; c=relaxed/simple; bh=sXdobEwosGo5ZLqN61Ea6JwQ8ogOeqQLbxWHWLs+m2w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=d4uh259A6WV4znEEqsHk69slFkt57ffR3+NOc0824+t07GJfwhfInu0YyfeSuqRaWlVaupHV45N2dwpz8nvhyjzBWuQaznUXvCH317IVOk6uWPCa89XG13YCJUOTJxKBOSBcLkRtJzJ9p3lG2kkpBLdxKfTSNhAAJz3SDK3fROI= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=g1akH82r; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="g1akH82r" ARC-Seal: i=1; a=rsa-sha256; t=1759285298; cv=none; d=zohomail.com; s=zohoarc; b=UKpDG2De9no5SHbY6oGiZ07O48YbKMV0E8u3qlOXd16PsaRo8lGIy3dVdue1DFnevbvJYZ2vNmBK+s/LUy2WyCSBE5Jx6jqg4HZUET5fpVibxFcKGndPnGw0nsJvNc3oWArE6rdknHwtwSbnGv0HMb1hrkHl90YV/e2KK/Ti8aU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1759285298; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=zJf/iT5/sz9m7OBiXSqPdNDE6DNDiEZW/3dJfFHj/tA=; b=EILyYnHx1CJqEccnIgs3IZ4ccrF1llKUvy79ccTxFQLjgzQom9lqhM0SLnp+L8r90+uTkITkdt/pXs0KPVIGhhO/7dWjZqnloHBC79sKFrarJ7ap0tya7/07hKwTUkwYsi27pZUil9ySepHSdpCBNRJwnMRpF2JLYB6nC/6I4kk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1759285298; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=zJf/iT5/sz9m7OBiXSqPdNDE6DNDiEZW/3dJfFHj/tA=; b=g1akH82rZZ4nYeW1xyIudoGLeR4QWeGBbmLMiApnXSESUyMk9t4RTlKnzj0+wDB7 61SlipY0Sls9kiKjYAAhshqzA+AtoNrAzqCLS4wv4tKCTtuCpM9wQdCi9ELxIrQ3FzC c9tYhKx2S6KEgW0QR7p3t8ohWojd6rz1DQymsWUo= Received: by mx.zohomail.com with SMTPS id 1759285296099830.7867822978707; Tue, 30 Sep 2025 19:21:36 -0700 (PDT) From: =?UTF-8?q?Adri=C3=A1n=20Larumbe?= To: linux-kernel@vger.kernel.org Cc: dri-devel@lists.freedesktop.org, Steven Price , Boris Brezillon , kernel@collabora.com, =?UTF-8?q?Adri=C3=A1n=20Larumbe?= , Rob Herring , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Subject: [PATCH v4 07/10] drm/panfrost: Make re-enabling job interrupts at device reset optional Date: Wed, 1 Oct 2025 03:20:28 +0100 Message-ID: <20251001022039.1215976-8-adrian.larumbe@collabora.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251001022039.1215976-1-adrian.larumbe@collabora.com> References: <20251001022039.1215976-1-adrian.larumbe@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Rather than remasking interrupts after a device reset in the main reset path, allow selecting whether to do this with an additional bool parameter. To this end, split reenabling job interrupts into two functions, one that clears the interrupts and another one which unmasks them conditionally. Signed-off-by: Adri=C3=A1n Larumbe Reviewed-by: Boris Brezillon --- drivers/gpu/drm/panfrost/panfrost_device.c | 9 ++++++--- drivers/gpu/drm/panfrost/panfrost_device.h | 2 +- drivers/gpu/drm/panfrost/panfrost_job.c | 17 ++++++++--------- drivers/gpu/drm/panfrost/panfrost_job.h | 1 + 4 files changed, 16 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 733b728ec75f..f1d811a6de6c 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -400,13 +400,16 @@ bool panfrost_exception_needs_reset(const struct panf= rost_device *pfdev, return false; } =20 -void panfrost_device_reset(struct panfrost_device *pfdev) +void panfrost_device_reset(struct panfrost_device *pfdev, bool enable_job_= int) { panfrost_gpu_soft_reset(pfdev); =20 panfrost_gpu_power_on(pfdev); panfrost_mmu_reset(pfdev); - panfrost_job_enable_interrupts(pfdev); + + panfrost_job_reset_interrupts(pfdev); + if (enable_job_int) + panfrost_job_enable_interrupts(pfdev); } =20 static int panfrost_device_runtime_resume(struct device *dev) @@ -430,7 +433,7 @@ static int panfrost_device_runtime_resume(struct device= *dev) } } =20 - panfrost_device_reset(pfdev); + panfrost_device_reset(pfdev, true); panfrost_devfreq_resume(pfdev); =20 return 0; diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index ac7147ed806b..45d77cda8b89 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -250,7 +250,7 @@ int panfrost_unstable_ioctl_check(void); =20 int panfrost_device_init(struct panfrost_device *pfdev); void panfrost_device_fini(struct panfrost_device *pfdev); -void panfrost_device_reset(struct panfrost_device *pfdev); +void panfrost_device_reset(struct panfrost_device *pfdev, bool enable_job_= int); =20 extern const struct dev_pm_ops panfrost_pm_ops; =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panf= rost/panfrost_job.c index 54764ce91dea..3ae984f6290f 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.c +++ b/drivers/gpu/drm/panfrost/panfrost_job.c @@ -426,11 +426,14 @@ static struct dma_fence *panfrost_job_run(struct drm_= sched_job *sched_job) return fence; } =20 +void panfrost_job_reset_interrupts(struct panfrost_device *pfdev) +{ + job_write(pfdev, JOB_INT_CLEAR, ALL_JS_INT_MASK); +} + void panfrost_job_enable_interrupts(struct panfrost_device *pfdev) { clear_bit(PANFROST_COMP_BIT_JOB, pfdev->is_suspended); - - job_write(pfdev, JOB_INT_CLEAR, ALL_JS_INT_MASK); job_write(pfdev, JOB_INT_MASK, ALL_JS_INT_MASK); } =20 @@ -723,12 +726,7 @@ panfrost_reset(struct panfrost_device *pfdev, spin_unlock(&pfdev->js->job_lock); =20 /* Proceed with reset now. */ - panfrost_device_reset(pfdev); - - /* panfrost_device_reset() unmasks job interrupts, but we want to - * keep them masked a bit longer. - */ - job_write(pfdev, JOB_INT_MASK, 0); + panfrost_device_reset(pfdev, false); =20 /* GPU has been reset, we can clear the reset pending bit. */ atomic_set(&pfdev->reset.pending, 0); @@ -750,7 +748,7 @@ panfrost_reset(struct panfrost_device *pfdev, drm_sched_start(&pfdev->js->queue[i].sched, 0); =20 /* Re-enable job interrupts now that everything has been restarted. */ - job_write(pfdev, JOB_INT_MASK, ALL_JS_INT_MASK); + panfrost_job_enable_interrupts(pfdev); =20 dma_fence_end_signalling(cookie); } @@ -901,6 +899,7 @@ int panfrost_job_init(struct panfrost_device *pfdev) } } =20 + panfrost_job_reset_interrupts(pfdev); panfrost_job_enable_interrupts(pfdev); =20 return 0; diff --git a/drivers/gpu/drm/panfrost/panfrost_job.h b/drivers/gpu/drm/panf= rost/panfrost_job.h index 5a30ff1503c6..30eda74e3c34 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.h +++ b/drivers/gpu/drm/panfrost/panfrost_job.h @@ -67,6 +67,7 @@ void panfrost_job_close(struct drm_file *file); int panfrost_job_get_slot(struct panfrost_job *job); int panfrost_job_push(struct panfrost_job *job); void panfrost_job_put(struct panfrost_job *job); +void panfrost_job_reset_interrupts(struct panfrost_device *pfdev); void panfrost_job_enable_interrupts(struct panfrost_device *pfdev); void panfrost_job_suspend_irq(struct panfrost_device *pfdev); int panfrost_job_is_idle(struct panfrost_device *pfdev); --=20 2.51.0