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charset="utf-8" The GSP requires several areas of memory to operate. Each of these have their own simple embedded page tables. Set these up and map them for DMA to/from GSP using CoherentAllocation's. Return the DMA handle describing where each of these regions are for future use when booting GSP. Signed-off-by: Alistair Popple --- Change for v3: - Clean up the PTE array creation, with much thanks to Alex for doing most it (please let me know if I should put you as co-developer!) Changes for v2: - Renamed GspMemOjbects to Gsp as that is what they are - Rebased on Alex's latest series --- drivers/gpu/nova-core/gpu.rs | 2 +- drivers/gpu/nova-core/gsp.rs | 83 +++++++++++++++++-- drivers/gpu/nova-core/gsp/fw.rs | 39 +++++++++ .../gpu/nova-core/gsp/fw/r570_144/bindings.rs | 19 +++++ 4 files changed, 134 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index 5da9ad726483..c939b3868271 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -221,7 +221,7 @@ pub(crate) fn new<'a>( =20 sec2_falcon: Falcon::new(pdev.as_ref(), spec.chipset, bar, tru= e)?, =20 - gsp <- Gsp::new(), + gsp <- Gsp::new(pdev)?, =20 _: { gsp.boot(pdev, bar, spec.chipset, gsp_falcon, sec2_falcon= )? }, =20 diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs index 503ce8ee0420..91aa9ce17c57 100644 --- a/drivers/gpu/nova-core/gsp.rs +++ b/drivers/gpu/nova-core/gsp.rs @@ -1,27 +1,94 @@ // SPDX-License-Identifier: GPL-2.0 =20 mod boot; - -use kernel::prelude::*; - mod fw; =20 pub(crate) use fw::{GspFwWprMeta, LibosParams}; =20 +use kernel::device; +use kernel::dma::CoherentAllocation; +use kernel::dma::DmaAddress; +use kernel::dma_write; +use kernel::pci; +use kernel::prelude::*; use kernel::ptr::Alignment; +use kernel::transmute::AsBytes; + +use fw::LibosMemoryRegionInitArgument; =20 pub(crate) const GSP_PAGE_SHIFT: usize =3D 12; pub(crate) const GSP_PAGE_SIZE: usize =3D 1 << GSP_PAGE_SHIFT; pub(crate) const GSP_HEAP_ALIGNMENT: Alignment =3D Alignment::new::<{ 1 <<= 20 }>(); =20 +/// Number of GSP pages to use in a RM log buffer. +const RM_LOG_BUFFER_NUM_PAGES: usize =3D 0x10; + /// GSP runtime data. -/// -/// This is an empty pinned placeholder for now. #[pin_data] -pub(crate) struct Gsp {} +pub(crate) struct Gsp { + libos: CoherentAllocation, + pub loginit: CoherentAllocation, + pub logintr: CoherentAllocation, + pub logrm: CoherentAllocation, +} + +#[repr(C)] +struct PteArray([u64; NUM_ENTRIES]); +/// SAFETY: arrays of `u64` implement `AsBytes` and we are but a wrapper a= round it. +unsafe impl AsBytes for PteArray {} +impl PteArray { + fn new(handle: DmaAddress) -> Self { + let mut ptes =3D [0u64; NUM_PAGES]; + for (i, pte) in ptes.iter_mut().enumerate() { + *pte =3D handle + ((i as u64) << GSP_PAGE_SHIFT); + } + + Self(ptes) + } +} + +/// Creates a new `CoherentAllocation` with `name` of `size` elements, = and +/// register it into the `libos` object at argument position `libos_arg_nr= `. +fn create_logbuffer_dma_object( + dev: &device::Device, +) -> Result> { + let mut obj =3D CoherentAllocation::::alloc_coherent( + dev, + RM_LOG_BUFFER_NUM_PAGES * GSP_PAGE_SIZE, + GFP_KERNEL | __GFP_ZERO, + )?; + let ptes =3D PteArray::::new(obj.dma_handle()= ); + + // SAFETY: `obj` has just been created and we are its sole user. + unsafe { + // Copy the self-mapping PTE at the expected location. + obj.as_slice_mut(size_of::(), size_of_val(&ptes))? + .copy_from_slice(ptes.as_bytes()) + }; + + Ok(obj) +} =20 impl Gsp { - pub(crate) fn new() -> impl PinInit { - pin_init!(Self {}) + pub(crate) fn new(pdev: &pci::Device) -> Result> { + let dev =3D pdev.as_ref(); + let libos =3D CoherentAllocation:::= :alloc_coherent( + dev, + GSP_PAGE_SIZE / size_of::(), + GFP_KERNEL | __GFP_ZERO, + )?; + let loginit =3D create_logbuffer_dma_object(dev)?; + dma_write!(libos[0] =3D LibosMemoryRegionInitArgument::new("LOGINI= T", &loginit))?; + let logintr =3D create_logbuffer_dma_object(dev)?; + dma_write!(libos[1] =3D LibosMemoryRegionInitArgument::new("LOGINT= R", &logintr))?; + let logrm =3D create_logbuffer_dma_object(dev)?; + dma_write!(libos[2] =3D LibosMemoryRegionInitArgument::new("LOGRM"= , &logrm))?; + + Ok(try_pin_init!(Self { + libos, + loginit, + logintr, + logrm, + })) } } diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw= .rs index 181baa401770..dd1e7fc85d85 100644 --- a/drivers/gpu/nova-core/gsp/fw.rs +++ b/drivers/gpu/nova-core/gsp/fw.rs @@ -7,8 +7,10 @@ =20 use core::ops::Range; =20 +use kernel::dma::CoherentAllocation; use kernel::ptr::Alignable; use kernel::sizes::SZ_1M; +use kernel::transmute::{AsBytes, FromBytes}; =20 use crate::gpu::Chipset; use crate::gsp; @@ -99,3 +101,40 @@ pub(crate) fn wpr_heap_size(&self, chipset: Chipset, fb= _size: u64) -> u64 { /// addresses of the GSP bootloader and firmware. #[repr(transparent)] pub(crate) struct GspFwWprMeta(bindings::GspFwWprMeta); + +#[repr(transparent)] +pub(crate) struct LibosMemoryRegionInitArgument(bindings::LibosMemoryRegio= nInitArgument); + +// SAFETY: Padding is explicit and will not contain uninitialized data. +unsafe impl AsBytes for LibosMemoryRegionInitArgument {} + +// SAFETY: This struct only contains integer types for which all bit patte= rns +// are valid. +unsafe impl FromBytes for LibosMemoryRegionInitArgument {} + +impl LibosMemoryRegionInitArgument { + pub(crate) fn new( + name: &'static str, + obj: &CoherentAllocation, + ) -> Self { + /// Generates the `ID8` identifier required for some GSP objects. + fn id8(name: &str) -> u64 { + let mut bytes =3D [0u8; core::mem::size_of::()]; + + for (c, b) in name.bytes().rev().zip(&mut bytes) { + *b =3D c; + } + + u64::from_ne_bytes(bytes) + } + + Self(bindings::LibosMemoryRegionInitArgument { + id8: id8(name), + pa: obj.dma_handle(), + size: obj.size() as u64, + kind: bindings::LibosMemoryRegionKind_LIBOS_MEMORY_REGION_CONT= IGUOUS as u8, + loc: bindings::LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_SY= SMEM as u8, + ..Default::default() + }) + } +} diff --git a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs b/drivers/gp= u/nova-core/gsp/fw/r570_144/bindings.rs index 0407000cca22..6a14cc324391 100644 --- a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs +++ b/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs @@ -124,3 +124,22 @@ fn default() -> Self { } } } +pub type LibosAddress =3D u64_; +pub const LibosMemoryRegionKind_LIBOS_MEMORY_REGION_NONE: LibosMemoryRegio= nKind =3D 0; +pub const LibosMemoryRegionKind_LIBOS_MEMORY_REGION_CONTIGUOUS: LibosMemor= yRegionKind =3D 1; +pub const LibosMemoryRegionKind_LIBOS_MEMORY_REGION_RADIX3: LibosMemoryReg= ionKind =3D 2; +pub type LibosMemoryRegionKind =3D ffi::c_uint; +pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_NONE: LibosMemoryRe= gionLoc =3D 0; +pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_SYSMEM: LibosMemory= RegionLoc =3D 1; +pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_FB: LibosMemoryRegi= onLoc =3D 2; +pub type LibosMemoryRegionLoc =3D ffi::c_uint; +#[repr(C)] +#[derive(Debug, Default, Copy, Clone)] +pub struct LibosMemoryRegionInitArgument { + pub id8: LibosAddress, + pub pa: LibosAddress, + pub size: LibosAddress, + pub kind: u8_, + pub loc: u8_, + pub __bindgen_padding_0: [u8; 6usize], +} --=20 2.50.1