From nobody Thu Oct 2 02:18:08 2025 Received: from mailout1.samsung.com (mailout1.samsung.com [203.254.224.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C89E246BC1 for ; Tue, 30 Sep 2025 03:55:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.24 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759204530; cv=none; b=qDjQdLgDNi+iltvaKHxykYeo/MKKi7vPDWkAeIB3Cpik4i/ZwFgx6HVRWqic7sIs0TNyMZ73XEdnuxRUAiNH4NXgo4ZH/MAmuL7DHFn5XAEfwBYaH/Jcoa89J/AybwG0QJtf6EK0LW+Tj6D2bR+OISQThcQVOGeNpj2nqrOCkwM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759204530; c=relaxed/simple; bh=/rr6fkKgpyd9I1sGDA1z4qN/504HunCyZVLAJ9zIIVY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:MIME-Version: Content-Type:References; b=LP7baG2FED6saXK3YGXPAH+knXqKAbAjDpxdIK0Zvml/SyTAfiGuF7R6F2t65SHKXhVGALeb7PsbvOOqFhZKgt0ZLBVYqGeGUOAYLWFpOcR/IKbUamFjLG/OsGSTFCKYgBHtRSo4U9lipatm31sIeNGoDhqsnNe65U9WOs1/O2k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=kEIXz/O3; arc=none smtp.client-ip=203.254.224.24 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="kEIXz/O3" Received: from epcas5p1.samsung.com (unknown [182.195.41.39]) by mailout1.samsung.com (KnoxPortal) with ESMTP id 20250930035527epoutp0129198e2b73d7642964bb30d740f58756~p8zJlcsTz3124431244epoutp01U for ; Tue, 30 Sep 2025 03:55:27 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.samsung.com 20250930035527epoutp0129198e2b73d7642964bb30d740f58756~p8zJlcsTz3124431244epoutp01U DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1759204527; bh=BSBr8yFx9WBcmfMiEeqIr3+j6OCPbBkalNH3vdDG14M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kEIXz/O3A8tkbLbzJPRO6wiYUQHzdo77H4KcE75DCx35tPFw6mo1riaoGewGVUc7w Yrjuvfyo4nfHpS2jq3NIecUHDQYjx4jNCZoReD9IleBJkNpcMMQXi/BsvEbxmN7XEl 1hKDEdiDncHVHiUgYlzODMIR8X7799XWo2DuT0Xg= Received: from epsnrtp02.localdomain (unknown [182.195.42.154]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPS id 20250930035526epcas5p41bc3d59b8653b402b3d5f9d419e645ec~p8zJG7qMb2319723197epcas5p40; Tue, 30 Sep 2025 03:55:26 +0000 (GMT) Received: from epcas5p4.samsung.com (unknown [182.195.38.90]) by epsnrtp02.localdomain (Postfix) with ESMTP id 4cbPNF54QMz2SSKb; Tue, 30 Sep 2025 03:55:25 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p3.samsung.com (KnoxPortal) with ESMTPA id 20250930035525epcas5p3a1238a3a7bc6e52113838397187e36ba~p8zHi0lrJ2823728237epcas5p3Y; Tue, 30 Sep 2025 03:55:25 +0000 (GMT) Received: from bose.samsungds.net (unknown [107.108.83.9]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250930035521epsmtip124585f13192326b1a3573b5d5d6e8b01~p8zEagPfI2885328853epsmtip1I; Tue, 30 Sep 2025 03:55:21 +0000 (GMT) From: Himanshu Dewangan To: mchehab@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, sumit.semwal@linaro.org, christian.koenig@amd.com, alim.akhtar@samsung.com, manjun@samsung.com, nagaraju.s@samsung.com, ih0206.lee@samsung.com, jehyung.lee@samsung.com Cc: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, Himanshu Dewangan Subject: [PATCH 02/29] arm64: dts: mfc: Add MFC device tree for Auto V920 SoC Date: Tue, 30 Sep 2025 09:33:21 +0530 Message-Id: <20250930040348.3702923-3-h.dewangan@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250930040348.3702923-1-h.dewangan@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250930035525epcas5p3a1238a3a7bc6e52113838397187e36ba X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250930035525epcas5p3a1238a3a7bc6e52113838397187e36ba References: <20250930040348.3702923-1-h.dewangan@samsung.com> From: Nagaraju Siddineni Introduce the device=E2=80=91tree entries for the Samsung Exynos AUTO V920 multimedia=E2=80=91function controller (MFC). The patch defines: - Reserved memory regions for firmware and CMA buffers. - Core0 and Core1 memory mappings. - The main MFC node with basic properties (compatible, reg, interrupts, clocks, DMA window, firmware name, debug mode, etc.). - Per=E2=80=91core sub=E2=80=91nodes (MFC=E2=80=910 and MFC=E2=80=911) with= their own sysmmu, firmware region, and configuration parameters. - Resource table listing supported codecs and their capabilities. Adds full support for the V920 MFC hardware to the mainline kernel device=E2=80=91tree, enabling proper memory allocation, interrupt handling = and codec operation on this platform. Signed-off-by: Nagaraju Siddineni Signed-off-by: Himanshu Dewangan --- .../dts/exynos/exynosautov920-evt2-mfc.dtsi | 187 ++++++++++++++++++ .../arm64/boot/dts/exynos/exynosautov920.dtsi | 1 + 2 files changed, 188 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-evt2-mfc.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-evt2-mfc.dtsi b/arch= /arm64/boot/dts/exynos/exynosautov920-evt2-mfc.dtsi new file mode 100644 index 000000000000..49c61958467e --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov920-evt2-mfc.dtsi @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SAMSUNG EXYNOS AUTO V920 SoC MFC device tree source + * + * Copyright (c) 2025 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +#define MFC_CORE0_MEM_ADDR 0xE9C00000 +#define MFC_CORE1_MEM_ADDR 0xEFB00000 +#define MFC_CMA_MEM_ADDR 0xB0000000 +#define MFC_CMA_MEM_SIZE 0x040000000 /* 64MB */ +#define MFC_FW_MEM_ADDR 0x9F000000 +#define MFC_FW_MEM_SIZE 0x00800000 /* 8MB */ +#define MFC_MEM_SIZE 0x00100000 /* 1MB */ + +/ { +reserved_memory: reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + mfc_fw_rmem: mfc_fw_rmem@9f000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 MFC_FW_MEM_ADDR 0x0 MFC_FW_MEM_SIZE>; + alignment =3D <0x0 0x00010000>; + reusable; + }; + + mfc_buf_rmem: mfc_buf_rmem { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 MFC_CMA_MEM_ADDR 0x0 MFC_CMA_MEM_SIZE>; + alignment =3D <0x0 0x00010000>; + reusable; + linux,cma-default; + }; + + mfc_core0_mem: mfc_core0_mem@e9c00000 { + compatible =3D "samsung,mfc_core0_mem"; + reg =3D <0x0 MFC_CORE0_MEM_ADDR 0x0 MFC_MEM_SIZE>; + }; + + mfc_core1_mem: mfc_core1_mem@efb00000 { + compatible =3D "samsung,mfc_core1_mem"; + reg =3D <0x0 MFC_CORE1_MEM_ADDR 0x0 MFC_MEM_SIZE>; + }; +}; + + mfc: mfc@19cd0000 { + /* Basic setting */ + compatible =3D "samsung,exynos-mfc"; + + reg =3D <0x0 0x19CD0000 0x0 0x10000>; + interrupts =3D ; + clock-names =3D "aclk_mfc"; + clocks =3D <&cmu_top 1900>; + + /* for vb2 device */ + samsung,tzmp; + + /* for F/W buffer to support 36bit-DMA */ + memory-region =3D <&mfc_fw_rmem &mfc_buf_rmem>; + + /* MFC DMA bit (32 or 36) */ + dma_bit_mask =3D <32>; + + /* MFC version */ + ip_ver =3D <0x1600010C>; + + /* MFC firmware name */ + fw_name =3D "mfc_fw_v16.0.bin"; + + /* Debug mode */ + debug_mode =3D <1>; + + /* Features */ + mem_clear =3D <1 0x0>; + /* Support from v11.0 (except 11.2) */ + wait_fw_status =3D <1 0x190122>; + + /* Scheduler 0: round-robin, 1: PBS */ + scheduler =3D <1>; + /* The number of priority in PBS */ + pbs_num_prio =3D <1>; + + /* MFC IOVA threshold (MB) */ + iova_threshold =3D <1700>; + + /* Sub nodes for MFC core */ + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * Resource of standard + * MFC_REG_CODEC_XXX + * 0: MFC only, 1: MFD only, 2: ALL + * 245760: 240Mbps, 122880: 120Mbps, 81920: 80Mbps + */ + mfc_resource { + /* codec name { codec mode, op core type, max Kbps } */ + H264_dec { info =3D <0 2 245760>; }; + VP8_dec { info =3D <14 0 81920>; }; + HEVC_dec { info =3D <17 2 245760>; }; + VP9_dec { info =3D <18 0 81920>; }; + AV1_dec { info =3D <19 1 122880>; }; + H264_enc { info =3D <20 0 245760>; }; + VP8_enc { info =3D <25 0 81920>; }; + HEVC_enc { info =3D <26 0 245760>; }; + VP9_enc { info =3D <27 0 81920>; }; + }; + + /* MFC core device */ + mfc_core0: MFC-0@19cd0000 { + /* Basic setting */ + compatible =3D "samsung,exynos-mfc-core"; + id =3D <0>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + reg =3D <0x0 0x19CD0000 0x0 0x10000>; + interrupts =3D ; + clock-names =3D "aclk_mfc"; + clocks =3D <&cmu_top 1900>; + samsung,tzmp; + + /* MFC version */ + ip_ver =3D <0x1600010C>; + + /* for F/W buffer */ + fw-region =3D <&mfc_core0_mem>; + + /* Sysmmu check */ + share_sysmmu =3D <0>; + axid_mask =3D <0xFFFF>; + tsmux_axid =3D <0x1>; + + /* mem-log buffer size */ + memlog_size =3D <0x80000>; + memlog_sfr_size =3D <0x1000>; + + /* Device virtual address */ + #dma-address-cells =3D <1>; + #dma-size-cells =3D <1>; + dma-window =3D <0x0 0xF0000000>; + + /* Sub nodes for sysmmu, hwfc and mmcache */ + iommu@19c70000 { + reg =3D <0x0 0x19C70000 0x0 0x9000>; + }; + }; + + mfc_core1: MFC-1@19ed0000 { + /* Basic setting */ + compatible =3D "samsung,exynos-mfc-core"; + id =3D <1>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + reg =3D <0x0 0x19ED0000 0x0 0x10000>; + interrupts =3D ; + clock-names =3D "aclk_mfc"; + clocks =3D <&cmu_top 2000>; + samsung,tzmp; + + /* MFC version */ + ip_ver =3D <0x1600010D>; + + /* for F/W buffer */ + fw-region =3D <&mfc_core1_mem>; + + /* Sysmmu check */ + share_sysmmu =3D <0>; + axid_mask =3D <0xFFFF>; + + /* Device virtual address */ + #dma-address-cells =3D <1>; + #dma-size-cells =3D <1>; + dma-window =3D <0x0 0xF0000000>; + + /* Sub nodes for sysmmu, hwfc and mmcache */ + iommu@19e70000 { + reg =3D <0x0 0x19E70000 0x0 0x9000>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/bo= ot/dts/exynos/exynosautov920.dtsi index 0fdf2062930a..f35441d29cdd 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -1507,3 +1507,4 @@ timer { }; =20 #include "exynosautov920-pinctrl.dtsi" +#include "exynosautov920-evt2-mfc.dtsi" --=20 2.34.1