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Tue, 30 Sep 2025 00:39:52 -0700 (PDT) From: Neil Armstrong Date: Tue, 30 Sep 2025 09:39:47 +0200 Subject: [PATCH v4 1/3] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document lanes mapping when not using in USB-C complex Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250930-topic-x1e80100-hdmi-v4-1-86a14e8a34ac@linaro.org> References: <20250930-topic-x1e80100-hdmi-v4-0-86a14e8a34ac@linaro.org> In-Reply-To: <20250930-topic-x1e80100-hdmi-v4-0-86a14e8a34ac@linaro.org> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Xilin Wu , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4284; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=FkhxJ0co19Kqoym1h5+3BxapnZugQIYyqqBK98X5Rdk=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBo24lGLsSZyGGb5W8YJGfg2/QqMxhY23dJb2LoEJ1e w2+0S1WJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaNuJRgAKCRB33NvayMhJ0cBFEA CPjn5+pwXIaZ9w2EM5eYffs0aL8n2Kk2kmge3sdfDzpy8mcRX7rE8T23AZiLAudCVDLIKxoZ7SsGtg FOAU78mvgSA4M7wtED4zVKZTu9Ytj2w0bbB+0ti+mcX8e/TJcPuitJ5ryzFEE00pB9rc+2zGaDhzOc Ce06/GOp4aDIo5zLu3rr9yjkH5ok9D+LSPX6i4i0lX55LN0BqO43Tq+d8WOaxRhDzzEUneUsZG9SJP T2LXBddf6ut3MFJzrTHjNyOnQ9bUaOjt0Ctp+X22ytlEG5RFWU4W0inBm1D9vDVBhdMuZA69mSWAWN JI0/r4lpWYXZDqgN4AstVC5F0mQV5HmJFi1ussMP040phXUOtaiMVzO+QQpSLnZN0aHqQwGKPyMy0l 8onKaypSr6wxGGmhNdizB9/p34ir6q+8AiHeEt5/BixB//hr5/DeYhhUWVtwoHZUs5tU5jJ/STY1pg kJ3O+DYD70TXUePPZ7iLoFyxceB6bL5w+Xt1MMdovI2USqDe3GpYOFSXBLAyWXwDDq2BnKL8OVQDtt xZfqr744C94O3MZDzUz+z0Kl4ThhPgAZAYYpvRBqqxOpubOFokhhfDhRSyvfSVdbcwxlM70NYtuQXU 518xOIlrKcIvYlBRsvVt+mJwvn0jUEkPSX7KCSMhXsjn949ot2DGQdxGYr4g== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top of a combo glue to route either lanes to the 4 shared physical lanes. The routing of the lanes can be: - 2 DP + 2 USB3 - 4 DP - 2 USB3 The layout of the lanes was designed to be mapped and swapped related to the USB-C Power Delivery negociation, so it supports a finite set of mappings inherited by the USB-C Altmode layouts. Nevertheless those QMP Comby PHY can be used to drive a DisplayPort connector, DP->HDMI bridge, USB3 A Connector, etc... without an USB-C connector and no PD events. Document the data-lanes on numbered port@0 out endpoints, allowing us to document the lanes mapping to DisplayPort and/or USB3 connectors/peripherals. Signed-off-by: Neil Armstrong --- .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 67 ++++++++++++++++++= +++- 1 file changed, 66 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43d= p-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43d= p-phy.yaml index 5005514d7c3a1e4a8893883497fd204bc04e12be..ac9a307675bc4e86f7693ba260c= 75b7b88d992ec 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.y= aml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.y= aml @@ -81,10 +81,75 @@ properties: =20 ports: $ref: /schemas/graph.yaml#/properties/ports + properties: port@0: - $ref: /schemas/graph.yaml#/properties/port + $ref: /schemas/graph.yaml#/$defs/port-base description: Output endpoint of the PHY + unevaluatedProperties: false + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + endpoint@0: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + description: Display Port Output lanes of the PHY when used wi= th static mapping, + The entry index is the DP lanes index, and the number is the PHY + signal in the order RX0, TX0, TX1, RX1. + unevaluatedProperties: false + + properties: + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 4 + oneOf: + - items: # DisplayPort 1 lane, normal orientation + - const: 3 + - items: # DisplayPort 1 lane, flipped orientation + - const: 0 + - items: # DisplayPort 2 lanes, normal orientation + - const: 3 + - const: 2 + - items: # DisplayPort 2 lanes, flipped orientation + - const: 0 + - const: 1 + - items: # DisplayPort 4 lanes, normal orientation + - const: 3 + - const: 2 + - const: 1 + - const: 0 + - items: # DisplayPort 4 lanes, flipped orientation + - const: 0 + - const: 1 + - const: 2 + - const: 3 + required: + - data-lanes + + endpoint@1: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + description: USB Output lanes of the PHY when used with static= mapping. + The entry index is the USB3 lane in the order TX then RX, and the + number is the PHY signal in the order RX0, TX0, TX1, RX1. + unevaluatedProperties: false + + properties: + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + oneOf: + - items: # USB3, normal orientation + - const: 1 + - const: 0 + - items: # USB3, flipped orientation + - const: 2 + - const: 3 + + required: + - data-lanes =20 port@1: $ref: /schemas/graph.yaml#/properties/port --=20 2.34.1 From nobody Sat Oct 4 05:22:59 2025 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8DFDB27F01D for ; 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Tue, 30 Sep 2025 00:39:53 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:3d9:2080:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e5707c1e7sm44021125e9.21.2025.09.30.00.39.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Sep 2025 00:39:53 -0700 (PDT) From: Neil Armstrong Date: Tue, 30 Sep 2025 09:39:48 +0200 Subject: [PATCH v4 2/3] phy: qcom: qmp-combo: get the USB3 & DisplayPort lanes mapping from DT Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250930-topic-x1e80100-hdmi-v4-2-86a14e8a34ac@linaro.org> References: <20250930-topic-x1e80100-hdmi-v4-0-86a14e8a34ac@linaro.org> In-Reply-To: <20250930-topic-x1e80100-hdmi-v4-0-86a14e8a34ac@linaro.org> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Xilin Wu , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top of a combo glue to route either lanes to the 4 shared physical lanes. The routing of the lanes can be: - 2 DP + 2 USB3 - 4 DP - 2 USB3 Get the lanes mapping from DT and stop registering the USB-C muxes in favor of a static mode and orientation detemined by the lanes mapping. This allows supporting boards with direct connection of USB3 and DisplayPort lanes to the QMP Combo PHY lanes, not using the USB-C Altmode feature. Signed-off-by: Neil Armstrong --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 145 ++++++++++++++++++++++++++= ++-- 1 file changed, 137 insertions(+), 8 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualco= mm/phy-qcom-qmp-combo.c index 7b5af30f1d028c592500e723ecd27b54ed554709..3a100807448152d7a08b6d1086f= 4a415b00e5255 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -1744,6 +1745,26 @@ static const u8 qmp_dp_v6_pre_emphasis_hbr_rbr[4][4]= =3D { { 0x22, 0xff, 0xff, 0xff } }; =20 +struct qmp_combo_lane_mapping { + unsigned int lanes_count; + enum typec_orientation orientation; + u32 lanes[4]; +}; + +static const struct qmp_combo_lane_mapping usb3_data_lanes[] =3D { + { 2, TYPEC_ORIENTATION_NORMAL, { 1, 0 }}, + { 2, TYPEC_ORIENTATION_REVERSE, { 2, 3 }}, +}; + +static const struct qmp_combo_lane_mapping dp_data_lanes[] =3D { + { 1, TYPEC_ORIENTATION_NORMAL, { 0 }}, + { 1, TYPEC_ORIENTATION_REVERSE, { 3 }}, + { 2, TYPEC_ORIENTATION_NORMAL, { 3, 2 }}, + { 2, TYPEC_ORIENTATION_REVERSE, { 0, 1 }}, + { 4, TYPEC_ORIENTATION_NORMAL, { 3, 2, 1, 0 }}, + { 4, TYPEC_ORIENTATION_REVERSE, { 0, 1, 2, 3 }}, +}; + struct qmp_combo; =20 struct qmp_combo_offsets { @@ -4117,6 +4138,87 @@ static struct phy *qmp_combo_phy_xlate(struct device= *dev, const struct of_phand return ERR_PTR(-EINVAL); } =20 +static void qmp_combo_find_lanes_orientation(const struct qmp_combo_lane_m= apping *mapping, + unsigned int mapping_count, + u32 *lanes, unsigned int lanes_count, + enum typec_orientation *orientation) +{ + int i; + + for (i =3D 0; i < mapping_count; i++) { + if (mapping[i].lanes_count !=3D lanes_count) + continue; + if (!memcmp(mapping[i].lanes, lanes, sizeof(u32) * lanes_count)) { + *orientation =3D mapping[i].orientation; + return; + } + } +} + +static int qmp_combo_get_dt_lanes_mapping(struct device *dev, unsigned int= endpoint, + u32 *data_lanes, unsigned int max, + unsigned int *count) +{ + struct device_node *ep; + int ret; + + ep =3D of_graph_get_endpoint_by_regs(dev->of_node, 0, endpoint); + if (!ep) + return -EINVAL; + + ret =3D of_property_count_u32_elems(ep, "data-lanes"); + if (ret < 0) + goto err_node_put; + + *count =3D ret; + + ret =3D of_property_read_u32_array(ep, "data-lanes", data_lanes, + max_t(unsigned int, *count, max)); + +err_node_put: + of_node_put(ep); + + return ret; +} + +static int qmp_combo_get_dt_dp_orientation(struct device *dev, + enum typec_orientation *orientation) +{ + unsigned int count; + u32 data_lanes[4]; + int ret; + + /* DP is described on the first endpoint of the first port */ + ret =3D qmp_combo_get_dt_lanes_mapping(dev, 0, data_lanes, 4, &count); + if (ret < 0) + return ret =3D=3D -EINVAL ? 0 : ret; + + /* Search for a match and only update orientation if found */ + qmp_combo_find_lanes_orientation(dp_data_lanes, ARRAY_SIZE(dp_data_lanes), + data_lanes, count, orientation); + + return 0; +} + +static int qmp_combo_get_dt_usb3_orientation(struct device *dev, + enum typec_orientation *orientation) +{ + unsigned int count; + u32 data_lanes[2]; + int ret; + + /* USB3 is described on the second endpoint of the first port */ + ret =3D qmp_combo_get_dt_lanes_mapping(dev, 1, data_lanes, 2, &count); + if (ret < 0) + return ret =3D=3D -EINVAL ? 0 : ret; + + /* Search for a match and only update orientation if found */ + qmp_combo_find_lanes_orientation(usb3_data_lanes, ARRAY_SIZE(usb3_data_la= nes), + data_lanes, count, orientation); + + return 0; +} + static int qmp_combo_probe(struct platform_device *pdev) { struct qmp_combo *qmp; @@ -4167,9 +4269,41 @@ static int qmp_combo_probe(struct platform_device *p= dev) if (ret) goto err_node_put; =20 - ret =3D qmp_combo_typec_register(qmp); - if (ret) - goto err_node_put; + qmp->qmpphy_mode =3D QMPPHY_MODE_USB3DP; + + if (of_find_property(dev->of_node, "mode-switch", NULL) || + of_find_property(dev->of_node, "orientation-switch", NULL)) { + ret =3D qmp_combo_typec_register(qmp); + if (ret) + goto err_node_put; + } else { + enum typec_orientation dp_orientation =3D TYPEC_ORIENTATION_NONE; + enum typec_orientation usb3_orientation =3D TYPEC_ORIENTATION_NONE; + + ret =3D qmp_combo_get_dt_dp_orientation(dev, &dp_orientation); + if (ret) + goto err_node_put; + + ret =3D qmp_combo_get_dt_usb3_orientation(dev, &usb3_orientation); + if (ret) + goto err_node_put; + + if (dp_orientation =3D=3D TYPEC_ORIENTATION_NONE && + usb3_orientation !=3D TYPEC_ORIENTATION_NONE) { + qmp->qmpphy_mode =3D QMPPHY_MODE_USB3_ONLY; + qmp->orientation =3D usb3_orientation; + } else if (usb3_orientation =3D=3D TYPEC_ORIENTATION_NONE && + dp_orientation !=3D TYPEC_ORIENTATION_NONE) { + qmp->qmpphy_mode =3D QMPPHY_MODE_DP_ONLY; + qmp->orientation =3D dp_orientation; + } else if (dp_orientation !=3D TYPEC_ORIENTATION_NONE && + dp_orientation =3D=3D usb3_orientation) { + qmp->qmpphy_mode =3D QMPPHY_MODE_USB3DP; + qmp->orientation =3D dp_orientation; + } else { + dev_warn(dev, "unable to determine orientation & mode from data-lanes"); + } + } =20 ret =3D drm_aux_bridge_register(dev); if (ret) @@ -4189,11 +4323,6 @@ static int qmp_combo_probe(struct platform_device *p= dev) if (ret) goto err_node_put; =20 - /* - * The hw default is USB3_ONLY, but USB3+DP mode lets us more easily - * check both sub-blocks' init tables for blunders at probe time. - */ - qmp->qmpphy_mode =3D QMPPHY_MODE_USB3DP; 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Tue, 30 Sep 2025 00:39:54 -0700 (PDT) From: Neil Armstrong Date: Tue, 30 Sep 2025 09:39:49 +0200 Subject: [PATCH v4 3/3] arm64: dts: qcom: x1e78100-lenovo-thinkpad-t14s: add HDMI nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250930-topic-x1e80100-hdmi-v4-3-86a14e8a34ac@linaro.org> References: <20250930-topic-x1e80100-hdmi-v4-0-86a14e8a34ac@linaro.org> In-Reply-To: <20250930-topic-x1e80100-hdmi-v4-0-86a14e8a34ac@linaro.org> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Xilin Wu , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2973; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=4u/xRvsm43ERIC9SDhDBDVZyzLfWUriP1xNe0S9I9zU=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBo24lHJ7BpPNhok6jIjnY3wiCZ46nr8Kfj3b3N5c8v z47+RpiJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaNuJRwAKCRB33NvayMhJ0Yo3EA DFBx0pl3oCucSHqRN7Qm1U0wHR3Mrw6+BYAhAtk1A/HcYdFsepg36+PknedLaizw79M3K0PXh2lXpw dgmIDxxlk3knPqL/zWBopJ2iX+kqOB/HlsnkdUFN2mN48HpVamGls2YrCQOcClYYB92u9Y//uhIqKu 8t3+SGG4QfmVaj+LWHMQlaY4nIGFWbAMy5z11p8uMoC24jG/hPtGYX4xikPggl13YOtEHKOB3lAfIS ddu/43oiQaC4EdnQOllC4dm0BHcs6hAW5Hc3cR3Uf+DqctDr7XUVcZuhWSUMhrBg4eWfgEEGW6jgSE OaBCqDCdl4nqMTRVIE6VFQKxHD9Rx8vAUC6vtTlgJSaPeEdo7G3Ngfu4Pw2Zbhq6DjJhFiQINQ9bdb KmApOwOAoeTDT7gAD6BhoVShU+18VZ7oGdCloCe+IcXs+QY4MibB0Lzc+DJno5lmGBQrcC9YnjQGVT ehckPdxxDhW7yjTXX+xYDRqpkLksczg0KNybBoZkVhdOb6vdfG4RZ+QiCZjO5y8S73YieP/F1ICVCd 0uRZT6RUXW+THs3+xIHMO7q9MSZGisa+PsjvUPqFyt+zwzxrPhUYusNbCSt2HSvCneEU6lj1AFJeF8 e+63lppzSagEEacQH9sHARNXtmsfU5Wa4WW0fywrbKv1i/Ejv8jSlxIpYe0g== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The Thinkpad T14s embeds a transparent 4lanes DP->HDMI transceiver connected to the third QMP Combo PHY 4 lanes. Add all the data routing, disable mode switching and specify the QMP Combo PHY should be in DP-Only mode to route the 4 lanes to the underlying DP phy. Signed-off-by: Neil Armstrong Reviewed-by: Dmitry Baryshkov --- .../dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi | 81 ++++++++++++++++++= ++++ 1 file changed, 81 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi b/= arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi index 654cbce9d6ecb61c8a6e874d16385d66e362e439..37168b6214b21ec51918b44cc40= 0581ba8ca4cbe 100644 --- a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi @@ -62,6 +62,45 @@ switch-lid { }; }; =20 + hdmi-bridge { + compatible =3D "realtek,rtd2171"; + + pinctrl-0 =3D <&hdmi_hpd_default>; + pinctrl-names =3D "default"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + hdmi_bridge_dp_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_qmpphy_out_dp>; + }; + }; + + port@1 { + reg =3D <1>; + + hdmi_bridge_tmds_out: endpoint { + remote-endpoint =3D <&hdmi_con>; + }; + }; + }; + }; + + hdmi-connector { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_con: endpoint { + remote-endpoint =3D <&hdmi_bridge_tmds_out>; + }; + }; + }; + pmic-glink { compatible =3D "qcom,x1e80100-pmic-glink", "qcom,sm8550-pmic-glink", @@ -1028,6 +1067,14 @@ &mdss_dp1_out { link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; }; =20 +&mdss_dp2 { + status =3D "okay"; +}; + +&mdss_dp2_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + &mdss_dp3 { /delete-property/ #sound-dai-cells; =20 @@ -1317,6 +1364,12 @@ eusb6_reset_n: eusb6-reset-n-state { output-low; }; =20 + hdmi_hpd_default: hdmi-hpd-default-state { + pins =3D "gpio126"; + function =3D "usb2_dp"; + bias-disable; + }; + tpad_default: tpad-default-state { pins =3D "gpio3"; function =3D "gpio"; @@ -1516,6 +1569,34 @@ &usb_1_ss0_qmpphy_out { remote-endpoint =3D <&retimer_ss0_ss_in>; }; =20 +&usb_1_ss2_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + /delete-property/ mode-switch; + /delete-property/ orientation-switch; + + status =3D "okay"; + + ports { + port@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + /delete-node/ endpoint; + + usb_1_ss2_qmpphy_out_dp: endpoint@0 { + reg =3D <0>; + + data-lanes =3D <3 2 1 0>; + remote-endpoint =3D <&hdmi_bridge_dp_in>; + }; + + /* No USB3 lanes connected */ + }; + }; +}; + &usb_1_ss1_hsphy { vdd-supply =3D <&vreg_l3j_0p8>; vdda12-supply =3D <&vreg_l2j_1p2>; --=20 2.34.1