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charset="utf-8" From: Sachin Gupta This update introduces the capability to configure HS200 and HS400 DLL settings via the device tree and parsing it. Signed-off-by: Sachin Gupta Signed-off-by: Ram Prakash Gupta --- drivers/mmc/host/sdhci-msm.c | 91 ++++++++++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 36700735aa3e..d07f0105b733 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -265,6 +265,19 @@ struct sdhci_msm_variant_info { const struct sdhci_msm_offset *offset; }; =20 +/* + * DLL registers which needs be programmed with HSR settings. + * Add any new register only at the end and don't change the + * sequence. + */ +struct sdhci_msm_dll { + u32 dll_config[2]; + u32 dll_config_2[2]; + u32 dll_config_3[2]; + u32 dll_usr_ctl[2]; + u32 ddr_config[2]; +}; + struct sdhci_msm_host { struct platform_device *pdev; void __iomem *core_mem; /* MSM SDCC mapped address */ @@ -273,6 +286,7 @@ struct sdhci_msm_host { struct clk *xo_clk; /* TCXO clk needed for FLL feature of cm_dll*/ /* core, iface, cal and sleep clocks */ struct clk_bulk_data bulk_clks[4]; + struct sdhci_msm_dll dll; #ifdef CONFIG_MMC_CRYPTO struct qcom_ice *ice; #endif @@ -301,6 +315,7 @@ struct sdhci_msm_host { u32 dll_config; u32 ddr_config; bool vqmmc_enabled; + bool artanis_dll; }; =20 static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_h= ost *host) @@ -2516,6 +2531,73 @@ static int sdhci_msm_gcc_reset(struct device *dev, s= truct sdhci_host *host) return ret; } =20 +static int sdhci_msm_dt_get_array(struct device *dev, const char *prop_nam= e, + u32 **dll_table, int *len) +{ + struct device_node *np =3D dev->of_node; + u32 *arr =3D NULL; + int ret =3D 0, sz =3D 0; + + if (!np) + return -ENODEV; + if (!of_get_property(np, prop_name, &sz)) + return -EINVAL; + + sz =3D sz / sizeof(*arr); + if (sz <=3D 0) + return -EINVAL; + + arr =3D kcalloc(sz, sizeof(*arr), GFP_KERNEL); + if (!arr) + return -ENOMEM; + + ret =3D of_property_read_u32_array(np, prop_name, arr, sz); + if (ret) { + dev_err(dev, "%s failed reading array %d\n", prop_name, ret); + *len =3D 0; + return ret; + } + + *dll_table =3D arr; + *len =3D sz; + + return ret; +} + +static int sdhci_msm_dt_parse_dll_info(struct device *dev, struct sdhci_ms= m_host *msm_host) +{ + int dll_table_len, dll_reg_count; + u32 *dll_table =3D NULL; + int i, j; + + msm_host->artanis_dll =3D false; + + if (sdhci_msm_dt_get_array(dev, "qcom,dll-hsr-list", + &dll_table, &dll_table_len)) + return -EINVAL; + + dll_reg_count =3D sizeof(struct sdhci_msm_dll) / sizeof(u32); + + if (dll_table_len !=3D dll_reg_count) { + dev_err(dev, "Number of HSR entries are not matching\n"); + return -EINVAL; + } + + for (i =3D 0, j =3D 0; j < 2; i =3D i + 5, j++) { + msm_host->dll.dll_config[j] =3D dll_table[i]; + msm_host->dll.dll_config_2[j] =3D dll_table[i + 1]; + msm_host->dll.dll_config_3[j] =3D dll_table[i + 2]; + msm_host->dll.dll_usr_ctl[j] =3D dll_table[i + 3]; + msm_host->dll.ddr_config[j] =3D dll_table[i + 4]; + } + + msm_host->artanis_dll =3D true; + + kfree(dll_table); + + return 0; +} + static int sdhci_msm_probe(struct platform_device *pdev) { struct sdhci_host *host; @@ -2562,6 +2644,15 @@ static int sdhci_msm_probe(struct platform_device *p= dev) =20 msm_host->saved_tuning_phase =3D INVALID_TUNING_PHASE; =20 + /* + * Parse HSR dll only when property is present in DT. + */ + if (of_find_property(node, "qcom,dll-hsr-list", NULL)) { + ret =3D sdhci_msm_dt_parse_dll_info(&pdev->dev, msm_host); + if (ret) + return ret; + } + ret =3D sdhci_msm_gcc_reset(&pdev->dev, host); if (ret) return ret; --=20 2.34.1