From nobody Wed Oct 1 22:33:18 2025 Received: from mail-pf1-f175.google.com (mail-pf1-f175.google.com [209.85.210.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ADB9F2C026D for ; Mon, 29 Sep 2025 06:57:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759129058; cv=none; b=jGAV7+h5fQh/IsfXmZDsQzgGsFFrytd7QQlMMQuW6nMxMJY7vadLkQamMTb7xlzyGnECZMRHwBqj8zVH0wuThhXObeaJJoUC5TbS/Kv5hee1kZVOQje5G5Ekx0e7DE5SoI3+PH9BkSF+NJerTEHZA5ekEfqNY7VhG6umEtFouoU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759129058; c=relaxed/simple; bh=MkXy8B0HvDpu3XB7QRokGYJw4lWQNt80EBtTGcgIso0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=peEiU+a6m2N31pfgnF5FALnZK8xbQyPthFwx9v4qJ7D5Sg216l9Ufu5P0CJT4dWQCnUofkIq5hB9wbqFmfRrmtbdNPnqJ7CsUABtvd3lEgEAxNCjydRNaA6ugl4NATTwsWGXmOYLvsfJi5K4Gfe+M3/mhtz+WCYRJzvKNZF7iMQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=OsH0QbCq; arc=none smtp.client-ip=209.85.210.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OsH0QbCq" Received: by mail-pf1-f175.google.com with SMTP id d2e1a72fcca58-7811a02316bso1995860b3a.3 for ; Sun, 28 Sep 2025 23:57:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1759129056; x=1759733856; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hzgyK9PV21LUzCc3kELjlfdCuadwZ4YNSm8kpUWXn6s=; b=OsH0QbCqM9VfA3L6Q2MXi8CDbIvAsi8P5xxklr5vSQ9qD+gaPoyLAuY0LwzA2biB8S SGquCGCWlrMsE6sONWoADao3QMi93cay+RgUXmb9GcGnyaJbKn9og1PMrs0DI/86F7CJ 6TQmuItEQKGBp7QitYkgayxxZVGax7tPfqo91sPnrtZRpfkqewNBOb9mU5FD2Bvl+JiO FgZDa7g01Nd2PchyOV45TWBPp8ebAD17UNycs4x0qwGXlAdOGiHJhP7BLvSKoX8nTz5e o59aMidehSoN3l4C1zUFxvbTsX0ugvc4Kg3H1Kcjt240nGRmjO6rWUj8O4h1abhBukbo +rlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759129056; x=1759733856; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hzgyK9PV21LUzCc3kELjlfdCuadwZ4YNSm8kpUWXn6s=; b=ZQ7K6oxALbiYghccxrLbrvrzJGGXmLSHbY1rmUcry6UCldIKe1/VxsI7Q6LCFb7gR1 n5ER3QzzxjBK32kuIfgT/A+sN9ybt6jEO4iFvJatxM04J4SXRAQEhoahkHJG0oK8S1IK lWw6fpidXcfxsC726TWb6BtxERT71H/19DOyXltZ/TPMWbWwh/LHRg6dfS0mVfcWpPd7 WRF8umadhLJo3JXehlzlpFQ2As61NawNSnS5EL4G7yVGBbYXhP/IXwk3cJs7GXecPArt XDEjXdXZPEYo1MMiOtRMZCxoTuOzqJdkEVmXZNfXiom7n5xypRDFCR4Xt/3cuTySdXop HZoQ== X-Forwarded-Encrypted: i=1; AJvYcCVG+RliAb4C2iZYB88DOi7Ts7mXQEDFWivWonJy4Ty76TX7LDDOuXM3/R2G9GRe1lZIPODD5IemcQ5MpMA=@vger.kernel.org X-Gm-Message-State: AOJu0Yw/hdQmSf/ZRLgFpjeXpXOnIypjnnypX8SG9g2PGBRVcdtuLzPs zHRcgWAy8+7S5oriXSek+OGfjNKYqk/gZbVuNsOU4oHk2blIsGpRt7YO X-Gm-Gg: ASbGncv/fYfdZKFhUZtB3G6d82r7tggL3XgDg26lYwNysZuGuBoDiO9iOU+RtQGvwhU azTqf0FIMWUThIqWkedmB2kEqJLDQNzCXRmvujInX9+sk+UNhrLEHbQTijr4wJylLCOUihOTB4X zssGXVLXvyO0tX3cStFkZ7e7v6YNL+ZOIxqKADvHR3cikbrlIFX5MT9fGY0uXnO8v7oWw0R5xSn vqPcW0Q7wwtjK3IscxKDE9HhwLqLioqgeqtW7sn8WewVD82JfLDXWC/HhIg+PfqVchSnE+HVXkG EtetsJsDzuBxGw2STntleAyrFINayOfUCn9uRUxsclf4PJWI9PXfF2YhhgSQPZsc2p4rUOiVnr2 +UZ8fOfFJ0sSqRnkhVSlgjd2Vpw1VAHQdLaHnXq402ssTlC6oiv8cO380hZ2he78O X-Google-Smtp-Source: AGHT+IH4i8/G2t5oPtUqYoiiGGusyxmzE1tEeQmVVpR1IWJ1EkiDqJkPlsoVlGwgQEV5FUFAV7yu3Q== X-Received: by 2002:a05:6a21:3397:b0:245:fb85:ef58 with SMTP id adf61e73a8af0-2e7d184ddcdmr19240666637.40.1759129055820; Sun, 28 Sep 2025 23:57:35 -0700 (PDT) Received: from localhost.localdomain ([120.229.16.251]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b57c53cac77sm10549595a12.17.2025.09.28.23.57.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Sep 2025 23:57:35 -0700 (PDT) From: Liangbin Lian To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, quentin.schulz@cherry.de, kever.yang@rock-chips.com, naoki@radxa.com, honyuenkwun@gmail.com, inindev@gmail.com, ivan8215145640@gmail.com, neil.armstrong@linaro.org, mani@kernel.org, dsimic@manjaro.org, pbrobinson@gmail.com, alchark@gmail.com, didi.debian@cknow.org, jjm2473@gmail.com, jbx6244@gmail.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/3] dt-bindings: vendor-prefixes: Document LinkEase Date: Mon, 29 Sep 2025 14:57:12 +0800 Message-ID: <20250929065714.27741-2-jjm2473@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250929065714.27741-1-jjm2473@gmail.com> References: <20250929065714.27741-1-jjm2473@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" LinkEase is a company focusing on the research and development of network equipment and related software and hardware from Shenzhen. Add vendor prefix for it. Signed-off-by: Liangbin Lian Acked-by: Conor Dooley --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 9ec8947dfcad..db496416b250 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -873,6 +873,8 @@ patternProperties: description: Lincoln Technology Solutions "^lineartechnology,.*": description: Linear Technology + "^linkease,.*": + description: Shenzhen LinkEase Network Technology Co., Ltd. "^linksprite,.*": description: LinkSprite Technologies, Inc. "^linksys,.*": --=20 2.51.0 From nobody Wed Oct 1 22:33:18 2025 Received: from mail-pl1-f171.google.com (mail-pl1-f171.google.com [209.85.214.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 836752C026D for ; Mon, 29 Sep 2025 06:57:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759129062; cv=none; b=Q6COF8uPZg3T2xZ5KT6Ip0x38lAmwf6Uv+rDbLMSzVWKNULzbyGGLF3wA05xLp9N5wQB5jT/6PZPVhV2WeZWcMM5ihqbJRjvIZmpZ78HHbtxvTK6ZVros9O+UvvbMCxYxjltcxj6QhpYSSgGGMvjI2r4qWRbRN/oW1ryXokD6RU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759129062; c=relaxed/simple; bh=OxgF0sgU8kJelkuDjh/RK/kYTlp1sBcDIk4CfwqFFXk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GCKHP5BkATd1uJtm4QICDpUSZhJ+pPsSfGXZOtpwxubmmEmKn4I9vOfxX2pZ/GLvoGAjukRwMwUMRlOKRplAQpDzXXhQhX0cmtVggyRQGbMZCKMf2HqkvQoJiirwPaF23TF/TQSw3E6sYuHpSVkNiK0/gpjL1ppGG5rWhBU1vGE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Qk9InYnE; arc=none smtp.client-ip=209.85.214.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Qk9InYnE" Received: by mail-pl1-f171.google.com with SMTP id d9443c01a7336-26e68904f0eso42143955ad.0 for ; Sun, 28 Sep 2025 23:57:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1759129061; x=1759733861; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/i3lJ5UnNUwnZHcBsmIKwojuviTql3djQ9HFxU9mOWY=; b=Qk9InYnEs2RiP5gBVWTjrkHfvx6iD1ivIJ2c2KsIIsZqn+ABLLgP1sHQcONXMke/+L SUsJbhab1K5duPct5LBS8BUZbuEXWGjSDAI5Nn/I0M6jHj+H9zBtpV1nSTC7SLmQFOiN 4b1zsKwp5S/lRdwHFO1ixYVsVVzYOqkwbohaBMp3EQQzB4eFtf/ddT5iR1rlO14V4nbv 8KsAxv7TRab7aUVO+3+E9fH2HWPtiw68U6aS8y8zlqOtXDEtBdY9GasJHvSTSwJi2wqT 6iE6rEx/6S9MbdgRDNbC4uI83Rl/iGKkfjEqJ+VWy7IyvySZJQHcgNxyCCCLDfE/UFDO Kmtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759129061; x=1759733861; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/i3lJ5UnNUwnZHcBsmIKwojuviTql3djQ9HFxU9mOWY=; b=kCMX3cEawjpYx8Dm1eYxPKhOyQ7kAk9XTmBkpoPJ3vt0stiy5WfB5iazSlMA+UkVut pU08vknJfwf0k64i0poJqLEPhXhjXeZK4N4Em6VFOG2aiabmMsvy7S3cYn0uIn2Vo4nB DD+AcVqGERjfS5lciFtfr4B5WgcLWbn/oBnUgn+u+ka+X8b6UF0CKLoOvaDMhelw9HrG YygH2kwySWKXN0O02+2RLUgv49cKveLlViTXmQF5Rr37ftOBSXD3nbIhYAiAuCnm6WOA 6fLChD53EqDjIdadVDFy3YGsDbj6X/lPd/LIwOypjcCPgq+dzXvaaTzsgoRPSnwoHdUv SitQ== X-Forwarded-Encrypted: i=1; AJvYcCUfQZE29Akyajl7xcwvLGPYbltHMgVxayi/ohtbRrnjoQgL4cRq8bQiTWLHo0XK7xO4RKbKgjd9BcNK4+w=@vger.kernel.org X-Gm-Message-State: AOJu0YxNHLbQnpCe2EfW5brArMEO0O8AMt5MfO/wL3ZYPIMtHlq61JSd 22X9IZDwHsatZYfqINqcuIS8P9GWyuXPqOCyI5ZkJzCPgJr/BB4IhgGV X-Gm-Gg: ASbGncvVwmmcFcx3prJGbAimnLDwm58xzqpILUtUtw1Z8My0eUPYj/Q5Su0M0EUNuyW /X8Hyz2fJJhYXWsppXkA1QMId8osj79snXdYm/b1gaTbp/AGEp4L4GH9RzJNynsrwhZmfMj/hVg UWoHN3yTPm9FbNUg3lnV9xnrfhi/nHejtQEWy4IWUf898e+MJ9SDvuEx/6FASBRToplHBPn7c/f BS6hAIEdiRX1suCUuTjqwDStLa120i1pmYcJCmsgnsxnJhgFpI181sxw66VCxD49oikOvHKu0eG RQaWVw9xecYxbKPUAw0fkcvvTjO+8LZXu/8DTCCTI8EI1Uy0OaDQCd4zmhZp1YBq/NqHgNs0epy bANMbCffD64tRZRXK/hKJ/oZlcM/bhG+bQab/7BiN6zI= X-Google-Smtp-Source: AGHT+IGXx48956iAsgN2mLQXj+DWiZQ/oeB2pwDmDud/7PQv/mcuFlsHf1iG+3XAh+OJgY293RcZBw== X-Received: by 2002:a17:903:3bce:b0:25f:fe5f:c927 with SMTP id d9443c01a7336-27ed4a7f364mr157596135ad.31.1759129060832; Sun, 28 Sep 2025 23:57:40 -0700 (PDT) Received: from localhost.localdomain ([120.229.16.251]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b57c53cac77sm10549595a12.17.2025.09.28.23.57.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Sep 2025 23:57:40 -0700 (PDT) From: Liangbin Lian To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, quentin.schulz@cherry.de, kever.yang@rock-chips.com, naoki@radxa.com, honyuenkwun@gmail.com, inindev@gmail.com, ivan8215145640@gmail.com, neil.armstrong@linaro.org, mani@kernel.org, dsimic@manjaro.org, pbrobinson@gmail.com, alchark@gmail.com, didi.debian@cknow.org, jjm2473@gmail.com, jbx6244@gmail.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/3] dt-bindings: arm: rockchip: Add LinkEase EasePi R1 Date: Mon, 29 Sep 2025 14:57:13 +0800 Message-ID: <20250929065714.27741-3-jjm2473@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250929065714.27741-1-jjm2473@gmail.com> References: <20250929065714.27741-1-jjm2473@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" LinkEase EasePi R1 is a high-performance mini router based on RK3568. Signed-off-by: Liangbin Lian Acked-by: Conor Dooley --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 28db6bd6aa5b..ec2271cfb7e1 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -726,6 +726,11 @@ properties: - const: lckfb,tspi-rk3566 - const: rockchip,rk3566 =20 + - description: LinkEase EasePi R1 + items: + - const: linkease,easepi-r1 + - const: rockchip,rk3568 + - description: Luckfox Core3576 Module based boards items: - enum: --=20 2.51.0 From nobody Wed Oct 1 22:33:18 2025 Received: from mail-pj1-f54.google.com (mail-pj1-f54.google.com [209.85.216.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1F9B2C026D for ; Mon, 29 Sep 2025 06:57:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759129069; cv=none; b=B6urWVbd2SwU9NUrbRYochiVFEyLb3PpWeZGGbVFvF27oCd6Muvwpdpu8Z8H8g1zolK02V4S8oWQ7Pl33Ok/wQSNSo8Denx7uMXENcnU/sVIOux7134xuq1MoAHBSSDPhmCWvaFwVIs9ts72W2WyuLPs4E7zsSRKwsDhMGPaQJQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759129069; c=relaxed/simple; bh=Igd/5P/kmryXEu8fVNJi9V/EzgicgeBdCpIPXZ772v4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HX8wHG4YHltGZP44pjYWKHHE6JiXG7GHRpfkGfU6eFoVW0g8o5YLw9ZIkbFn/QdDPwJe2BSnbq/cHxoCEBRMvQholFGvuTGzwss0pYDXsM6+Iw33bRRv4YQlerf/+QukWBtmP5HkzTfIqGYnw0qjm+Iqt+iT4pre4rSX7JztYJ0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=lGVROkYc; arc=none smtp.client-ip=209.85.216.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="lGVROkYc" Received: by mail-pj1-f54.google.com with SMTP id 98e67ed59e1d1-32eb76b9039so5001320a91.1 for ; Sun, 28 Sep 2025 23:57:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1759129066; x=1759733866; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QVazE73VbRqYor6BfpMCCi39sn3mMzE033vE9K5d72Q=; b=lGVROkYc9vkencWAIAzfQNbbhvH5/8yIRxot5Iqt74hkShn6yHMDRzhVBiFRrKPa48 pskOE55Af77y80AG/FvpixRoHBSbkSgsxTt6sU3JzA2xJcm6GS/ItecqhOG8ROCQ4XJt LgI5UVVLITeiZU9e3QvMalIiOVlGjcijcE7HJt8V8AhFNHiDatlo28QH8CfGxpK554IJ ndsgYvxgyGNfAirzFWtALUaqG3cGK8m/WZGU9cFpiZQxI01z0G4ZA+/OPzd8xfN+EZp7 ThCmxTdy+jrVfLfIZ8CUCjuzMSHBIvZt2F2DwcRn3C9R0pubeJjPCvpkhymgnaZrFbAT 1GEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759129066; x=1759733866; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QVazE73VbRqYor6BfpMCCi39sn3mMzE033vE9K5d72Q=; b=O4YQbvxHXC3GpxNV1MPZeMC+EF4+kG4Otdq6oiOvOF+IGmGumeG9VOVfDOX1tgWg2T A+fFMlWDPvO/Px87zgfspDo1Ml75qbIDWaVBvwRCHpFqCD/B8dCAZWM/FwuPTxY/BR74 M2pYywHAmuc8LPzAI2M8pFHvXUT0fIgPPnx+gB6q6Y6On/g0AI8kP7R85Yy6DUc2CdWs izwt8B1jPZChOhlbJk1TUxhobHTgkPSuzKFtHlWGtluKULVDRta7bdlvjz2bvbRCHCed 2d2OK1DFkw3Iv5nfYCn5fPlU+Qp0SSq7fpkxz5G4C9NigeKDXldmnT5lzGKqk27q6ZJ1 sO/g== X-Forwarded-Encrypted: i=1; AJvYcCUa4vK6StJ0r/H6VrNm/LZ+Uvri9+B878mPEK/2GdTija+mAF1CFr1cfLKfVsLYmnA6E7Tk3mFQoziyJLY=@vger.kernel.org X-Gm-Message-State: AOJu0Yzp2LTNB86uu+aV9BV53Ec5YwRSbV1YafKF70/GdYPrs06a33dp 40lCiacnxO+jBhWWL724ElA93b9WjT6h3D/W2nn9JqxMMa0wj4Wchf3A X-Gm-Gg: ASbGncu11jHdeh8bFEoHK/X0R+j9itLhcY+d8GpgaV+rouAzYxzmB2LRUP13gPvyOQE FsT5GXGZUnB69Y9A/QWt45SORgzZmNPZUrRxTKFTlSYxqL8pvsyh529LuZLF1l4RnX8iQvjnIkf 32HnkVjeKvRODN7oxmw0XzB8VR081Js/gawuf35MC6/NS7KllCn5in5oPymCI8pxa6QfF9ELSD8 J8gdLBnuq7NN6c0WYRZDXROTTPXae7rcwZ047vpmuDO0ysDMvmqkD2PTNBTz8WKWod+HdFJ2h6j vBYFeL9u1gRcgSNjf1qGlvGou2nCrZIxa6k6latkI2+hYkFEl+hHnem32HOQ6zsARW0oEWo/b5x Gxsi5mV5Eg4vSI1qf5C+DWE/1AJR/YEp5vSG2hYG09E7MkG4UjE6BFw0XFFucV/BLte13Eg7W X-Google-Smtp-Source: AGHT+IGMAKXh5zT8k9/tWe8tSRBWcHbfaMGE+I+07EnMncBsI8L41y6qMHoLtgQceJ0xDK97NgPK1Q== X-Received: by 2002:a17:90a:e7cf:b0:32e:a5ae:d00 with SMTP id 98e67ed59e1d1-3342a233d5emr16224814a91.13.1759129065866; Sun, 28 Sep 2025 23:57:45 -0700 (PDT) Received: from localhost.localdomain ([120.229.16.251]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b57c53cac77sm10549595a12.17.2025.09.28.23.57.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Sep 2025 23:57:45 -0700 (PDT) From: Liangbin Lian To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, quentin.schulz@cherry.de, kever.yang@rock-chips.com, naoki@radxa.com, honyuenkwun@gmail.com, inindev@gmail.com, ivan8215145640@gmail.com, neil.armstrong@linaro.org, mani@kernel.org, dsimic@manjaro.org, pbrobinson@gmail.com, alchark@gmail.com, didi.debian@cknow.org, jjm2473@gmail.com, jbx6244@gmail.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/3] arm64: dts: rockchip: add LinkEase EasePi R1 Date: Mon, 29 Sep 2025 14:57:14 +0800 Message-ID: <20250929065714.27741-4-jjm2473@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250929065714.27741-1-jjm2473@gmail.com> References: <20250929065714.27741-1-jjm2473@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" LinkEase EasePi R1 [1] is a high-performance mini router. Specification: - Rockchip RK3568 - 2GB/4GB LPDDR4 RAM - 16GB on-board eMMC - 1x M.2 key for 2280 NVMe (PCIe 3.0) - 1x USB 3.0 Type-A - 1x USB 2.0 Type-C (for USB flashing) - 2x 1000 Base-T (native, RTL8211F) - 2x 2500 Base-T (PCIe, RTL8125B) - 1x HDMI 2.0 Output - 12v DC Jack - 1x Power key connected to PMIC - 2x LEDs (one static power supplied, one GPIO controlled) [1] https://doc.linkease.com/zh/guide/easepi-r1/hardware.html Signed-off-by: Liangbin Lian --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-easepi-r1.dts | 692 ++++++++++++++++++ 2 files changed, 693 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-easepi-r1.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 099520962ffb..7646ffd7f309 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -127,6 +127,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-nanopi-r3s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-bigtreetech-cb2-manta.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-bigtreetech-pi2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-bpi-r2-pro.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-easepi-r1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-fastrhino-r66s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-fastrhino-r68s.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-easepi-r1.dts b/arch/arm64= /boot/dts/rockchip/rk3568-easepi-r1.dts new file mode 100644 index 000000000000..2bc8675efa12 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-easepi-r1.dts @@ -0,0 +1,692 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "rk3568.dtsi" + +/ { + model =3D "LinkEase EasePi R1"; + compatible =3D "linkease,easepi-r1", "rockchip,rk3568"; + + aliases { + mmc0 =3D &sdmmc0; + mmc1 =3D &sdhci; + mmc2 =3D &sdmmc2; + + ethernet0 =3D &gmac0; + ethernet1 =3D &gmac1; + }; + + chosen: chosen { + stdout-path =3D "serial2:1500000n8"; + }; + + adc-keys { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 0>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + + button-recovery { + label =3D "Recovery"; + linux,code =3D ; + press-threshold-microvolt =3D <1750>; + }; + }; + + dc_12v: regulator-dc-12v { + compatible =3D "regulator-fixed"; + regulator-name =3D "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; + + vcc3v3_sys: regulator-vcc3v3-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&dc_12v>; + }; + + pcie30_avdd0v9: regulator-pcie30-avdd0v9 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pcie30_avdd0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + vin-supply =3D <&vcc3v3_sys>; + }; + + pcie30_avdd1v8: regulator-pcie30-avdd1v8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pcie30_avdd1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc3v3_sys>; + }; + + regulator-vdd0v95-25glan { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwr_25g_pin>; + enable-active-high; + gpio =3D <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; + regulator-name =3D "vdd0v95_25glan"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + regulator-boot-on; + regulator-always-on; + vin-supply =3D <&vcc3v3_sys>; + }; + + vcc3v3_nvme: regulator-vcc3v3-nvme { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_nvme"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpio =3D <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&dc_12v>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc3v3_nvme_en>; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + clocks =3D <&rk809 1>; + clock-names =3D "ext_clock"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_enable_h>; + post-power-on-delay-ms =3D <200>; + reset-gpios =3D <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; + }; + + hdmi-con { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint =3D <&hdmi_out_con>; + }; + }; + }; + + gpio-leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&status_led_pin>; + + status_led: led-status { + gpios =3D <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>; + color =3D ; + function =3D LED_FUNCTION_STATUS; + label =3D "green:status"; + linux,default-trigger =3D "heartbeat"; + }; + }; + +}; + +&gmac0 { + phy-mode =3D "rgmii"; + clock_in_out =3D "input"; + + assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>; + assigned-clock-rates =3D <0>, <125000000>; + phy-handle =3D <&rgmii_phy0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + + tx_delay =3D <0x3c>; + rx_delay =3D <0x2f>; + + status =3D "okay"; +}; + +&gmac1 { + phy-mode =3D "rgmii"; + clock_in_out =3D "input"; + + assigned-clocks =3D <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents =3D <&cru SCLK_GMAC1_RGMII_SPEED>; + assigned-clock-rates =3D <0>, <125000000>; + phy-handle =3D <&rgmii_phy1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + + tx_delay =3D <0x4f>; + rx_delay =3D <0x26>; + + status =3D "okay"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + pinctrl-0 =3D <ð_phy0_reset_pin>; + pinctrl-names =3D "default"; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + pinctrl-0 =3D <ð_phy1_reset_pin>; + pinctrl-names =3D "default"; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; + }; +}; + +&combphy0 { + status =3D "okay"; +}; + +&combphy1 { + status =3D "okay"; +}; + +&combphy2 { + status =3D "okay"; +}; + +&cpu0 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_cpu>; +}; + +&gpu { + mali-supply =3D <&vdd_gpu>; + status =3D "okay"; +}; + +&hdmi { + avdd-0v9-supply =3D <&vdda0v9_image>; + avdd-1v8-supply =3D <&vcca1v8_image>; + status =3D "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint =3D <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status =3D "okay"; +}; + +&i2c0 { + status =3D "okay"; + + vdd_cpu: regulator@1c { + compatible =3D "tcs,tcs4525"; + reg =3D <0x1c>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <1150000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible =3D "rockchip,rk809"; + reg =3D <0x20>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + #clock-cells =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int>; + system-power-controller; + vcc1-supply =3D <&vcc3v3_sys>; + vcc2-supply =3D <&vcc3v3_sys>; + vcc3-supply =3D <&vcc3v3_sys>; + vcc4-supply =3D <&vcc3v3_sys>; + vcc5-supply =3D <&vcc3v3_sys>; + vcc6-supply =3D <&vcc3v3_sys>; + vcc7-supply =3D <&vcc3v3_sys>; + vcc8-supply =3D <&vcc3v3_sys>; + vcc9-supply =3D <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name =3D "vdd_gpu"; + regulator-always-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name =3D "vdd_npu"; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name =3D "vdda0v9_image"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name =3D "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name =3D "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name =3D "vccio_acodec"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name =3D "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name =3D "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name =3D "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name =3D "vcca1v8_image"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name =3D "vcc3v3_sd"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + }; +}; + +&i2s0_8ch { + status =3D "okay"; +}; + +/* ETH3 */ +&pcie2x1 { + reset-gpios =3D <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + status =3D "okay"; +}; + +&pcie30phy { + data-lanes =3D <1 2>; + status =3D "okay"; +}; + +/* ETH2 */ +&pcie3x1 { + num-lanes =3D <1>; + reset-gpios =3D <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; + status =3D "okay"; +}; + +/* M.2 Key for 2280 NVMe */ +&pcie3x2 { + num-lanes =3D <1>; + reset-gpios =3D <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_nvme>; + status =3D "okay"; +}; + +&pinctrl { + gmac0 { + eth_phy0_reset_pin: eth-phy0-reset-pin { + rockchip,pins =3D <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + gmac1 { + eth_phy1_reset_pin: eth-phy1-reset-pin { + rockchip,pins =3D <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + gpio-leds { + status_led_pin: status-led-pin { + rockchip,pins =3D + <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic-int { + rockchip,pins =3D <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie-nic { + pwr_25g_pin: pwr-25g-pin { + rockchip,pins =3D <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + nvme { + vcc3v3_nvme_en: vcc3v3-nvme-en { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins =3D <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + +}; + +&pmu_io_domains { + pmuio1-supply =3D <&vcc3v3_pmu>; + pmuio2-supply =3D <&vcc3v3_pmu>; + vccio1-supply =3D <&vccio_acodec>; + vccio3-supply =3D <&vccio_sd>; + vccio4-supply =3D <&vcc_1v8>; + vccio5-supply =3D <&vcc_3v3>; + vccio6-supply =3D <&vcc_1v8>; + vccio7-supply =3D <&vcc_3v3>; + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcca_1v8>; + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + max-frequency =3D <200000000>; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status =3D "okay"; +}; + +/* Micro SD card slot is not mounted */ +&sdmmc0 { + max-frequency =3D <150000000>; + no-sdio; + no-mmc; + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + vmmc-supply =3D <&vcc3v3_sd>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "disabled"; +}; + +/* Wifi module is not mounted */ +&sdmmc2 { + max-frequency =3D <150000000>; + bus-width =3D <4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq =3D <&sdio_pwrseq>; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc3v3_sys>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "disabled"; +}; + +&tsadc { + rockchip,hw-tshut-mode =3D <1>; + rockchip,hw-tshut-polarity =3D <0>; + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +/* OTG Only USB2.0, Only device mode */ +&usb_host0_xhci { + phys =3D <&usb2phy0_otg>; + phy-names =3D "usb2-phy"; + extcon =3D <&usb2phy0>; + maximum-speed =3D "high-speed"; + dr_mode =3D "peripheral"; + status =3D "okay"; +}; + +&usb_host1_xhci { + status =3D "okay"; +}; + +&usb2phy0 { + status =3D "okay"; +}; + +&usb2phy0_host { + phy-supply =3D <&vcc5v0_sys>; + status =3D "okay"; +}; + +&usb2phy0_otg { + status =3D "okay"; +}; + +&vop { + assigned-clocks =3D <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents =3D <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi_in_vp0>; + }; +}; --=20 2.51.0