From nobody Wed Oct 1 23:35:06 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 169CF25CC62; Mon, 29 Sep 2025 07:48:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759132090; cv=pass; b=KXKVl5yjA/pOjgc4RWnErufEGiQDo9W99O3n5mQWND+ChanAMIcYcVgzEt/daU4ymNfWk0Amo9i5I48OdtqfW/kABnynQDMgmrb+1ZRoWOrEml5N+fhf+ldV6UfaAocGl+3eAbuAtSkAsQYQtd2ZIsCvagmt6JZzhcaSBS4aR3c= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759132090; c=relaxed/simple; bh=D0wLemQcKIcoJwNhKy3eQf38Xk5oOAdcWxBYWmVcP6Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tFHNdFI6xMyXBd95Fvww/jl+UgP0Y8K0JsFlPsD/mohICQ+n/pH9rA7Xbx1ZGqrEpcVdaDWK1HumqUpnY8kdMXUPH1hVP1dc6NOsIdG68Q5jYnQcCj3xxjyp+I28iVIAwCUg6vXB5A05CPlleLGushUtsK76SfSCFSmchmyg498= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=gn0qCYty; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="gn0qCYty" ARC-Seal: i=1; a=rsa-sha256; t=1759132069; cv=none; d=zohomail.com; s=zohoarc; b=FoRiGAIGT/7v/0dltpRht4Kuk9jX6tdrMbXgZ0LBA5Mme5Vqw8Eyy7W/2IgAykTvn7exkgG1lqoJaKiOySH7J2TawgTQSVg/KycFF6yNiUC9NBD+cAGu2qsUlcWK8JXRd5M3Al77cdlPpPA/D6NbOU7M/s5+Q8P3XmUmLfJkzbs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1759132069; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=mbudV7zMvsb7+FwxqOXJAvF7A++Xaqp/S1V/c8KvSeU=; b=d3Vh/vgKQm0q0OhbRtSDZDnqvkeH1mSjyzVZgTHab4FI16fNgFB9NFuwMcEwocMPZQNntZtw3k6nBaW53FJp5A9Aht45FJl063wDKtNWUOYHDN9ItpLKi/cZccXGiuMQbbnYb9BOstHGiN0uH6kcacEyaoCSZ/bjjpCg09/dlls= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1759132069; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=mbudV7zMvsb7+FwxqOXJAvF7A++Xaqp/S1V/c8KvSeU=; b=gn0qCYtyyNrucuj9Z4P+Aj7HyzDuHH6QvVUHqYaMNGPt2L75YpvZaXDjpdM3JiKo dL9M5hTTKGtDCkbcqd3cgDAYevcg4iv82qdSaXIPh88gAGWF2JTWwIYf1peQU7cIx/v LCpp7Ajn32AfTiyUyILHlr09Tnzi8LpF3rUmIdCs= Received: by mx.zohomail.com with SMTPS id 1759132067051470.75211841634405; Mon, 29 Sep 2025 00:47:47 -0700 (PDT) From: Nicolas Frattaroli Date: Mon, 29 Sep 2025 09:46:49 +0200 Subject: [PATCH v5 6/7] drm/panthor: Use existing OPP table if present Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250929-mt8196-gpufreq-v5-6-3056e5ecf765@collabora.com> References: <20250929-mt8196-gpufreq-v5-0-3056e5ecf765@collabora.com> In-Reply-To: <20250929-mt8196-gpufreq-v5-0-3056e5ecf765@collabora.com> To: AngeloGioacchino Del Regno , Boris Brezillon , Jassi Brar , Chia-I Wu , Chen-Yu Tsai , Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Kees Cook , "Gustavo A. R. Silva" , Ulf Hansson Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-hardening@vger.kernel.org, linux-pm@vger.kernel.org, Nicolas Frattaroli X-Mailer: b4 0.14.2 On SoCs where the GPU's power-domain is in charge of setting performance levels, the OPP table of the GPU node will have already been populated during said power-domain's attach_dev operation. To avoid initialising an OPP table twice, only set the OPP regulator and the OPPs from DT if there's no OPP table present. Signed-off-by: Nicolas Frattaroli --- drivers/gpu/drm/panthor/panthor_devfreq.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/panthor/panthor_devfreq.c b/drivers/gpu/drm/pa= nthor/panthor_devfreq.c index 8903f60c0a3f06313ac2008791c210ff32b6bd52..4ec46a67db7d4331ac31a249e41= ee19378cd411e 100644 --- a/drivers/gpu/drm/panthor/panthor_devfreq.c +++ b/drivers/gpu/drm/panthor/panthor_devfreq.c @@ -143,6 +143,7 @@ int panthor_devfreq_init(struct panthor_device *ptdev) struct panthor_devfreq *pdevfreq; struct dev_pm_opp *opp; unsigned long cur_freq; + struct opp_table *t; unsigned long freq =3D ULONG_MAX; int ret; =20 @@ -152,17 +153,22 @@ int panthor_devfreq_init(struct panthor_device *ptdev) =20 ptdev->devfreq =3D pdevfreq; =20 - ret =3D devm_pm_opp_set_regulators(dev, reg_names); - if (ret) { - if (ret !=3D -EPROBE_DEFER) - DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n"); + t =3D dev_pm_opp_get_opp_table(dev); + if (IS_ERR_OR_NULL(t)) { + ret =3D devm_pm_opp_set_regulators(dev, reg_names); + if (ret) { + if (ret !=3D -EPROBE_DEFER) + DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n"); =20 - return ret; - } + return ret; + } =20 - ret =3D devm_pm_opp_of_add_table(dev); - if (ret) - return ret; + ret =3D devm_pm_opp_of_add_table(dev); + if (ret) + return ret; + } else { + dev_pm_opp_put_opp_table(t); + } =20 spin_lock_init(&pdevfreq->lock); =20 --=20 2.51.0