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Fri, 26 Sep 2025 15:02:20 -0700 (PDT) Received: from localhost.localdomain ([37.163.230.203]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-40fc82f2965sm8410236f8f.55.2025.09.26.15.02.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Sep 2025 15:02:19 -0700 (PDT) From: Antoni Pokusinski To: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-iio@vger.kernel.org, linux@roeck-us.net, rodrigo.gobbi.7@gmail.com, naresh.solanki@9elements.com, michal.simek@amd.com, grantpeltier93@gmail.com, farouk.bouabid@cherry.de, marcelo.schmitt1@gmail.com, Antoni Pokusinski Subject: [PATCH v3 1/4] dt-bindings: iio: pressure: add binding for mpl3115 Date: Sat, 27 Sep 2025 00:01:47 +0200 Message-Id: <20250926220150.22560-2-apokusinski01@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250926220150.22560-1-apokusinski01@gmail.com> References: <20250926220150.22560-1-apokusinski01@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MPL3115 is an I2C pressure and temperature sensor. It features 2 interrupt lines which can be configured to indicate events such as data ready or pressure/temperature threshold reached. Reviewed-by: Rob Herring (Arm) Signed-off-by: Antoni Pokusinski --- .../bindings/iio/pressure/fsl,mpl3115.yaml | 71 +++++++++++++++++++ .../devicetree/bindings/trivial-devices.yaml | 2 - 2 files changed, 71 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/iio/pressure/fsl,mpl3= 115.yaml diff --git a/Documentation/devicetree/bindings/iio/pressure/fsl,mpl3115.yam= l b/Documentation/devicetree/bindings/iio/pressure/fsl,mpl3115.yaml new file mode 100644 index 000000000000..2933c2e10695 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/pressure/fsl,mpl3115.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/pressure/fsl,mpl3115.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MPL3115 precision pressure sensor with altimetry + +maintainers: + - Antoni Pokusinski + +description: | + MPL3115 is a pressure/altitude and temperature sensor with I2C interface. + It features two programmable interrupt lines which indicate events such = as + data ready or pressure/temperature threshold reached. + https://www.nxp.com/docs/en/data-sheet/MPL3115A2.pdf + +properties: + compatible: + const: fsl,mpl3115 + + reg: + maxItems: 1 + + vdd-supply: true + + vddio-supply: true + + interrupts: + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + maxItems: 2 + items: + enum: + - INT1 + - INT2 + + drive-open-drain: + type: boolean + description: + set if the specified interrupt pins should be configured as + open drain. If not set, defaults to push-pull. + +required: + - compatible + - reg + - vdd-supply + - vddio-supply + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + pressure@60 { + compatible =3D "fsl,mpl3115"; + reg =3D <0x60>; + vdd-supply =3D <&vdd>; + vddio-supply =3D <&vddio>; + interrupt-parent =3D <&gpio1>; + interrupts =3D <4 IRQ_TYPE_EDGE_FALLING>; + interrupt-names =3D "INT2"; + }; + }; diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Docum= entation/devicetree/bindings/trivial-devices.yaml index f3dd18681aa6..918d4a12d61c 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -113,8 +113,6 @@ properties: - fsl,mma7660 # MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer - fsl,mma8450 - # MPL3115: Absolute Digital Pressure Sensor - - fsl,mpl3115 # MPR121: Proximity Capacitive Touch Sensor Controller - fsl,mpr121 # Honeywell Humidicon HIH-6130 humidity/temperature sensor --=20 2.25.1 From nobody Wed Oct 1 22:33:18 2025 Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C474E2F90D5 for ; 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charset="utf-8" Include linux/cleanup.h and use the scoped_guard() to simplify the code. Signed-off-by: Antoni Pokusinski --- drivers/iio/pressure/mpl3115.c | 42 +++++++++++++++------------------- 1 file changed, 19 insertions(+), 23 deletions(-) diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c index 579da60ef441..80af672f65c6 100644 --- a/drivers/iio/pressure/mpl3115.c +++ b/drivers/iio/pressure/mpl3115.c @@ -10,14 +10,16 @@ * interrupts, user offset correction, raw mode */ =20 -#include +#include +#include #include +#include + #include #include #include #include #include -#include =20 #define MPL3115_STATUS 0x00 #define MPL3115_OUT_PRESS 0x01 /* MSB first, 20 bit */ @@ -163,32 +165,26 @@ static irqreturn_t mpl3115_trigger_handler(int irq, v= oid *p) u8 buffer[16] __aligned(8) =3D { }; int ret, pos =3D 0; =20 - mutex_lock(&data->lock); - ret =3D mpl3115_request(data); - if (ret < 0) { - mutex_unlock(&data->lock); - goto done; - } - - if (test_bit(0, indio_dev->active_scan_mask)) { - ret =3D i2c_smbus_read_i2c_block_data(data->client, - MPL3115_OUT_PRESS, 3, &buffer[pos]); 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Fri, 26 Sep 2025 15:02:27 -0700 (PDT) Received: from localhost.localdomain ([37.163.230.203]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-40fc82f2965sm8410236f8f.55.2025.09.26.15.02.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Sep 2025 15:02:26 -0700 (PDT) From: Antoni Pokusinski To: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-iio@vger.kernel.org, linux@roeck-us.net, rodrigo.gobbi.7@gmail.com, naresh.solanki@9elements.com, michal.simek@amd.com, grantpeltier93@gmail.com, farouk.bouabid@cherry.de, marcelo.schmitt1@gmail.com, Antoni Pokusinski Subject: [PATCH v3 3/4] iio: mpl3115: add support for DRDY interrupt Date: Sat, 27 Sep 2025 00:01:49 +0200 Message-Id: <20250926220150.22560-4-apokusinski01@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250926220150.22560-1-apokusinski01@gmail.com> References: <20250926220150.22560-1-apokusinski01@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MPL3115 sensor features a "data ready" interrupt which indicates the presence of new measurements. Signed-off-by: Antoni Pokusinski --- drivers/iio/pressure/mpl3115.c | 197 ++++++++++++++++++++++++++++++--- 1 file changed, 184 insertions(+), 13 deletions(-) diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c index 80af672f65c6..13c8b338a15e 100644 --- a/drivers/iio/pressure/mpl3115.c +++ b/drivers/iio/pressure/mpl3115.c @@ -7,49 +7,77 @@ * (7-bit I2C slave address 0x60) * * TODO: FIFO buffer, altimeter mode, oversampling, continuous mode, - * interrupts, user offset correction, raw mode + * user offset correction, raw mode */ =20 #include #include #include #include +#include =20 #include #include #include #include #include +#include =20 #define MPL3115_STATUS 0x00 #define MPL3115_OUT_PRESS 0x01 /* MSB first, 20 bit */ #define MPL3115_OUT_TEMP 0x04 /* MSB first, 12 bit */ #define MPL3115_WHO_AM_I 0x0c +#define MPL3115_INT_SOURCE 0x12 +#define MPL3115_PT_DATA_CFG 0x13 #define MPL3115_CTRL_REG1 0x26 +#define MPL3115_CTRL_REG3 0x28 +#define MPL3115_CTRL_REG4 0x29 +#define MPL3115_CTRL_REG5 0x2a =20 #define MPL3115_DEVICE_ID 0xc4 =20 #define MPL3115_STATUS_PRESS_RDY BIT(2) #define MPL3115_STATUS_TEMP_RDY BIT(1) =20 -#define MPL3115_CTRL_RESET BIT(2) /* software reset */ -#define MPL3115_CTRL_OST BIT(1) /* initiate measurement */ -#define MPL3115_CTRL_ACTIVE BIT(0) /* continuous measurement */ -#define MPL3115_CTRL_OS_258MS (BIT(5) | BIT(4)) /* 64x oversampling */ +#define MPL3115_INT_SRC_DRDY BIT(7) + +#define MPL3115_PT_DATA_EVENT_ALL GENMASK(2, 0) + +#define MPL3115_CTRL1_RESET BIT(2) /* software reset */ +#define MPL3115_CTRL1_OST BIT(1) /* initiate measurement */ +#define MPL3115_CTRL1_ACTIVE BIT(0) /* continuous measurement */ +#define MPL3115_CTRL1_OS_258MS GENMASK(5, 4) /* 64x oversampling */ + +#define MPL3115_CTRL3_IPOL1 BIT(5) +#define MPL3115_CTRL3_IPOL2 BIT(1) + +#define MPL3115_CTRL4_INT_EN_DRDY BIT(7) + +#define MPL3115_CTRL5_INT_CFG_DRDY BIT(7) + +#define MPL3115_INT2 BIT(2) /* flag that indicates INT2 in use */ =20 struct mpl3115_data { struct i2c_client *client; + struct iio_trigger *drdy_trig; struct mutex lock; u8 ctrl_reg1; }; =20 +enum mpl3115_irq_type { + INT2_ACTIVE_LOW =3D MPL3115_INT2 | IRQF_TRIGGER_FALLING, + INT2_ACTIVE_HIGH =3D MPL3115_INT2 | IRQF_TRIGGER_RISING, + INT1_ACTIVE_LOW =3D (!MPL3115_INT2) | IRQF_TRIGGER_FALLING, + INT1_ACTIVE_HIGH =3D (!MPL3115_INT2) | IRQF_TRIGGER_RISING, +}; + static int mpl3115_request(struct mpl3115_data *data) { int ret, tries =3D 15; =20 /* trigger measurement */ ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1, - data->ctrl_reg1 | MPL3115_CTRL_OST); + data->ctrl_reg1 | MPL3115_CTRL1_OST); if (ret < 0) return ret; =20 @@ -58,7 +86,7 @@ static int mpl3115_request(struct mpl3115_data *data) if (ret < 0) return ret; /* wait for data ready, i.e. OST cleared */ - if (!(ret & MPL3115_CTRL_OST)) + if (!(ret & MPL3115_CTRL1_OST)) break; msleep(20); } @@ -166,9 +194,11 @@ static irqreturn_t mpl3115_trigger_handler(int irq, vo= id *p) int ret, pos =3D 0; =20 scoped_guard(mutex, &data->lock) { - ret =3D mpl3115_request(data); - if (ret < 0) - goto done; + if (!(data->ctrl_reg1 & MPL3115_CTRL1_ACTIVE)) { + ret =3D mpl3115_request(data); + if (ret < 0) + goto done; + } =20 if (test_bit(0, indio_dev->active_scan_mask)) { ret =3D i2c_smbus_read_i2c_block_data(data->client, @@ -224,10 +254,147 @@ static const struct iio_chan_spec mpl3115_channels[]= =3D { IIO_CHAN_SOFT_TIMESTAMP(2), }; =20 +static irqreturn_t mpl3115_interrupt_handler(int irq, void *private) +{ + struct iio_dev *indio_dev =3D private; + struct mpl3115_data *data =3D iio_priv(indio_dev); + int ret; + + ret =3D i2c_smbus_read_byte_data(data->client, MPL3115_INT_SOURCE); + if (ret < 0) + return IRQ_HANDLED; + + if (!(ret & MPL3115_INT_SRC_DRDY)) + return IRQ_NONE; + + iio_trigger_poll_nested(data->drdy_trig); + + return IRQ_HANDLED; +} + +static int mpl3115_set_trigger_state(struct iio_trigger *trig, bool state) +{ + struct iio_dev *indio_dev =3D iio_trigger_get_drvdata(trig); + struct mpl3115_data *data =3D iio_priv(indio_dev); + int ret; + u8 ctrl_reg1 =3D data->ctrl_reg1; + + if (state) + ctrl_reg1 |=3D MPL3115_CTRL1_ACTIVE; + else + ctrl_reg1 &=3D ~MPL3115_CTRL1_ACTIVE; + + guard(mutex)(&data->lock); + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1, + ctrl_reg1); + if (ret < 0) + return ret; + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG4, + state ? MPL3115_CTRL4_INT_EN_DRDY : 0); + if (ret < 0) + goto reg1_cleanup; + + data->ctrl_reg1 =3D ctrl_reg1; + + return 0; + +reg1_cleanup: + i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1, + data->ctrl_reg1); + return ret; +} + +static const struct iio_trigger_ops mpl3115_trigger_ops =3D { + .set_trigger_state =3D mpl3115_set_trigger_state, +}; + static const struct iio_info mpl3115_info =3D { .read_raw =3D &mpl3115_read_raw, }; =20 +static int mpl3115_trigger_probe(struct mpl3115_data *data, + struct iio_dev *indio_dev) +{ + struct fwnode_handle *fwnode =3D dev_fwnode(&data->client->dev); + int ret, irq, irq_type, irq_cfg_flags =3D 0; + + irq =3D fwnode_irq_get_byname(fwnode, "INT1"); + if (irq < 0) { + irq =3D fwnode_irq_get_byname(fwnode, "INT2"); + if (irq < 0) + return 0; + + irq_cfg_flags |=3D MPL3115_INT2; + } + + irq_type =3D irq_get_trigger_type(irq); + if (irq_type !=3D IRQF_TRIGGER_RISING && irq_type !=3D IRQF_TRIGGER_FALLI= NG) + return -EINVAL; + + irq_cfg_flags |=3D irq_type; + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_PT_DATA_CFG, + MPL3115_PT_DATA_EVENT_ALL); + if (ret < 0) + return ret; + + switch (irq_cfg_flags) { + case INT2_ACTIVE_HIGH: + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG3, + MPL3115_CTRL3_IPOL2); + if (ret) + return ret; + + break; + case INT2_ACTIVE_LOW: + break; + case INT1_ACTIVE_HIGH: + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG5, + MPL3115_CTRL5_INT_CFG_DRDY); + if (ret) + return ret; + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG3, + MPL3115_CTRL3_IPOL1); + if (ret) + return ret; + + break; + case INT1_ACTIVE_LOW: + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG5, + MPL3115_CTRL5_INT_CFG_DRDY); + if (ret) + return ret; + break; + default: + return -EINVAL; + } + + data->drdy_trig =3D devm_iio_trigger_alloc(&data->client->dev, + "%s-dev%d", + indio_dev->name, + iio_device_id(indio_dev)); + if (!data->drdy_trig) + return -ENOMEM; + + data->drdy_trig->ops =3D &mpl3115_trigger_ops; + iio_trigger_set_drvdata(data->drdy_trig, indio_dev); + ret =3D devm_iio_trigger_register(&data->client->dev, data->drdy_trig); + if (ret) + return ret; + + indio_dev->trig =3D iio_trigger_get(data->drdy_trig); + + return devm_request_threaded_irq(&data->client->dev, irq, + NULL, + mpl3115_interrupt_handler, + IRQF_ONESHOT, + "mpl3115_irq", + indio_dev); +} + static int mpl3115_probe(struct i2c_client *client) { const struct i2c_device_id *id =3D i2c_client_get_device_id(client); @@ -258,15 +425,19 @@ static int mpl3115_probe(struct i2c_client *client) =20 /* software reset, I2C transfer is aborted (fails) */ i2c_smbus_write_byte_data(client, MPL3115_CTRL_REG1, - MPL3115_CTRL_RESET); + MPL3115_CTRL1_RESET); msleep(50); =20 - data->ctrl_reg1 =3D MPL3115_CTRL_OS_258MS; + data->ctrl_reg1 =3D MPL3115_CTRL1_OS_258MS; ret =3D i2c_smbus_write_byte_data(client, MPL3115_CTRL_REG1, data->ctrl_reg1); if (ret < 0) return ret; =20 + ret =3D mpl3115_trigger_probe(data, indio_dev); + if (ret) + return ret; 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Fri, 26 Sep 2025 15:02:32 -0700 (PDT) Received: from localhost.localdomain ([37.163.230.203]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-40fc82f2965sm8410236f8f.55.2025.09.26.15.02.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Sep 2025 15:02:31 -0700 (PDT) From: Antoni Pokusinski To: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-iio@vger.kernel.org, linux@roeck-us.net, rodrigo.gobbi.7@gmail.com, naresh.solanki@9elements.com, michal.simek@amd.com, grantpeltier93@gmail.com, farouk.bouabid@cherry.de, marcelo.schmitt1@gmail.com, Antoni Pokusinski Subject: [PATCH v3 4/4] iio: mpl3115: add support for sampling frequency Date: Sat, 27 Sep 2025 00:01:50 +0200 Message-Id: <20250926220150.22560-5-apokusinski01@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250926220150.22560-1-apokusinski01@gmail.com> References: <20250926220150.22560-1-apokusinski01@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable When the device is in ACTIVE mode the temperature and pressure measurements are collected with a frequency determined by the ST[3:0] bits of CTRL_REG2 register. Reviewed-by: Nuno S=C3=A1 Signed-off-by: Antoni Pokusinski --- drivers/iio/pressure/mpl3115.c | 82 ++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c index 13c8b338a15e..04c126ff4d46 100644 --- a/drivers/iio/pressure/mpl3115.c +++ b/drivers/iio/pressure/mpl3115.c @@ -10,6 +10,7 @@ * user offset correction, raw mode */ =20 +#include #include #include #include @@ -30,6 +31,7 @@ #define MPL3115_INT_SOURCE 0x12 #define MPL3115_PT_DATA_CFG 0x13 #define MPL3115_CTRL_REG1 0x26 +#define MPL3115_CTRL_REG2 0x27 #define MPL3115_CTRL_REG3 0x28 #define MPL3115_CTRL_REG4 0x29 #define MPL3115_CTRL_REG5 0x2a @@ -48,6 +50,8 @@ #define MPL3115_CTRL1_ACTIVE BIT(0) /* continuous measurement */ #define MPL3115_CTRL1_OS_258MS GENMASK(5, 4) /* 64x oversampling */ =20 +#define MPL3115_CTRL2_ST GENMASK(3, 0) + #define MPL3115_CTRL3_IPOL1 BIT(5) #define MPL3115_CTRL3_IPOL2 BIT(1) =20 @@ -57,6 +61,25 @@ =20 #define MPL3115_INT2 BIT(2) /* flag that indicates INT2 in use */ =20 +static const unsigned int mpl3115_samp_freq_table[][2] =3D { + { 1, 0}, + { 0, 500000}, + { 0, 250000}, + { 0, 125000}, + { 0, 62500}, + { 0, 31250}, + { 0, 15625}, + { 0, 7812}, + { 0, 3906}, + { 0, 1953}, + { 0, 976}, + { 0, 488}, + { 0, 244}, + { 0, 122}, + { 0, 61}, + { 0, 30}, +}; + struct mpl3115_data { struct i2c_client *client; struct iio_trigger *drdy_trig; @@ -174,10 +197,61 @@ static int mpl3115_read_raw(struct iio_dev *indio_dev, default: return -EINVAL; } + case IIO_CHAN_INFO_SAMP_FREQ: + ret =3D i2c_smbus_read_byte_data(data->client, MPL3115_CTRL_REG2); + if (ret < 0) + return ret; + + ret =3D FIELD_GET(MPL3115_CTRL2_ST, ret); + + *val =3D mpl3115_samp_freq_table[ret][0]; + *val2 =3D mpl3115_samp_freq_table[ret][1]; + return IIO_VAL_INT_PLUS_MICRO; } return -EINVAL; } =20 +static int mpl3115_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + if (mask !=3D IIO_CHAN_INFO_SAMP_FREQ) + return -EINVAL; + + *type =3D IIO_VAL_INT_PLUS_MICRO; + *length =3D ARRAY_SIZE(mpl3115_samp_freq_table) * 2; + *vals =3D (int *)mpl3115_samp_freq_table; + return IIO_AVAIL_LIST; +} + +static int mpl3115_write_raw(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + int val, int val2, long mask) +{ + struct mpl3115_data *data =3D iio_priv(indio_dev); + int i, ret; + + if (mask !=3D IIO_CHAN_INFO_SAMP_FREQ) + return -EINVAL; + + for (i =3D 0; i < ARRAY_SIZE(mpl3115_samp_freq_table); i++) + if (val =3D=3D mpl3115_samp_freq_table[i][0] && + val2 =3D=3D mpl3115_samp_freq_table[i][1]) + break; + + if (i =3D=3D ARRAY_SIZE(mpl3115_samp_freq_table)) + return -EINVAL; + + if (!iio_device_claim_direct(indio_dev)) + return -EBUSY; + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG2, + FIELD_PREP(MPL3115_CTRL2_ST, i)); + iio_device_release_direct(indio_dev); + return ret; +} + static irqreturn_t mpl3115_trigger_handler(int irq, void *p) { struct iio_poll_func *pf =3D p; @@ -229,6 +303,9 @@ static const struct iio_chan_spec mpl3115_channels[] = =3D { .type =3D IIO_PRESSURE, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE), + .info_mask_shared_by_all =3D BIT(IIO_CHAN_INFO_SAMP_FREQ), + .info_mask_shared_by_all_available =3D + BIT(IIO_CHAN_INFO_SAMP_FREQ), .scan_index =3D 0, .scan_type =3D { .sign =3D 'u', @@ -242,6 +319,9 @@ static const struct iio_chan_spec mpl3115_channels[] = =3D { .type =3D IIO_TEMP, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE), + .info_mask_shared_by_all =3D BIT(IIO_CHAN_INFO_SAMP_FREQ), + .info_mask_shared_by_all_available =3D + BIT(IIO_CHAN_INFO_SAMP_FREQ), .scan_index =3D 1, .scan_type =3D { .sign =3D 's', @@ -312,6 +392,8 @@ static const struct iio_trigger_ops mpl3115_trigger_ops= =3D { =20 static const struct iio_info mpl3115_info =3D { .read_raw =3D &mpl3115_read_raw, + .read_avail =3D &mpl3115_read_avail, + .write_raw =3D &mpl3115_write_raw, }; =20 static int mpl3115_trigger_probe(struct mpl3115_data *data, --=20 2.25.1