From nobody Thu Oct 2 00:49:30 2025 Received: from mail-qt1-f173.google.com (mail-qt1-f173.google.com [209.85.160.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9CFBF2FB0A9 for ; Fri, 26 Sep 2025 14:19:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758896371; cv=none; b=jOMM8Aw4AirEkBhuNPNe1IHoA2grWVUCzqPGsdcWNlBh9wC/Q3XAaUmrXdbc93uD2k0Kx7y8Qwy998QKfXgrTcvq8F9vkQhMoWeONnl0ejHDndkjuot2p4zXiHkpMLEopNuz18lCdlFxcTEyupx7xcHGZrgko6xpV9rUgwQqxYo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758896371; c=relaxed/simple; bh=AFFdWPUAXAFNGiiOEJ3coICAhEAc2Pe4JDD1q1kvAsk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Z8sGnwrJPtDlm4mJyHuXKC5GxaUSQpF0wFht9l7qq+mQKBR5aZF/QczA1AGSiHmAEzSmWEIcIiBlw0DIqadeDb9bwWB98CkcCuvgcrkbb+En4Iz28r+ZSaRXEy0hsMnuGLPXCxj5uWnq/HnY2bhKg4RnNinFS/MqG8hPLAHz9kE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=RQEC6Lpl; arc=none smtp.client-ip=209.85.160.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="RQEC6Lpl" Received: by mail-qt1-f173.google.com with SMTP id d75a77b69052e-4dca66a31f7so16116351cf.3 for ; Fri, 26 Sep 2025 07:19:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1758896366; x=1759501166; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UkNfR44T1+aQMXki6JhTMzsXZD4Y5zeYdM+FX7jC1nQ=; b=RQEC6Lplq2Ua6dRSq4fQUzYnO/zK6IQfuNrn28qSLjrZCJH5R0LBYfNIgsWfAEqPz+ xjAxsWrmfDUb2HB17YdHFEwNap8AkpM4AgjPLO6o4u+I0ykTzfPkY0BCH0pQbTqnBqjY FdG5S8RopxZ5Womk/j6NdCc0E+Z9TS9MrUIVfFQ+U0VCHoFAm1/hxSRtRiOe6gEpspFa JeVZg8i82H6cbIOmzUZ11xsLgX51ICPk+CLrOaAXlDm3i4mdrEEOOFR8+Aw217YjqDTH sMgOplgNO5lZRx9KAvMCN4p8EiIA/jlQrrYHVuMK13cYA4PHC1kre+yfrRe9/3XpMj1P YrHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758896366; x=1759501166; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UkNfR44T1+aQMXki6JhTMzsXZD4Y5zeYdM+FX7jC1nQ=; b=xSUOKORu0nD7qiFq1jaCkYUg8FWbZ98rnUFqJ9RhUmcpdfUJBWoLejb8t3D5eIm/z7 ESHz+mna+k2ylSFgFqGyNg4wu+h2JMs7PjYzW8oz+GbKE7KvW1Evhl4CbKN8JzqJMjyl RMFhx+XqreQ1S5TLxRAYUKwK/BE35RBJooUoEWL616MXwBcilVUljcndAz/bHg3BpKhb YItaVxbnvqfREE/YSOmAPWe4kDrL84DlMxUYWpSYh2jXbt885Ou2ju2Wjlj48akXaF/f j08x/UNFD3RWFNaCszw8mQTwlVmfQ43qiLVPPCWVepXVIrOoyDKgmjPm8XHRgO8K0DID NIVQ== X-Gm-Message-State: AOJu0YzTESKe9Eyj9GTw0zHqScUcGNuHsh6prCoXOAXYMZLuG5le85ZT geMHg9NDHZtRSwmlK5SmggpWoLIPW6bPkycwDXYURJ3cNY4Q/9U/Axvo X-Gm-Gg: ASbGncsZH2zTnOmNvU2WATKp8FDOXlTvKrdmM8ErCZHCxwlOrO2VlaYeOmTYyJama+9 Y/29dhP2i1K4KqwJFUqQRmy3LXfzpoJvLnKBA33q1zCRo1LzFAEeOaDhlx8Mkr3oKflC6brML+z hwHuSwCbLJC0tlEZzqoOVe4258Wm6dwTvgDc0Va5h0FYPf2Yr35MfwAQS62ttE8TpXMJre947il i4+JRHwyC9vQOnxz2APZkrS/BDtgK1vR+QMjyQlUJjEJ/niTLbt/BNbQNaPWJiDZAfUqN9NpC76 hvYx3xV07gWfTcHJRvZSRn0CmpmMn/iWYlvB37vaFiVyj2l+fME5sORamg0BbdemzWttf2sSFqW kST3zI/kLkvLQFgy87HTh1A03nM0HvNXSDmokKjr9hSMqA+pfQ9OR19b3ZrOUbIBIncVr X-Google-Smtp-Source: AGHT+IGODqsrQGtDZCGx0icngB4w/TaZU1Mpxmyd+O5pnNZPVLJSOQqzJ+8c4HQwg7u/RJ/qyoQEbw== X-Received: by 2002:a05:622a:2ce:b0:4d8:cb2f:7fac with SMTP id d75a77b69052e-4da4934ac23mr102100951cf.35.1758896366349; Fri, 26 Sep 2025 07:19:26 -0700 (PDT) Received: from localhost (modemcable197.17-162-184.mc.videotron.ca. [184.162.17.197]) by smtp.gmail.com with ESMTPSA id af79cd13be357-85c341319besm286940985a.64.2025.09.26.07.19.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Sep 2025 07:19:25 -0700 (PDT) From: =?UTF-8?q?Jean-Fran=C3=A7ois=20Lessard?= To: Andy Shevchenko , Geert Uytterhoeven , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-leds@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v5 7/7] auxdisplay: TM16xx: Add support for SPI-based controllers Date: Fri, 26 Sep 2025 10:19:08 -0400 Message-ID: <20250926141913.25919-8-jefflessard3@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250926141913.25919-1-jefflessard3@gmail.com> References: <20250926141913.25919-1-jefflessard3@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add support for TM16xx-compatible auxiliary display controllers connected via the SPI bus. The implementation includes: - SPI driver registration and initialization - Probe/remove logic for SPI devices - Controller-specific handling and communication sequences - Integration with the TM16xx core driver for common functionality This allows platforms using TM16xx or compatible controllers over SPI to be managed by the TM16xx driver infrastructure. Signed-off-by: Jean-Fran=C3=A7ois Lessard --- MAINTAINERS | 1 + drivers/auxdisplay/Kconfig | 16 ++ drivers/auxdisplay/Makefile | 1 + drivers/auxdisplay/tm16xx_spi.c | 397 ++++++++++++++++++++++++++++++++ 4 files changed, 415 insertions(+) create mode 100644 drivers/auxdisplay/tm16xx_spi.c diff --git a/MAINTAINERS b/MAINTAINERS index 8a8a53efee52..5d5e5f01e8ed 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -25450,6 +25450,7 @@ F: drivers/auxdisplay/tm16xx.h F: drivers/auxdisplay/tm16xx_core.c F: drivers/auxdisplay/tm16xx_i2c.c F: drivers/auxdisplay/tm16xx_keypad.c +F: drivers/auxdisplay/tm16xx_spi.c =20 TMIO/SDHI MMC DRIVER M: Wolfram Sang diff --git a/drivers/auxdisplay/Kconfig b/drivers/auxdisplay/Kconfig index d48c2f18950e..61e5af8d0a3d 100644 --- a/drivers/auxdisplay/Kconfig +++ b/drivers/auxdisplay/Kconfig @@ -560,6 +560,22 @@ config TM16XX_I2C will be called tm16xx_i2c and you will also get tm16xx for the core module. =20 +config TM16XX_SPI + tristate "TM16XX-compatible SPI 7-segment LED controllers with keyscan" + depends on SPI + select TM16XX + help + This driver supports the following TM16XX compatible + SPI (3-wire) 7-segment led display chips: + - Titanmec: TM1618, TM1620, TM1628, TM1638 + - Fuda Hisi: FD620, FD628 + - i-Core: AiP1618, AiP1628 + - Princeton: PT6964 + + To compile this driver as a module, choose M here: the module + will be called tm16xx_spi and you will also get tm16xx for the + core module. + # # Character LCD with non-conforming interface section # diff --git a/drivers/auxdisplay/Makefile b/drivers/auxdisplay/Makefile index ba7b310f5667..2485a3a6769d 100644 --- a/drivers/auxdisplay/Makefile +++ b/drivers/auxdisplay/Makefile @@ -20,3 +20,4 @@ obj-$(CONFIG_TM16XX) +=3D tm16xx.o tm16xx-y +=3D tm16xx_core.o tm16xx-$(CONFIG_TM16XX_KEYPAD) +=3D tm16xx_keypad.o obj-$(CONFIG_TM16XX_I2C) +=3D tm16xx_i2c.o +obj-$(CONFIG_TM16XX_SPI) +=3D tm16xx_spi.o diff --git a/drivers/auxdisplay/tm16xx_spi.c b/drivers/auxdisplay/tm16xx_sp= i.c new file mode 100644 index 000000000000..b305301f918c --- /dev/null +++ b/drivers/auxdisplay/tm16xx_spi.c @@ -0,0 +1,397 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * TM16xx and compatible LED display/keypad controller driver + * Supports TM16xx, FD6xx, PT6964, HBS658, AIP16xx and related chips. + * + * Copyright (C) 2025 Jean-Fran=C3=A7ois Lessard + */ + +#include +#include +#include +#include +#include + +#include "tm16xx.h" + +#define TM16XX_SPI_BUFFER_SIZE 8 +#define TM16XX_SPI_TWAIT_US 2 + +static int tm16xx_spi_probe(struct spi_device *spi) +{ + const struct tm16xx_controller *controller; + struct tm16xx_display *display; + int ret; + + controller =3D spi_get_device_match_data(spi); + if (!controller) + return -EINVAL; + + display =3D devm_kzalloc(&spi->dev, sizeof(*display), GFP_KERNEL); + if (!display) + return -ENOMEM; + + /* Allocate DMA-safe buffer */ + display->spi_buffer =3D devm_kzalloc(&spi->dev, TM16XX_SPI_BUFFER_SIZE, G= FP_KERNEL); + if (!display->spi_buffer) + return -ENOMEM; + + display->dev =3D &spi->dev; + display->controller =3D controller; + + spi_set_drvdata(spi, display); + + ret =3D tm16xx_probe(display); + if (ret) + return ret; + + return 0; +} + +static void tm16xx_spi_remove(struct spi_device *spi) +{ + struct tm16xx_display *display =3D spi_get_drvdata(spi); + + tm16xx_remove(display); +} + +/** + * tm16xx_spi_read() - SPI read helper for controller + * @display: pointer to tm16xx_display + * @cmd: command to send + * @cmd_len: length of command + * @data: buffer for received data + * @data_len: length of data to read + * + * Return: 0 on success, negative error code on failure + */ +static int tm16xx_spi_read(struct tm16xx_display *display, u8 *cmd, + size_t cmd_len, u8 *data, size_t data_len) +{ + struct spi_device *spi =3D to_spi_device(display->dev); + struct spi_message msg; + int ret; + + /* If STB is high during transmission, command is invalid. + * Reading requires a minimum 2 microseconds wait (Twait) + * after the 8th CLK rising edge before reading on falling edge. + */ + struct spi_transfer xfers[2] =3D { + { + .tx_buf =3D cmd, + .len =3D cmd_len, + .cs_change =3D 0, /* NO CS toggle */ + .delay.value =3D TM16XX_SPI_TWAIT_US, + .delay.unit =3D SPI_DELAY_UNIT_USECS, + }, { + .rx_buf =3D data, + .len =3D data_len, + } + }; + + spi_message_init_with_transfers(&msg, xfers, ARRAY_SIZE(xfers)); + + ret =3D spi_sync(spi, &msg); + + return ret; +} + +/** + * tm16xx_spi_write() - SPI write helper for controller + * @display: pointer to tm16xx_display + * @data: data to write + * @len: number of bytes to write + * + * Return: 0 on success, negative error code on failure + */ +static int tm16xx_spi_write(struct tm16xx_display *display, u8 *data, size= _t len) +{ + struct spi_device *spi =3D to_spi_device(display->dev); + + return spi_write(spi, data, len); +} + +/* SPI controller-specific functions */ +static int tm1628_init(struct tm16xx_display *display) +{ + const enum led_brightness brightness =3D display->main_led.brightness; + const u8 num_hwgrid =3D display->num_hwgrid; + u8 *cmd =3D display->spi_buffer; + int ret; + + /* Set mode command based on grid count */ + cmd[0] =3D TM16XX_CMD_MODE; + if (num_hwgrid <=3D 4) + cmd[0] |=3D TM16XX_MODE_4GRIDS; + else if (num_hwgrid =3D=3D 5) + cmd[0] |=3D TM16XX_MODE_5GRIDS; + else if (num_hwgrid =3D=3D 6) + cmd[0] |=3D TM16XX_MODE_6GRIDS; + else + cmd[0] |=3D TM16XX_MODE_7GRIDS; + + ret =3D tm16xx_spi_write(display, cmd, 1); + if (ret) + return ret; + + /* Set data command */ + cmd[0] =3D TM16XX_CMD_WRITE | TM16XX_DATA_ADDR_AUTO; + ret =3D tm16xx_spi_write(display, cmd, 1); + if (ret) + return ret; + + /* Set control command with brightness */ + cmd[0] =3D TM16XX_CMD_CTRL | + TM16XX_CTRL_BRIGHTNESS(brightness, brightness - 1, TM16XX); + ret =3D tm16xx_spi_write(display, cmd, 1); + if (ret) + return ret; + + return 0; +} + +static int tm1618_data(struct tm16xx_display *display, u8 index, + unsigned int grid) +{ + u8 *cmd =3D display->spi_buffer; + + cmd[0] =3D TM16XX_CMD_ADDR + index * 2; + cmd[1] =3D FIELD_GET(TM1618_BYTE1_MASK, grid); + cmd[2] =3D FIELD_GET(TM1618_BYTE2_MASK, grid) << TM1618_BYTE2_SHIFT; + + return tm16xx_spi_write(display, cmd, 3); +} + +static int tm1628_data(struct tm16xx_display *display, u8 index, + unsigned int grid) +{ + u8 *cmd =3D display->spi_buffer; + + cmd[0] =3D TM16XX_CMD_ADDR + index * 2; + cmd[1] =3D FIELD_GET(TM1628_BYTE1_MASK, grid); + cmd[2] =3D FIELD_GET(TM1628_BYTE2_MASK, grid); + + return tm16xx_spi_write(display, cmd, 3); +} + +static int tm1628_keys(struct tm16xx_display *display) +{ + u8 *cmd =3D display->spi_buffer; + u8 *codes =3D display->spi_buffer; + unsigned int i; + int bit, byte; + bool value; + int ret; + + cmd[0] =3D TM16XX_CMD_READ; + ret =3D tm16xx_spi_read(display, cmd, 1, codes, TM1628_KEY_READ_LEN); + if (ret) + return ret; + + /* prevent false readings */ + for (i =3D 0; i < TM1628_KEY_READ_LEN; i++) { + if (codes[i] & ~TM1628_KEY_MASK) + return -EINVAL; + } + + tm16xx_for_each_key(display, row, col) { + byte =3D col >> 1; + bit =3D row + ((col & 1) * 3); + value =3D !!(codes[byte] & BIT(bit)); + + tm16xx_set_key(display, row, col, value); + } + + return 0; +} + +static int tm1638_keys(struct tm16xx_display *display) +{ + u8 *cmd =3D display->spi_buffer; + u8 *codes =3D display->spi_buffer; + unsigned int i; + int bit, byte; + bool value; + int ret; + + cmd[0] =3D TM16XX_CMD_READ; + ret =3D tm16xx_spi_read(display, cmd, 1, codes, TM1638_KEY_READ_LEN); + if (ret) + return ret; + + /* prevent false readings */ + for (i =3D 0; i < TM1638_KEY_READ_LEN; i++) { + if (codes[i] & ~TM1638_KEY_MASK) + return -EINVAL; + } + + tm16xx_for_each_key(display, row, col) { + byte =3D col >> 1; + bit =3D (2 - row) + ((col & 1) << 2); + value =3D !!(codes[byte] & BIT(bit)); + + tm16xx_set_key(display, row, col, value); + } + + return 0; +} + +static int tm1618_keys(struct tm16xx_display *display) +{ + u8 *cmd =3D display->spi_buffer; + u8 *codes =3D display->spi_buffer; + unsigned int i; + int ret; + + cmd[0] =3D TM16XX_CMD_READ; + ret =3D tm16xx_spi_read(display, cmd, 1, codes, TM1618_KEY_READ_LEN); + if (ret) + return ret; + + /* prevent false readings */ + for (i =3D 0; i < TM1618_KEY_READ_LEN; i++) { + if (codes[i] & ~TM1618_KEY_MASK) + return -EINVAL; + } + + tm16xx_set_key(display, 0, 0, !!(codes[0] & BIT(1))); + tm16xx_set_key(display, 0, 1, !!(codes[0] & BIT(4))); + tm16xx_set_key(display, 0, 2, !!(codes[1] & BIT(1))); + tm16xx_set_key(display, 0, 3, !!(codes[1] & BIT(4))); + tm16xx_set_key(display, 0, 4, !!(codes[2] & BIT(1))); + + return 0; +} + +static int fd620_data(struct tm16xx_display *display, u8 index, + unsigned int grid) +{ + u8 *cmd =3D display->spi_buffer; + + cmd[0] =3D TM16XX_CMD_ADDR + index * 2; + cmd[1] =3D FIELD_GET(FD620_BYTE1_MASK, grid); + cmd[2] =3D FIELD_GET(FD620_BYTE2_MASK, grid) << FD620_BYTE2_SHIFT; + + return tm16xx_spi_write(display, cmd, 3); +} + +static int fd620_keys(struct tm16xx_display *display) +{ + u8 *cmd =3D display->spi_buffer; + u8 *codes =3D display->spi_buffer; + unsigned int i; + int ret; + + cmd[0] =3D TM16XX_CMD_READ; + ret =3D tm16xx_spi_read(display, cmd, 1, codes, FD620_KEY_READ_LEN); + if (ret) + return ret; + + /* prevent false readings */ + for (i =3D 0; i < FD620_KEY_READ_LEN; i++) { + if (codes[i] & ~FD620_KEY_MASK) + return -EINVAL; + } + + tm16xx_set_key(display, 0, 0, codes[0] & BIT(0)); + tm16xx_set_key(display, 0, 1, codes[0] & BIT(3)); + tm16xx_set_key(display, 0, 2, codes[1] & BIT(0)); + tm16xx_set_key(display, 0, 3, codes[1] & BIT(3)); + tm16xx_set_key(display, 0, 4, codes[2] & BIT(0)); + tm16xx_set_key(display, 0, 5, codes[2] & BIT(3)); + tm16xx_set_key(display, 0, 6, codes[3] & BIT(0)); + + return 0; +} + +/* SPI controller definitions */ +static const struct tm16xx_controller tm1618_controller =3D { + .max_grids =3D 7, + .max_segments =3D 8, + .max_brightness =3D 8, + .max_key_rows =3D 1, + .max_key_cols =3D 5, + .init =3D tm1628_init, + .data =3D tm1618_data, + .keys =3D tm1618_keys, +}; + +static const struct tm16xx_controller tm1620_controller =3D { + .max_grids =3D 6, + .max_segments =3D 10, + .max_brightness =3D 8, + .max_key_rows =3D 0, + .max_key_cols =3D 0, + .init =3D tm1628_init, + .data =3D tm1628_data, +}; + +static const struct tm16xx_controller tm1628_controller =3D { + .max_grids =3D 7, + .max_segments =3D 14, /* seg 11 unused */ + .max_brightness =3D 8, + .max_key_rows =3D 2, + .max_key_cols =3D 10, + .init =3D tm1628_init, + .data =3D tm1628_data, + .keys =3D tm1628_keys, +}; + +static const struct tm16xx_controller tm1638_controller =3D { + .max_grids =3D 8, + .max_segments =3D 10, + .max_brightness =3D 8, + .max_key_rows =3D 3, + .max_key_cols =3D 8, + .init =3D tm1628_init, + .data =3D tm1628_data, + .keys =3D tm1638_keys, +}; + +static const struct tm16xx_controller fd620_controller =3D { + .max_grids =3D 5, + .max_segments =3D 8, + .max_brightness =3D 8, + .max_key_rows =3D 1, + .max_key_cols =3D 7, + .init =3D tm1628_init, + .data =3D fd620_data, + .keys =3D fd620_keys, +}; + +static const struct of_device_id tm16xx_spi_of_match[] =3D { + { .compatible =3D "titanmec,tm1618", .data =3D &tm1618_controller }, + { .compatible =3D "titanmec,tm1620", .data =3D &tm1620_controller }, + { .compatible =3D "titanmec,tm1628", .data =3D &tm1628_controller }, + { .compatible =3D "titanmec,tm1638", .data =3D &tm1638_controller }, + { .compatible =3D "fdhisi,fd620", .data =3D &fd620_controller }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, tm16xx_spi_of_match); + +static const struct spi_device_id tm16xx_spi_id[] =3D { + { "tm1618", (kernel_ulong_t)&tm1618_controller }, + { "tm1620", (kernel_ulong_t)&tm1620_controller }, + { "tm1628", (kernel_ulong_t)&tm1628_controller }, + { "tm1638", (kernel_ulong_t)&tm1638_controller }, + { "fd620", (kernel_ulong_t)&fd620_controller }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(spi, tm16xx_spi_id); + +static struct spi_driver tm16xx_spi_driver =3D { + .driver =3D { + .name =3D "tm16xx-spi", + .of_match_table =3D tm16xx_spi_of_match, + }, + .probe =3D tm16xx_spi_probe, + .remove =3D tm16xx_spi_remove, + .shutdown =3D tm16xx_spi_remove, + .id_table =3D tm16xx_spi_id, +}; +module_spi_driver(tm16xx_spi_driver); + +MODULE_AUTHOR("Jean-Fran=C3=A7ois Lessard"); +MODULE_DESCRIPTION("TM16xx-spi LED Display Controllers"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("TM16XX"); --=20 2.43.0