From nobody Thu Oct 2 02:13:22 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF62427B331; Fri, 26 Sep 2025 03:35:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758857720; cv=none; b=UceqdW+YYjzU+j9KkNaEkkDJTYYCYUjDxFM0T0h4S4+vll2A74pMoMUFlCB5P0hEV43OOp3D/NEC/FB1fvscXRSJ+U0JnNzUAUkt1hoWbTVp9FuDXRZks1Mjc3DgftWmyfG/+mMjxZmFX9VfdCsnALFZe+MGE3sz6UYre7iXnxs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758857720; c=relaxed/simple; bh=+uznglJhVLAkGBIwRR16VJzAmGsqt4JlgKBPGDbBxF4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=tn8+0pFrThw3ba2QLFljgXJbmFVKkgf3oIZ01/dxodRkS1qc/UO3HWLBYXs1EmqFtZdBZ3TNdPTjsDHnMhcFeojEhSad2cPZnTU1vRHHX0qay6UsiES7vsBgWpNiod5KWDpRr71lZbHPFzvNTON4PHrLMCsstCsYqJ+yaysYO8M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Knxes3Ld; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Knxes3Ld" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1758857719; x=1790393719; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+uznglJhVLAkGBIwRR16VJzAmGsqt4JlgKBPGDbBxF4=; b=Knxes3LdH97otFRCJFgIWrrcgEpyklNtlx1qOi9XKFrhC1EkSSEPNXpq 8rj+C/T3gWinmwq0FMxd9nkV9FhQwshTnw2bh78s8GMb97CP/ztdwe1Qw gsUOgEfB0SVhEv6fEMeOSkClBLf2Ssfwr+Loh2w2CF7VBvvkhTHXBHn+0 8QiLvVExKD8V44byiyentnEtl7t/aaGocsqQa9DK+csDKMMvUz3kl2s0O TwVgl5asnTY5iYGNm3Y89UJ6H5JdjevwHtuA5O4ZIKWlg1Js4YJdDwZOJ jhXu9yOWVlTfstxKpfCVGMjyDGEQ9uVz2l6rFaWpkLfAKiaohRut1a+eD g==; X-CSE-ConnectionGUID: D4jV1qaZSdmZsxbySebotg== X-CSE-MsgGUID: Eew0nq+hTfCrWkpDXsOBhg== X-IronPort-AV: E=McAfee;i="6800,10657,11564"; a="63819585" X-IronPort-AV: E=Sophos;i="6.18,294,1751266800"; d="scan'208";a="63819585" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Sep 2025 20:35:06 -0700 X-CSE-ConnectionGUID: igqGqvaHSDWQ8xow2+RIQA== X-CSE-MsgGUID: uN+xYXNsTeCmj2a2HrhHZw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,294,1751266800"; d="scan'208";a="214636595" Received: from jf5300-b11a338t.jf.intel.com ([10.242.51.115]) by orviesa001.jf.intel.com with ESMTP; 25 Sep 2025 20:35:05 -0700 From: Kanchana P Sridhar To: linux-kernel@vger.kernel.org, linux-mm@kvack.org, hannes@cmpxchg.org, yosry.ahmed@linux.dev, nphamcs@gmail.com, chengming.zhou@linux.dev, usamaarif642@gmail.com, ryan.roberts@arm.com, 21cnbao@gmail.com, ying.huang@linux.alibaba.com, akpm@linux-foundation.org, senozhatsky@chromium.org, sj@kernel.org, kasong@tencent.com, linux-crypto@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, clabbe@baylibre.com, ardb@kernel.org, ebiggers@google.com, surenb@google.com, kristen.c.accardi@intel.com, vinicius.gomes@intel.com Cc: wajdi.k.feghali@intel.com, vinodh.gopal@intel.com, kanchana.p.sridhar@intel.com Subject: [PATCH v12 15/23] crypto: iaa - Enable async mode and make it the default. Date: Thu, 25 Sep 2025 20:34:54 -0700 Message-Id: <20250926033502.7486-16-kanchana.p.sridhar@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20250926033502.7486-1-kanchana.p.sridhar@intel.com> References: <20250926033502.7486-1-kanchana.p.sridhar@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch enables the 'async' sync_mode in the driver. Further, it sets the default sync_mode to 'async', which makes it easier for IAA hardware acceleration in the iaa_crypto driver to be loaded by default in the most efficient/recommended 'async' mode for parallel compressions/decompressions, namely, asynchronous submission of descriptors, followed by polling for job completions. Earlier, the "sync" mode used to be the default. The iaa_crypto driver documentation has been updated with these changes. This way, anyone who wants to use IAA for zswap/zram can do so after building the kernel, and without having to go through these steps to use async mode: 1) disable all the IAA device/wq bindings that happen at boot time 2) rmmod iaa_crypto 3) modprobe iaa_crypto 4) echo async > /sys/bus/dsa/drivers/crypto/sync_mode 5) re-run initialization of the IAA devices and wqs Signed-off-by: Kanchana P Sridhar --- Documentation/driver-api/crypto/iaa/iaa-crypto.rst | 11 ++--------- drivers/crypto/intel/iaa/iaa_crypto_main.c | 4 ++-- 2 files changed, 4 insertions(+), 11 deletions(-) diff --git a/Documentation/driver-api/crypto/iaa/iaa-crypto.rst b/Documenta= tion/driver-api/crypto/iaa/iaa-crypto.rst index 0ff4ec603b43..d5e610ef4612 100644 --- a/Documentation/driver-api/crypto/iaa/iaa-crypto.rst +++ b/Documentation/driver-api/crypto/iaa/iaa-crypto.rst @@ -272,7 +272,7 @@ The available attributes are: echo async_irq > /sys/bus/dsa/drivers/crypto/sync_mode =20 Async mode without interrupts (caller must poll) can be enabled by - writing 'async' to it (please see Caveat):: + writing 'async' to it:: =20 echo async > /sys/bus/dsa/drivers/crypto/sync_mode =20 @@ -281,14 +281,7 @@ The available attributes are: =20 echo sync > /sys/bus/dsa/drivers/crypto/sync_mode =20 - The default mode is 'sync'. - - Caveat: since the only mechanism that iaa_crypto currently implements - for async polling without interrupts is via the 'sync' mode as - described earlier, writing 'async' to - '/sys/bus/dsa/drivers/crypto/sync_mode' will internally enable the - 'sync' mode. This is to ensure correct iaa_crypto behavior until true - async polling without interrupts is enabled in iaa_crypto. + The default mode is 'async'. =20 - g_comp_wqs_per_iaa =20 diff --git a/drivers/crypto/intel/iaa/iaa_crypto_main.c b/drivers/crypto/in= tel/iaa/iaa_crypto_main.c index 0a620f2dc58e..c4f40984e9bf 100644 --- a/drivers/crypto/intel/iaa/iaa_crypto_main.c +++ b/drivers/crypto/intel/iaa/iaa_crypto_main.c @@ -152,7 +152,7 @@ static bool iaa_verify_compress =3D true; */ =20 /* Use async mode */ -static bool async_mode; +static bool async_mode =3D true; /* Use interrupts */ static bool use_irq; =20 @@ -206,7 +206,7 @@ static int set_iaa_sync_mode(const char *name) async_mode =3D false; use_irq =3D false; } else if (sysfs_streq(name, "async")) { - async_mode =3D false; + async_mode =3D true; use_irq =3D false; } else if (sysfs_streq(name, "async_irq")) { async_mode =3D true; --=20 2.27.0