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Fri, 26 Sep 2025 10:13:34 -0700 (PDT) Received: from [127.0.1.1] ([46.53.240.27]) by smtp.googlemail.com with ESMTPSA id a640c23a62f3a-b353fa65be9sm397211166b.48.2025.09.26.10.13.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Sep 2025 10:13:34 -0700 (PDT) From: Dzmitry Sankouski Date: Fri, 26 Sep 2025 20:13:27 +0300 Subject: [PATCH v5 2/3] arch: arm64: dts: qcom: sdm845-starqltechn: fix max77705 interrupts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250926-starqltechn-correct_max77705_nodes-v5-2-c6ab35165534@gmail.com> References: <20250926-starqltechn-correct_max77705_nodes-v5-0-c6ab35165534@gmail.com> In-Reply-To: <20250926-starqltechn-correct_max77705_nodes-v5-0-c6ab35165534@gmail.com> To: Chanwoo Choi , Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, Konrad Dybcio , Dzmitry Sankouski , Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758906810; l=2258; i=dsankouski@gmail.com; s=20240619; h=from:subject:message-id; bh=91ey4D4RscHiUop7uDzAjLKjyDW5NbuR+aCcWKWDgO4=; b=2U/nuqSlPTKe8L1FhhwHJLSB8akD3pymeUuvoK/el6+mN0UWF2b5cjlMxT654CudZIg0YRAMQ cY/qtM60JRWABqJk/gokkOi+ZoXlrBZeHkBKtppWOdskxb5LDPZDnP7 X-Developer-Key: i=dsankouski@gmail.com; a=ed25519; pk=YJcXFcN1EWrzBYuiE2yi5Mn6WLn6L1H71J+f7X8fMag= Since max77705 has a register, which indicates interrupt source, it acts as an interrupt controller. Direct MAX77705's subdevices to use the IC's internal interrupt controller, instead of listening to every interrupt fired by the chip towards the host device. Fixes: 7a88a931d095 ("arm64: dts: qcom: sdm845-starqltechn: add max77705 PM= IC") Reviewed-by: Dmitry Baryshkov Signed-off-by: Dzmitry Sankouski --- Changes for v5: - group interrupt properties together, including #interrupt-cells Changes for v2: - fix commit message to be more clear Changes for v2: - fix commit msg header prefix to 'arm64: dts: qcom: sdm845-starqltechn:' - remove binding header for interrupt numbers - make interrupt-cells 1, because irq trigger type is not used --- arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts b/arch= /arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts index 45c7aa0f602d..215e1491f3e9 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts @@ -599,11 +599,13 @@ &uart9 { &i2c14 { status =3D "okay"; =20 - pmic@66 { + max77705: pmic@66 { compatible =3D "maxim,max77705"; reg =3D <0x66>; + #interrupt-cells =3D <1>; interrupt-parent =3D <&pm8998_gpios>; interrupts =3D <11 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; pinctrl-0 =3D <&pmic_int_default>; pinctrl-names =3D "default"; =20 @@ -644,8 +646,8 @@ max77705_charger: charger@69 { reg =3D <0x69>; compatible =3D "maxim,max77705-charger"; monitored-battery =3D <&battery>; - interrupt-parent =3D <&pm8998_gpios>; - interrupts =3D <11 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent =3D <&max77705>; + interrupts =3D <0>; }; =20 fuel-gauge@36 { @@ -653,8 +655,8 @@ fuel-gauge@36 { compatible =3D "maxim,max77705-battery"; power-supplies =3D <&max77705_charger>; maxim,rsns-microohm =3D <5000>; - interrupt-parent =3D <&pm8998_gpios>; - interrupts =3D <11 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent =3D <&max77705>; + interrupts =3D <2>; }; }; =20 --=20 2.39.5