From nobody Thu Oct 2 00:57:52 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1232E29ACDB for ; Fri, 26 Sep 2025 07:27:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758871639; cv=none; b=DYQdFxlhkHEByWjb10m3LeGrEcpttwiJUP5ADxlPugMn3GBKD3fC0fUXzox8R8rfA5YNIAMsDykuW4JNvYkqt46Lhlbwk/EzxtezrENUYin9/B4KIY5W9jt+WM356zpHoEoLPlBKmbBSZeOx00VbcRlulAFtbn+FmscLXqWBm2M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758871639; c=relaxed/simple; bh=LgO4dxC3/fyEINo3QtKn8terWYpqw7iknLpLIm5TGwU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VQzNIMp+PhQA107Wu4/ekXt2KMSaAgFUaRACCbc9Bar0weWS9GLwh3Cu80kZw5Ayx0+eYd6N43FP7c7ZrAvEao8XI2IGsV6VV9dkxnQKVDHoHhlah8yRSzNEYFm+8I5p6t9mLck3sP0oTKIDSQXePa7XjRov0Wv0pUEV2qq/2Cs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=U/j75yrq; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="U/j75yrq" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 58Q6latI015771 for ; Fri, 26 Sep 2025 07:27:17 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= y92IX8yih7rAKX9K1Ho2mfy8GLr4Y08/lKKaRrWHxvM=; b=U/j75yrq8xw527Rh 6uLgE67tPtTnTC9LkgN6CpjGcaI1mX2NmZZERRVeLuNdcScC9Oq+wbr1UbJa1kP5 YZ2FZO8M0KTfnUltutDOds19FYZnJS8iXHRUyTyaqtnnurAFbXNXycZzkfuM455s KMubR5WO2FJIVWYJdiFreNMdcfPQo6owi7qlr02l1iEBV3vJ34hlYg+1iDJG3lzU sf4yjweV6S72NDgdIZYZ0sLaIDqyf0IgBL7LptQ0wIPZJBO8EZJZI/JM2o9Ju97Z O12n+98bt4prqzDbZY9PJqAoYohIRfdFiO9XTkVR+fZJlBUsKdZhBmsUVCv7KIEB X+Dpgw== Received: from mail-pl1-f199.google.com (mail-pl1-f199.google.com [209.85.214.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 49db0t9wtf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Fri, 26 Sep 2025 07:27:16 +0000 (GMT) Received: by mail-pl1-f199.google.com with SMTP id d9443c01a7336-244582e9d17so5965915ad.3 for ; Fri, 26 Sep 2025 00:27:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758871635; x=1759476435; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=y92IX8yih7rAKX9K1Ho2mfy8GLr4Y08/lKKaRrWHxvM=; b=uauk4IpR1RpE8H9Pmx8RFzb8fG7hdurZNcWQoTCBYrAQUBePHQC7Aj8OIAMhuWsw5x fmgJs955Wrxx7C3Hz9Ldgla7LJIAFp2qWCHsGSNBghql++QKKbDKqb1KLTbw6Ubfgvoo 8YIiwtJuorQPQUOAA0neJiSn6kBgsRoBoXD8damwX/cml+KQYWBPdM/NHzxjbkioJfBg 7doJSrZDve0VK4fVB+hyCf6Ww6KzN8Glx2QWXTGlJivUYrjfpJ8PfrB0J3aGp/1+HElJ 8I7c4/GIc/lCix8j7yZRrLSK3kzFM0i4nVG/q0Ujkek+eCmX6+PHffxQHpNc3e0udoKv OwYQ== X-Forwarded-Encrypted: i=1; AJvYcCU0dct61kxdP7HxSGnOGnSOfpfcXscfXEb6yWBu8U+Fs+/RWyteLFi/eC9N2f7ORyOL9kn5N+TXhmbZ3O0=@vger.kernel.org X-Gm-Message-State: AOJu0Yz65uRmMHYFJD8+7DsxjAaZs9TjclsjoF+ESG2fVjQGhLCCc8Hr lEWzW1LHnjAR14QUIqE4obaB88xVUjSaxb3kPhl+8ZBFp9bny/sSf+TPrbWkiHMyoij7MrJZf+S iouLyTQag5Em+liL6Ez/m0ogVd+bw6+0JfN8pCWCkRkYf4HwIPxl6aLhdfUG2oChNUh4= X-Gm-Gg: ASbGncsvAESDXlUA1o04HqCAvxgDGlwptT3v5PiwXymb80tlehb0+qrddkPvBT/PKPe umkV3Mxd6NC7R+Yh4GPbnm/VAJtad5r7LHcakB5YpX1wwCJRZ9Nk56slUwLmi2CsD6M7AbAw7uA 83/v06rO/swf0HNnGzdZBGxsgQRWwgtsQ1YYr96Y2d1xLGWNHAzCZ9zngUqiv/G+q/DD8V6slAY wJdfP11DAP2cIzbaQSi/e/FR28gYdV7t3QRazIqeusW37ycO6w0oG3k9wukV5mrFFum7vz3ggVy sT5bh1NDOG8hG7xr91epyycPCTXvv7Y0jBJ8AjckyC/dsHhmJ6IoJBfE8YIgNZLz0b8bhZgDGmt 9R2fzAg3pMJRDVHlkOMhvOGO0un/tQhmZoViqQdgj+VXGNMiNrBdoeKxb X-Received: by 2002:a17:903:11c3:b0:267:af07:652f with SMTP id d9443c01a7336-27ed4a5cba8mr40527245ad.10.1758871635518; Fri, 26 Sep 2025 00:27:15 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGBOqk9gM27+PjI5fj5URhpDKJkSCSxuwgB+n8CrmysFzuKsfvTUq3YXiak3Zv6mVFiHZ9u6A== X-Received: by 2002:a17:903:11c3:b0:267:af07:652f with SMTP id d9443c01a7336-27ed4a5cba8mr40526965ad.10.1758871634987; Fri, 26 Sep 2025 00:27:14 -0700 (PDT) Received: from sziotdisp01-gv.qualcomm.com.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-27ed671d8a2sm45117985ad.55.2025.09.26.00.27.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Sep 2025 00:27:14 -0700 (PDT) From: Xiangxu Yin Date: Fri, 26 Sep 2025 15:25:45 +0800 Subject: [PATCH v7 09/14] phy: qcom: qmp-usbc: Add DP PHY ops for USB/DP switchable Type-C PHYs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250926-add-displayport-support-for-qcs615-platform-v7-9-dc5edaac6c2b@oss.qualcomm.com> References: <20250926-add-displayport-support-for-qcs615-platform-v7-0-dc5edaac6c2b@oss.qualcomm.com> In-Reply-To: <20250926-add-displayport-support-for-qcs615-platform-v7-0-dc5edaac6c2b@oss.qualcomm.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, fange.zhang@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com, li.liu@oss.qualcomm.com, Dmitry Baryshkov , Bjorn Andersson , Konrad Dybcio , Xiangxu Yin X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758871564; l=6447; i=xiangxu.yin@oss.qualcomm.com; s=20241125; h=from:subject:message-id; bh=LgO4dxC3/fyEINo3QtKn8terWYpqw7iknLpLIm5TGwU=; b=NqfS4eoetvvBeroV7EnmiTlKJ9QgREt5xEyTW5g5H8bGKAzo2l5sV64I0Z9uGe26DqzsmyZWp e2cavSNtW1zCvvohlR/RTJzQrMjZwJOVRZ08J+raWoRueUdVAEqyMLo X-Developer-Key: i=xiangxu.yin@oss.qualcomm.com; a=ed25519; pk=F1TwipJzpywfbt3n/RPi4l/A4AVF+QC89XzCHgZYaOc= X-Proofpoint-ORIG-GUID: DzKEgVkFmERGPHqT5ip8lEQ2YMGl71WW X-Proofpoint-GUID: DzKEgVkFmERGPHqT5ip8lEQ2YMGl71WW X-Authority-Analysis: v=2.4 cv=Jvz8bc4C c=1 sm=1 tr=0 ts=68d64054 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=U7rhxC6dmq8FdBza6woA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTI1MDE3MSBTYWx0ZWRfX5tmKg5M2u2aE YA+rv+OPYUKMcQ7BS67Xk7SWnEBCK+++BjbLWunicHFGMzR4NlcxUpBNnugEqAQ2EfWymAVQ00q wtIjOzt5+8mDd3L5e6SGqKVkvW0AgMmbOP57C8FjkfLX+wEYEVZm2aK+ZNuw34K6bvbpqRI52JA MnJ3I8BsQSAXcg9UhwZlwlNa42paKD88HyDpYb/m0gOnWzD0sGSFuu2+1eoO5zUVVI5gmgwUIqN TcgU4lsOZ8DwACbl492/MaHRn4oYSKUalvJo6BzjZaGBqyXvx2wqM/CoG6ZzeDXsTCCpLmiEwFY R/zMMWKH1xe/UqoABOyeIenek1772u9b8BluwAK7Ti+KxmiWs5hWfH2v7IIWcjDEJYDcZDFHvFa A/e+uCE/Irgs5NOH9As7TNRcut6dOQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-26_02,2025-09-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 priorityscore=1501 adultscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2509250171 Define qmp_usbc_dp_phy_ops struct to support DP mode on USB/DP switchable PHYs. Reviewed-by: Dmitry Baryshkov Signed-off-by: Xiangxu Yin --- drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 194 +++++++++++++++++++++++++++= +++- 1 file changed, 193 insertions(+), 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c b/drivers/phy/qualcom= m/phy-qcom-qmp-usbc.c index fab6ccc4a5f12a4096e9a71f066f8ccec73adad2..3580c19fd62e02aa373cec42e9f= 53143f39214df 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c @@ -29,6 +29,8 @@ #include "phy-qcom-qmp.h" #include "phy-qcom-qmp-pcs-misc-v3.h" =20 +#include "phy-qcom-qmp-dp-phy.h" + #define PHY_INIT_COMPLETE_TIMEOUT 10000 #define SW_PORTSELECT_VAL BIT(0) #define SW_PORTSELECT_MUX BIT(1) @@ -711,6 +713,159 @@ static int qmp_usbc_usb_set_mode(struct phy *phy, enu= m phy_mode mode, int submod return 0; } =20 +static int qmp_usbc_dp_enable(struct phy *phy) +{ + struct qmp_usbc *qmp =3D phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg =3D qmp->cfg; + int ret; + + if (qmp->dp_init_count) { + dev_err(qmp->dev, "DP already inited\n"); + return 0; + } + + mutex_lock(&qmp->phy_mutex); + + ret =3D qmp_usbc_com_init(phy); + if (ret) + goto dp_init_unlock; + + qmp_usbc_set_phy_mode(qmp, true); + + cfg->dp_aux_init(qmp); + + qmp->dp_init_count++; + +dp_init_unlock: + mutex_unlock(&qmp->phy_mutex); + return ret; +} + +static int qmp_usbc_dp_disable(struct phy *phy) +{ + struct qmp_usbc *qmp =3D phy_get_drvdata(phy); + + mutex_lock(&qmp->phy_mutex); + + qmp_usbc_com_exit(phy); + + qmp->dp_init_count--; + + mutex_unlock(&qmp->phy_mutex); + + return 0; +} + +static int qmp_usbc_dp_configure(struct phy *phy, union phy_configure_opts= *opts) +{ + const struct phy_configure_opts_dp *dp_opts =3D &opts->dp; + struct qmp_usbc *qmp =3D phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg =3D qmp->cfg; + + mutex_lock(&qmp->phy_mutex); + + memcpy(&qmp->dp_opts, dp_opts, sizeof(*dp_opts)); + if (qmp->dp_opts.set_voltages) { + cfg->configure_dp_tx(qmp); + qmp->dp_opts.set_voltages =3D 0; + } + + mutex_unlock(&qmp->phy_mutex); + + return 0; +} + +static int qmp_usbc_dp_calibrate(struct phy *phy) +{ + struct qmp_usbc *qmp =3D phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg =3D qmp->cfg; + int ret =3D 0; + + mutex_lock(&qmp->phy_mutex); + + if (cfg->calibrate_dp_phy) { + ret =3D cfg->calibrate_dp_phy(qmp); + if (ret) { + dev_err(qmp->dev, "dp calibrate err(%d)\n", ret); + mutex_unlock(&qmp->phy_mutex); + return ret; + } + } + + mutex_unlock(&qmp->phy_mutex); + return 0; +} + +static int qmp_usbc_dp_serdes_init(struct qmp_usbc *qmp) +{ + const struct qmp_phy_cfg *cfg =3D qmp->cfg; + void __iomem *serdes =3D qmp->dp_serdes; + const struct phy_configure_opts_dp *dp_opts =3D &qmp->dp_opts; + + qmp_configure(qmp->dev, serdes, cfg->dp_serdes_tbl, + cfg->dp_serdes_tbl_num); + + switch (dp_opts->link_rate) { + case 1620: + qmp_configure(qmp->dev, serdes, cfg->serdes_tbl_rbr, + cfg->serdes_tbl_rbr_num); + break; + case 2700: + qmp_configure(qmp->dev, serdes, cfg->serdes_tbl_hbr, + cfg->serdes_tbl_hbr_num); + break; + case 5400: + qmp_configure(qmp->dev, serdes, cfg->serdes_tbl_hbr2, + cfg->serdes_tbl_hbr2_num); + break; + default: + /* Other link rates aren't supported */ + return -EINVAL; + } + + return 0; +} + +static int qmp_usbc_dp_power_on(struct phy *phy) +{ + struct qmp_usbc *qmp =3D phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg =3D qmp->cfg; + + void __iomem *tx =3D qmp->dp_tx; + void __iomem *tx2 =3D qmp->dp_tx2; + + mutex_lock(&qmp->phy_mutex); + + qmp_usbc_dp_serdes_init(qmp); + + qmp_configure_lane(qmp->dev, tx, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 1); + qmp_configure_lane(qmp->dev, tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2); + + /* Configure special DP tx tunings */ + cfg->configure_dp_tx(qmp); + + /* Configure link rate, swing, etc. */ + cfg->configure_dp_phy(qmp); + + mutex_unlock(&qmp->phy_mutex); + + return 0; +} + +static int qmp_usbc_dp_power_off(struct phy *phy) +{ + struct qmp_usbc *qmp =3D phy_get_drvdata(phy); + + mutex_lock(&qmp->phy_mutex); + + /* Assert DP PHY power down */ + writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); + + mutex_unlock(&qmp->phy_mutex); + + return 0; +} + static const struct phy_ops qmp_usbc_usb_phy_ops =3D { .init =3D qmp_usbc_usb_enable, .exit =3D qmp_usbc_usb_disable, @@ -718,6 +873,16 @@ static const struct phy_ops qmp_usbc_usb_phy_ops =3D { .owner =3D THIS_MODULE, }; =20 +static const struct phy_ops qmp_usbc_dp_phy_ops =3D { + .init =3D qmp_usbc_dp_enable, + .exit =3D qmp_usbc_dp_disable, + .configure =3D qmp_usbc_dp_configure, + .calibrate =3D qmp_usbc_dp_calibrate, + .power_on =3D qmp_usbc_dp_power_on, + .power_off =3D qmp_usbc_dp_power_off, + .owner =3D THIS_MODULE, +}; + static void qmp_usbc_enable_autonomous_mode(struct qmp_usbc *qmp) { const struct qmp_phy_cfg *cfg =3D qmp->cfg; @@ -1300,6 +1465,23 @@ static int qmp_usbc_parse_tcsr(struct qmp_usbc *qmp) return 0; } =20 +static struct phy *qmp_usbc_phy_xlate(struct device *dev, const struct of_= phandle_args *args) +{ + struct qmp_usbc *qmp =3D dev_get_drvdata(dev); + + if (args->args_count =3D=3D 0) + return qmp->usb_phy; + + switch (args->args[0]) { + case QMP_USB43DP_USB3_PHY: + return qmp->usb_phy; + case QMP_USB43DP_DP_PHY: + return qmp->dp_phy ?: ERR_PTR(-ENODEV); + } + + return ERR_PTR(-EINVAL); +} + static int qmp_usbc_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -1370,9 +1552,19 @@ static int qmp_usbc_probe(struct platform_device *pd= ev) =20 phy_set_drvdata(qmp->usb_phy, qmp); =20 + if (qmp->dp_serdes !=3D 0) { + qmp->dp_phy =3D devm_phy_create(dev, np, &qmp_usbc_dp_phy_ops); + if (IS_ERR(qmp->dp_phy)) { + ret =3D PTR_ERR(qmp->dp_phy); + dev_err(dev, "failed to create PHY: %d\n", ret); + goto err_node_put; + } + phy_set_drvdata(qmp->dp_phy, qmp); + } + of_node_put(np); =20 - phy_provider =3D devm_of_phy_provider_register(dev, of_phy_simple_xlate); + phy_provider =3D devm_of_phy_provider_register(dev, qmp_usbc_phy_xlate); =20 return PTR_ERR_OR_ZERO(phy_provider); =20 --=20 2.34.1