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Thu, 25 Sep 2025 13:46:11 -0700 (PDT) Received: from localhost.localdomain ([78.209.201.53]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e2a996bf1sm91201395e9.1.2025.09.25.13.46.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Sep 2025 13:46:11 -0700 (PDT) From: Antoni Pokusinski To: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-iio@vger.kernel.org, linux@roeck-us.net, rodrigo.gobbi.7@gmail.com, naresh.solanki@9elements.com, michal.simek@amd.com, grantpeltier93@gmail.com, farouk.bouabid@cherry.de, marcelo.schmitt1@gmail.com, Antoni Pokusinski Subject: [PATCH v2 4/4] iio: mpl3115: add support for sampling frequency Date: Thu, 25 Sep 2025 22:45:38 +0200 Message-Id: <20250925204538.63723-5-apokusinski01@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250925204538.63723-1-apokusinski01@gmail.com> References: <20250925204538.63723-1-apokusinski01@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable When the device is in ACTIVE mode the temperature and pressure measurements are collected with a frequency determined by the ST[3:0] bits of CTRL_REG2 register. Reviewed-by: Nuno S=C3=A1 Signed-off-by: Antoni Pokusinski --- drivers/iio/pressure/mpl3115.c | 81 ++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c index 13c8b338a15e..b854732e61cb 100644 --- a/drivers/iio/pressure/mpl3115.c +++ b/drivers/iio/pressure/mpl3115.c @@ -30,6 +30,7 @@ #define MPL3115_INT_SOURCE 0x12 #define MPL3115_PT_DATA_CFG 0x13 #define MPL3115_CTRL_REG1 0x26 +#define MPL3115_CTRL_REG2 0x27 #define MPL3115_CTRL_REG3 0x28 #define MPL3115_CTRL_REG4 0x29 #define MPL3115_CTRL_REG5 0x2a @@ -48,6 +49,8 @@ #define MPL3115_CTRL1_ACTIVE BIT(0) /* continuous measurement */ #define MPL3115_CTRL1_OS_258MS GENMASK(5, 4) /* 64x oversampling */ =20 +#define MPL3115_CTRL2_ST GENMASK(3, 0) + #define MPL3115_CTRL3_IPOL1 BIT(5) #define MPL3115_CTRL3_IPOL2 BIT(1) =20 @@ -57,6 +60,25 @@ =20 #define MPL3115_INT2 BIT(2) /* flag that indicates INT2 in use */ =20 +static const unsigned int mpl3115_samp_freq_table[][2] =3D { + { 1, 0}, + { 0, 500000}, + { 0, 250000}, + { 0, 125000}, + { 0, 62500}, + { 0, 31250}, + { 0, 15625}, + { 0, 7812}, + { 0, 3906}, + { 0, 1953}, + { 0, 976}, + { 0, 488}, + { 0, 244}, + { 0, 122}, + { 0, 61}, + { 0, 30}, +}; + struct mpl3115_data { struct i2c_client *client; struct iio_trigger *drdy_trig; @@ -174,10 +196,61 @@ static int mpl3115_read_raw(struct iio_dev *indio_dev, default: return -EINVAL; } + case IIO_CHAN_INFO_SAMP_FREQ: + ret =3D i2c_smbus_read_byte_data(data->client, MPL3115_CTRL_REG2); + if (ret < 0) + return ret; + + ret =3D FIELD_GET(MPL3115_CTRL2_ST, ret); + + *val =3D mpl3115_samp_freq_table[ret][0]; + *val2 =3D mpl3115_samp_freq_table[ret][1]; + return IIO_VAL_INT_PLUS_MICRO; } return -EINVAL; } =20 +static int mpl3115_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + if (mask !=3D IIO_CHAN_INFO_SAMP_FREQ) + return -EINVAL; + + *type =3D IIO_VAL_INT_PLUS_MICRO; + *length =3D ARRAY_SIZE(mpl3115_samp_freq_table) * 2; + *vals =3D (int *)mpl3115_samp_freq_table; + return IIO_AVAIL_LIST; +} + +static int mpl3115_write_raw(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + int val, int val2, long mask) +{ + struct mpl3115_data *data =3D iio_priv(indio_dev); + int i, ret; + + if (mask !=3D IIO_CHAN_INFO_SAMP_FREQ) + return -EINVAL; + + for (i =3D 0; i < ARRAY_SIZE(mpl3115_samp_freq_table); i++) + if (val =3D=3D mpl3115_samp_freq_table[i][0] && + val2 =3D=3D mpl3115_samp_freq_table[i][1]) + break; + + if (i =3D=3D ARRAY_SIZE(mpl3115_samp_freq_table)) + return -EINVAL; + + if (!iio_device_claim_direct(indio_dev)) + return -EBUSY; + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG2, + FIELD_PREP(MPL3115_CTRL2_ST, i)); + iio_device_release_direct(indio_dev); + return ret; +} + static irqreturn_t mpl3115_trigger_handler(int irq, void *p) { struct iio_poll_func *pf =3D p; @@ -229,6 +302,9 @@ static const struct iio_chan_spec mpl3115_channels[] = =3D { .type =3D IIO_PRESSURE, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE), + .info_mask_shared_by_all =3D BIT(IIO_CHAN_INFO_SAMP_FREQ), + .info_mask_shared_by_all_available =3D + BIT(IIO_CHAN_INFO_SAMP_FREQ), .scan_index =3D 0, .scan_type =3D { .sign =3D 'u', @@ -242,6 +318,9 @@ static const struct iio_chan_spec mpl3115_channels[] = =3D { .type =3D IIO_TEMP, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE), + .info_mask_shared_by_all =3D BIT(IIO_CHAN_INFO_SAMP_FREQ), + .info_mask_shared_by_all_available =3D + BIT(IIO_CHAN_INFO_SAMP_FREQ), .scan_index =3D 1, .scan_type =3D { .sign =3D 's', @@ -312,6 +391,8 @@ static const struct iio_trigger_ops mpl3115_trigger_ops= =3D { =20 static const struct iio_info mpl3115_info =3D { .read_raw =3D &mpl3115_read_raw, + .read_avail =3D &mpl3115_read_avail, + .write_raw =3D &mpl3115_write_raw, }; =20 static int mpl3115_trigger_probe(struct mpl3115_data *data, --=20 2.25.1